[gcc(refs/vendors/riscv/heads/gcc-13-with-riscv-opts)] RISC-V: Format VSETVL PASS code

[gcc(refs/vendors/riscv/heads/gcc-13-with-riscv-opts)] RISC-V: Format VSETVL PASS code

[Jeff Law]

https://gcc.gnu.org/g:e8ee121d074d1d81ff15005ce8c192e679d00feb

commit e8ee121d074d1d81ff15005ce8c192e679d00feb
Author: Juzhe-Zhong <juzhe.zhong@rivai.ai>
Date:   Thu Sep 14 15:54:37 2023 +0800

    RISC-V: Format VSETVL PASS code
    
    gcc/ChangeLog:
    
            * config/riscv/riscv-vsetvl.cc (pass_vsetvl::global_eliminate_vsetvl_insn): Format it.
    
    (cherry picked from commit 7c4f6ebe54f4da0097acd07f41782ff6cc39e9a4)

Diff:
---
 gcc/config/riscv/riscv-vsetvl.cc | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/gcc/config/riscv/riscv-vsetvl.cc b/gcc/config/riscv/riscv-vsetvl.cc
index f81361c4ccd..e9e75fe3286 100644
--- a/gcc/config/riscv/riscv-vsetvl.cc
+++ b/gcc/config/riscv/riscv-vsetvl.cc
@@ -4054,7 +4054,8 @@ pass_vsetvl::global_eliminate_vsetvl_insn (const bb_info *bb) const
     }
 
   /* Step1: Reshape the VL/VTYPE status to make sure everything compatible.  */
-  auto_vec<basic_block> pred_cfg_bbs = get_dominated_by (CDI_POST_DOMINATORS, cfg_bb);
+  auto_vec<basic_block> pred_cfg_bbs
+    = get_dominated_by (CDI_POST_DOMINATORS, cfg_bb);
   FOR_EACH_EDGE (e, ei, cfg_bb->preds)
     {
       sbitmap avout = m_vector_manager->vector_avout[e->src->index];