[gcc(refs/users/meissner/heads/work135)] Update ChangeLog.meissner

[gcc(refs/users/meissner/heads/work135)] Update ChangeLog.meissner

[Michael Meissner]

https://gcc.gnu.org/g:6f4122847a94f5becf5f76e4f040a2627526a877

commit 6f4122847a94f5becf5f76e4f040a2627526a877
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Thu Sep 28 12:35:02 2023 -0400

    Update ChangeLog.meissner

Diff:
---
 gcc/ChangeLog.meissner | 55 ++++++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 55 insertions(+)

diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index 8b751a0cc9d..a039473a85a 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -1,5 +1,60 @@
+==================== Branch work135, patch #1 ====================
+
+Replace UNSPEC_COPYSIGN with copysign RTL
+
+When I first implemented COPYSIGN support in the power7 days, we did not have a
+copysign RTL insn, so I had to use UNSPEC to represent the copysign
+instruction.  This patch removes those UNSPECs, and it uses the native RTL
+copysign insn.
+
+2023-09-28  Michael Meissner  <meissner@linux.ibm.com>
+
+gcc/
+
+	* config/rs6000/rs6000.md (UNSPEC_COPYSIGN): Delete.
+	(copysign<mode>3_fcpsg): Use copysign RTL instead of UNSPEC.
+	(copysign<mode>3_hard): Likewise.
+	(copysign<mode>3_soft): Likewise.
+	* config/rs6000/vector.md (vector_copysign<mode>3): Use copysign RTL
+	instead of UNSPEC.
+	* config/rs6000/vsx.md (vsx_copysign<mode>3): Use copysign RTL instead
+	of UNSPEC.
+
 ==================== Branch work135, baseline ====================
 
+Add ChangeLog.meissner and REVISION.
+
+2023-09-28  Michael Meissner  <meissner@linux.ibm.com>
+
+gcc/
+
+	* REVISION: New file for branch.
+	* ChangeLog.meissner: New file.
+
+gcc/c-family/
+
+	* ChangeLog.meissner: New file.
+
+gcc/c/
+
+	* ChangeLog.meissner: New file.
+
+gcc/cp/
+
+	* ChangeLog.meissner: New file.
+
+gcc/fortran/
+
+	* ChangeLog.meissner: New file.
+
+gcc/testsuite/
+
+	* ChangeLog.meissner: New file.
+
+libgcc/
+
+	* ChangeLog.meissner: New file.
+
 2023-09-28   Michael Meissner  <meissner@linux.ibm.com>
 
 	Clone branch

[gcc(refs/users/meissner/heads/work135)] Update ChangeLog.meissner

[Michael Meissner]

https://gcc.gnu.org/g:a1ab45e57cc8426b5a8f793aae6237e98ed939e8

commit a1ab45e57cc8426b5a8f793aae6237e98ed939e8
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Thu Sep 28 21:11:41 2023 -0400

    Update ChangeLog.meissner

Diff:
---
 gcc/ChangeLog.meissner | 25 +++++++++++++++++--------
 1 file changed, 17 insertions(+), 8 deletions(-)

diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index 1c1fa36d449..548319a9bd1 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -8,20 +8,29 @@ gcc/
 
 	* config/rs6000/mma.md (movoo): Add support for
 	-menable-load-vector-pair and -menable-store-vector-pair.
-	* config/rs6000/rs6000.md (rs6000_debug_reg_global): If -mdebug=reg,
-	print whether load and store vector pair instructions are being
-	generated.
-	(rs6000_setup_reg_addr_masks): If load vector pair or store vector pair
-	instructions are not being generated, don't allow lxvpx or stxvpx to be
-	generated.
-	(rs6000_option_override_internal): Add warnings if
+	* config/rs6000/rs6000-cpus.def (OTHER_POWER10_MASKS): Likewise.
+	(POWERPC_MASKS): Likewise.
+	* config/rs6000/rs6000.md (rs6000_setup_reg_addr_masks): If load vector
+	pair or store vector pair instructions are not being generated, don't
+	allow lxvpx or stxvpx to be generated.
+	(rs6000_option_override_internal): Add warnings if either
 	-menable-load-vector-pair or -menable-store-vector-pair is used without
 	having MMA instructions.
-	(rs6000_opt_vars): Allow user to override -menable-load-vector-pair or
+	(rs6000_opt_masks): Allow user to override -menable-load-vector-pair or
 	-menable-store-vector-pair.
 	* config/rs6000/rs6000.opt (-menable-load-vector-pair): New option.
 	(-menable-store-vector-pair): Likewise.
 
+gcc/testsuite/
+
+	* gcc.target/powerpc/vector-pair-switch1.c: New test.
+	* gcc.target/powerpc/vector-pair-switch2.c: New test.
+	* gcc.target/powerpc/vector-pair-switch3.c: New test.
+	* gcc.target/powerpc/vector-pair-switch4.c: New test.
+	* gcc.target/powerpc/vector-pair-switch5.c: New test.
+
+==================== Branch work135, patch #2 was reverted ====================
+
 ==================== Branch work135, patch #1 ====================
 
 Replace UNSPEC_COPYSIGN with copysign RTL

[gcc(refs/users/meissner/heads/work135)] Update ChangeLog.meissner

[Michael Meissner]

https://gcc.gnu.org/g:550588fb519485781cd1727ffa0a070633a81d77

commit 550588fb519485781cd1727ffa0a070633a81d77
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Thu Sep 28 13:20:00 2023 -0400

    Update ChangeLog.meissner

Diff:
---
 gcc/ChangeLog.meissner | 24 ++++++++++++++++++++++++
 1 file changed, 24 insertions(+)

diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index a039473a85a..1c1fa36d449 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -1,3 +1,27 @@
+==================== Branch work135, patch #2 ====================
+
+Add options to disable load and store vector pair.
+
+2023-09-28  Michael Meissner  <meissner@linux.ibm.com>
+
+gcc/
+
+	* config/rs6000/mma.md (movoo): Add support for
+	-menable-load-vector-pair and -menable-store-vector-pair.
+	* config/rs6000/rs6000.md (rs6000_debug_reg_global): If -mdebug=reg,
+	print whether load and store vector pair instructions are being
+	generated.
+	(rs6000_setup_reg_addr_masks): If load vector pair or store vector pair
+	instructions are not being generated, don't allow lxvpx or stxvpx to be
+	generated.
+	(rs6000_option_override_internal): Add warnings if
+	-menable-load-vector-pair or -menable-store-vector-pair is used without
+	having MMA instructions.
+	(rs6000_opt_vars): Allow user to override -menable-load-vector-pair or
+	-menable-store-vector-pair.
+	* config/rs6000/rs6000.opt (-menable-load-vector-pair): New option.
+	(-menable-store-vector-pair): Likewise.
+
 ==================== Branch work135, patch #1 ====================
 
 Replace UNSPEC_COPYSIGN with copysign RTL