[gcc(refs/users/meissner/heads/work135)] Revert patches

[gcc(refs/users/meissner/heads/work135)] Revert patches

[Michael Meissner]

https://gcc.gnu.org/g:cfe6f4c4e22aa08b5b9eadb23582e460f2c51c50

commit cfe6f4c4e22aa08b5b9eadb23582e460f2c51c50
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Thu Sep 28 19:40:31 2023 -0400

    Revert patches

Diff:
---
 gcc/config/rs6000/mma.md     | 17 +++++------------
 gcc/config/rs6000/rs6000.cc  | 35 ++---------------------------------
 gcc/config/rs6000/rs6000.opt |  8 --------
 3 files changed, 7 insertions(+), 53 deletions(-)

diff --git a/gcc/config/rs6000/mma.md b/gcc/config/rs6000/mma.md
index b6cc7b28956..575751d477e 100644
--- a/gcc/config/rs6000/mma.md
+++ b/gcc/config/rs6000/mma.md
@@ -298,19 +298,12 @@
   "TARGET_MMA
    && (gpc_reg_operand (operands[0], OOmode)
        || gpc_reg_operand (operands[1], OOmode))"
-{
-  if (MEM_P (operands[0]))
-    return TARGET_STORE_VECTOR_PAIR ? "stxvp%X0 %x1,%0" : "#";
-
-  if (MEM_P (operands[1]))
-    return TARGET_LOAD_VECTOR_PAIR ? "lxvp%X1 %x0,%1" : "#";
-
-  return "#";
-}
+  "@
+   lxvp%X1 %x0,%1
+   stxvp%X0 %x1,%0
+   #"
   "&& reload_completed
-   && ((MEM_P (operands[0]) && !TARGET_STORE_VECTOR_PAIR)
-       || (MEM_P (operands[1]) && !TARGET_LOAD_VECTOR_PAIR)
-       || (!MEM_P (operands[0]) && !MEM_P (operands[1])))"
+   && (!MEM_P (operands[0]) && !MEM_P (operands[1]))"
   [(const_int 0)]
 {
   rs6000_split_multireg_move (operands[0], operands[1]);
diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc
index 07e2218511e..cc9253bb040 100644
--- a/gcc/config/rs6000/rs6000.cc
+++ b/gcc/config/rs6000/rs6000.cc
@@ -2576,14 +2576,6 @@ rs6000_debug_reg_global (void)
   if (TARGET_DIRECT_MOVE_128)
     fprintf (stderr, DEBUG_FMT_D, "VSX easy 64-bit mfvsrld element",
 	     (int)VECTOR_ELEMENT_MFVSRLD_64BIT);
-
-  if (TARGET_MMA)
-    {
-      fprintf (stderr, DEBUG_FMT_S, "load vector pair",
-	       TARGET_LOAD_VECTOR_PAIR ? "yes" : "no");
-      fprintf (stderr, DEBUG_FMT_S, "store vector pair",
-	       TARGET_STORE_VECTOR_PAIR ? "yes" : "no");
-    }
 }
 
 \f
@@ -2719,9 +2711,7 @@ rs6000_setup_reg_addr_masks (void)
 	  /* Vector pairs can do both indexed and offset loads if the
 	     instructions are enabled, otherwise they can only do offset loads
 	     since it will be broken into two vector moves.  Vector quads can
-	     only do offset loads.  If the user restricted generation of either
-	     of the LXVP or STXVP instructions, do not allow indexed mode so
-	     that we can split the load/store.  */
+	     only do offset loads.  */
 	  else if ((addr_mask != 0) && TARGET_MMA
 		   && (m2 == OOmode || m2 == XOmode))
 	    {
@@ -2729,9 +2719,7 @@ rs6000_setup_reg_addr_masks (void)
 	      if (rc == RELOAD_REG_FPR || rc == RELOAD_REG_VMX)
 		{
 		  addr_mask |= RELOAD_REG_QUAD_OFFSET;
-		  if (m2 == OOmode
-		      && TARGET_LOAD_VECTOR_PAIR
-		      && TARGET_STORE_VECTOR_PAIR)
+		  if (m2 == OOmode)
 		    addr_mask |= RELOAD_REG_INDEXED;
 		}
 	    }
@@ -4417,19 +4405,6 @@ rs6000_option_override_internal (bool global_init_p)
       rs6000_isa_flags &= ~OPTION_MASK_MMA;
     }
 
-  /* Warn if -menable-load-vector-pair or -menable-store-vector-pair are used
-     and MMA is not set.  */
-  if (!TARGET_MMA)
-    {
-      if (TARGET_LOAD_VECTOR_PAIR && OPTION_SET_P(TARGET_LOAD_VECTOR_PAIR))
-	warning (0, "%qs should not be used unless you use %qs",
-		 "-menable-load-vector-pair", "-mmma");
-
-      if (TARGET_STORE_VECTOR_PAIR && OPTION_SET_P(TARGET_STORE_VECTOR_PAIR))
-	warning (0, "%qs should not be used unless you use %qs",
-		 "-mstore-vector-pair", "-mmma");
-    }
-
   /* Enable power10 fusion if we are tuning for power10, even if we aren't
      generating power10 instructions.  */
   if (!(rs6000_isa_flags_explicit & OPTION_MASK_P10_FUSION))
@@ -24351,12 +24326,6 @@ static struct rs6000_opt_var const rs6000_opt_vars[] =
   { "speculate-indirect-jumps",
     offsetof (struct gcc_options, x_rs6000_speculate_indirect_jumps),
     offsetof (struct cl_target_option, x_rs6000_speculate_indirect_jumps), },
-  { "enable-load-vector-pair",
-    offsetof (struct gcc_options, x_TARGET_LOAD_VECTOR_PAIR),
-    offsetof (struct cl_target_option, x_TARGET_LOAD_VECTOR_PAIR), },
-  { "enable-store-vector-pair",
-    offsetof (struct gcc_options, x_TARGET_STORE_VECTOR_PAIR),
-    offsetof (struct cl_target_option, x_TARGET_STORE_VECTOR_PAIR), },
 };
 
 /* Inner function to handle attribute((target("..."))) and #pragma GCC target
diff --git a/gcc/config/rs6000/rs6000.opt b/gcc/config/rs6000/rs6000.opt
index e2b50e43cc4..bde6d3ff664 100644
--- a/gcc/config/rs6000/rs6000.opt
+++ b/gcc/config/rs6000/rs6000.opt
@@ -597,14 +597,6 @@ mmma
 Target Mask(MMA) Var(rs6000_isa_flags)
 Generate (do not generate) MMA instructions.
 
-menable-load-vector-pair
-Target Undocumented Var(TARGET_LOAD_VECTOR_PAIR) Init(1) Save
-Generate (do not generate) load vector pair instructions.
-
-menable-store-vector-pair
-Target Undocumented Var(TARGET_STORE_VECTOR_PAIR) Init(1) Save
-Generate (do not generate) store vector pair instructions.
-
 mrelative-jumptables
 Target Undocumented Var(rs6000_relative_jumptables) Init(1) Save