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* [gcc r14-4355] rtl-optimization/110939 Really fix narrow comparison of memory and constant
@ 2023-10-01 14:14 Stefan Schulze Frielinghaus
  0 siblings, 0 replies; only message in thread
From: Stefan Schulze Frielinghaus @ 2023-10-01 14:14 UTC (permalink / raw)
  To: gcc-cvs

https://gcc.gnu.org/g:86b2ffc0b8334c86ed13974f7d986821040474a4

commit r14-4355-g86b2ffc0b8334c86ed13974f7d986821040474a4
Author: Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
Date:   Sun Oct 1 16:11:32 2023 +0200

    rtl-optimization/110939 Really fix narrow comparison of memory and constant
    
    In the former fix in commit 41ef5a34161356817807be3a2e51fbdbe575ae85 I
    completely missed the fact that the normal form of a CONST_INT for a
    mode with fewer bits than in HOST_WIDE_INT is a sign extended version of
    the actual constant.  This even holds true for unsigned constants.
    
    Fixed by masking out the upper bits for the incoming constant and sign
    extending the resulting unsigned constant.
    
    gcc/ChangeLog:
    
            * combine.cc (simplify_compare_const): Properly handle unsigned
            constants while narrowing comparison of memory and constants.

Diff:
---
 gcc/combine.cc | 19 ++++++++++---------
 1 file changed, 10 insertions(+), 9 deletions(-)

diff --git a/gcc/combine.cc b/gcc/combine.cc
index e46d202d0a7..468b7fde911 100644
--- a/gcc/combine.cc
+++ b/gcc/combine.cc
@@ -12003,14 +12003,15 @@ simplify_compare_const (enum rtx_code code, machine_mode mode,
       && !MEM_VOLATILE_P (op0)
       /* The optimization makes only sense for constants which are big enough
 	 so that we have a chance to chop off something at all.  */
-      && (unsigned HOST_WIDE_INT) const_op > 0xff
-      /* Bail out, if the constant does not fit into INT_MODE.  */
-      && (unsigned HOST_WIDE_INT) const_op
-	 < ((HOST_WIDE_INT_1U << (GET_MODE_PRECISION (int_mode) - 1) << 1) - 1)
+      && ((unsigned HOST_WIDE_INT) const_op & GET_MODE_MASK (int_mode)) > 0xff
       /* Ensure that we do not overflow during normalization.  */
-      && (code != GTU || (unsigned HOST_WIDE_INT) const_op < HOST_WIDE_INT_M1U))
+      && (code != GTU
+	  || ((unsigned HOST_WIDE_INT) const_op & GET_MODE_MASK (int_mode))
+	     < HOST_WIDE_INT_M1U)
+      && trunc_int_for_mode (const_op, int_mode) == const_op)
     {
-      unsigned HOST_WIDE_INT n = (unsigned HOST_WIDE_INT) const_op;
+      unsigned HOST_WIDE_INT n
+	= (unsigned HOST_WIDE_INT) const_op & GET_MODE_MASK (int_mode);
       enum rtx_code adjusted_code;
 
       /* Normalize code to either LEU or GEU.  */
@@ -12051,15 +12052,15 @@ simplify_compare_const (enum rtx_code code, machine_mode mode,
 		HOST_WIDE_INT_PRINT_HEX ") to (MEM %s "
 		HOST_WIDE_INT_PRINT_HEX ").\n", GET_MODE_NAME (int_mode),
 		GET_MODE_NAME (narrow_mode_iter), GET_RTX_NAME (code),
-		(unsigned HOST_WIDE_INT)const_op, GET_RTX_NAME (adjusted_code),
-		n);
+		(unsigned HOST_WIDE_INT) const_op & GET_MODE_MASK (int_mode),
+		GET_RTX_NAME (adjusted_code), n);
 	    }
 	  poly_int64 offset = (BYTES_BIG_ENDIAN
 			       ? 0
 			       : (GET_MODE_SIZE (int_mode)
 				  - GET_MODE_SIZE (narrow_mode_iter)));
 	  *pop0 = adjust_address_nv (op0, narrow_mode_iter, offset);
-	  *pop1 = GEN_INT (n);
+	  *pop1 = gen_int_mode (n, narrow_mode_iter);
 	  return adjusted_code;
 	}
     }

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