[gcc r14-4441] Daily bump.

[gcc r14-4441] Daily bump.

[GCC Administrator]

https://gcc.gnu.org/g:0defa2a0f8c4d6370588befbb3e61f25ffbd727c

commit r14-4441-g0defa2a0f8c4d6370588befbb3e61f25ffbd727c
Author: GCC Administrator <gccadmin@gcc.gnu.org>
Date:   Sat Oct 7 00:17:51 2023 +0000

    Daily bump.

Diff:
---
 ChangeLog               |  6 ++++
 gcc/ChangeLog           | 88 +++++++++++++++++++++++++++++++++++++++++++++++++
 gcc/DATESTAMP           |  2 +-
 gcc/testsuite/ChangeLog | 54 ++++++++++++++++++++++++++++++
 libgomp/ChangeLog       |  4 +++
 5 files changed, 153 insertions(+), 1 deletion(-)

diff --git a/ChangeLog b/ChangeLog
index bdc5fa624d3..9dbabfdec68 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,3 +1,9 @@
+2023-10-06  Sergei Trofimovich  <siarheit@google.com>
+
+	PR bootstrap/111663
+	* Makefile.tpl (STAGEfeedback_CONFIGURE_FLAGS): Disable -Werror.
+	* Makefile.in: Regenerate.
+
 2023-10-05  Jan Engelhardt  <jengelh@inai.de>
 
 	* SECURITY.txt: Fix up indentation.
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index dc4391bf07e..238ceed4b3d 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,91 @@
+2023-10-06  Roger Sayle  <roger@nextmovesoftware.com>
+
+	* config/i386/i386-expand.cc (ix86_split_ashl): Split shifts by
+	one into add3_cc_overflow_1 followed by add3_carry.
+	* config/i386/i386.md (@add<mode>3_cc_overflow_1): Renamed from
+	"*add<mode>3_cc_overflow_1" to provide generator function.
+
+2023-10-06  Roger Sayle  <roger@nextmovesoftware.com>
+	    Uros Bizjak  <ubizjak@gmail.com>
+
+	* config/i386/i386.cc (ix86_avoid_lea_for_addr): Split LEAs used
+	to perform left shifts into shorter instructions with -Oz.
+
+2023-10-06  Vineet Gupta  <vineetg@rivosinc.com>
+
+	* config/riscv/riscv.md (mvconst_internal): Add !ira_in_progress.
+
+2023-10-06  Sandra Loosemore  <sandra@codesourcery.com>
+
+	* doc/extend.texi (Function Attributes): Mention standard attribute
+	syntax.
+	(Variable Attributes): Likewise.
+	(Type Attributes): Likewise.
+	(Attribute Syntax): Likewise.
+
+2023-10-06  Andrew Stubbs  <ams@codesourcery.com>
+
+	* config/gcn/gcn-valu.md (*mov<mode>): Convert to compact syntax.
+	(mov<mode>_exec): Likewise.
+	(mov<mode>_sgprbase): Likewise.
+	* config/gcn/gcn.md (*mov<mode>_insn): Likewise.
+	(*movti_insn): Likewise.
+
+2023-10-06  Andrew Stubbs  <ams@codesourcery.com>
+
+	* config/gcn/gcn.cc (print_operand): Adjust xcode type to fix warning.
+
+2023-10-06  Andrew Pinski  <pinskia@gmail.com>
+
+	PR middle-end/111699
+	* match.pd ((c ? a : b) op d, (c ? a : b) op (c ? d : e),
+	(v ? w : 0) ? a : b, c1 ? c2 ? a : b : b): Enable only for GIMPLE.
+
+2023-10-06  Jakub Jelinek  <jakub@redhat.com>
+
+	* ipa-prop.h (ipa_bits): Remove.
+	(struct ipa_jump_func): Remove bits member.
+	(struct ipcp_transformation): Remove bits member, adjust
+	ctor and dtor.
+	(ipa_get_ipa_bits_for_value): Remove.
+	* ipa-prop.cc (struct ipa_bit_ggc_hash_traits): Remove.
+	(ipa_bits_hash_table): Remove.
+	(ipa_print_node_jump_functions_for_edge): Don't print bits.
+	(ipa_get_ipa_bits_for_value): Remove.
+	(ipa_set_jfunc_bits): Remove.
+	(ipa_compute_jump_functions_for_edge): For pointers query
+	pointer alignment before ipa_set_jfunc_vr and update_bitmask
+	in there.  For integral types, just rely on bitmask already
+	being handled in value ranges.
+	(ipa_check_create_edge_args): Don't create ipa_bits_hash_table.
+	(ipcp_transformation_initialize): Neither here.
+	(ipcp_transformation_t::duplicate): Don't copy bits vector.
+	(ipa_write_jump_function): Don't stream bits here.
+	(ipa_read_jump_function): Neither here.
+	(useful_ipcp_transformation_info_p): Don't test bits vec.
+	(write_ipcp_transformation_info): Don't stream bits here.
+	(read_ipcp_transformation_info): Neither here.
+	(ipcp_get_parm_bits): Get mask and value from m_vr rather
+	than bits.
+	(ipcp_update_bits): Remove.
+	(ipcp_update_vr): For pointers, set_ptr_info_alignment from
+	bitmask stored in value range.
+	(ipcp_transform_function): Don't test bits vector, don't call
+	ipcp_update_bits.
+	* ipa-cp.cc (propagate_bits_across_jump_function): Don't use
+	jfunc->bits, instead get mask and value from jfunc->m_vr.
+	(ipcp_store_bits_results): Remove.
+	(ipcp_store_vr_results): Incorporate parts of
+	ipcp_store_bits_results here, merge the bitmasks with value
+	range if both are supplied.
+	(ipcp_driver): Don't call ipcp_store_bits_results.
+	* ipa-sra.cc (zap_useless_ipcp_results): Remove *ts->bits
+	clearing.
+
+2023-10-06  Pan Li  <pan2.li@intel.com>
+
+	* config/riscv/autovec.md: Update comments.
+
 2023-10-05  John David Anglin  <danglin@gcc.gnu.org>
 
 	* config/pa/pa32-linux.h (MALLOC_ABI_ALIGNMENT): Delete.
diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP
index 237947ee377..0d8286c499f 100644
--- a/gcc/DATESTAMP
+++ b/gcc/DATESTAMP
@@ -1 +1 @@
-20231006
+20231007
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index ad0af926ae9..117a84d9ca7 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,57 @@
+2023-10-06  Roger Sayle  <roger@nextmovesoftware.com>
+
+	* gcc.target/i386/ashldi3-2.c: New 32-bit test case.
+	* gcc.target/i386/ashlti3-3.c: New 64-bit test case.
+
+2023-10-06  Roger Sayle  <roger@nextmovesoftware.com>
+	    Uros Bizjak  <ubizjak@gmail.com>
+
+	* gcc.target/i386/lea-2.c: New test case.
+
+2023-10-06  Andrew Pinski  <pinskia@gmail.com>
+
+	PR middle-end/111699
+	* gcc.c-torture/compile/pr111699-1.c: New test.
+
+2023-10-06  Patrick O'Neill  <patrick@rivosinc.com>
+
+	* gcc.target/riscv/rvv/autovec/cond/cond_convert_float2float-1.h:
+	Replace stdint.h with stdint-gcc.h.
+	* gcc.target/riscv/rvv/autovec/cond/cond_convert_float2float-2.h:
+	Ditto.
+	* gcc.target/riscv/rvv/autovec/cond/cond_convert_float2int-1.h:
+	Ditto.
+	* gcc.target/riscv/rvv/autovec/cond/cond_convert_float2int-2.h:
+	Ditto.
+	* gcc.target/riscv/rvv/autovec/cond/cond_convert_int2float-1.h:
+	Ditto.
+	* gcc.target/riscv/rvv/autovec/cond/cond_convert_int2float-2.h:
+	Ditto.
+	* gcc.target/riscv/rvv/autovec/cond/cond_convert_int2int-1.h:
+	Ditto.
+	* gcc.target/riscv/rvv/autovec/cond/cond_convert_int2int-2.h:
+	Ditto.
+	* gcc.target/riscv/rvv/autovec/cond/cond_sqrt-1.c: Ditto.
+	* gcc.target/riscv/rvv/autovec/cond/cond_sqrt-2.c: Ditto.
+	* gcc.target/riscv/rvv/autovec/cond/cond_unary-1.c: Ditto.
+	* gcc.target/riscv/rvv/autovec/cond/cond_unary-2.c: Ditto.
+	* gcc.target/riscv/rvv/autovec/cond/cond_unary-3.c: Ditto.
+	* gcc.target/riscv/rvv/autovec/cond/cond_unary-4.c: Ditto.
+	* gcc.target/riscv/rvv/autovec/cond/cond_unary-5.c: Ditto.
+	* gcc.target/riscv/rvv/autovec/cond/cond_unary-6.c: Ditto.
+	* gcc.target/riscv/rvv/autovec/cond/cond_unary-7.c: Ditto.
+	* gcc.target/riscv/rvv/autovec/cond/cond_unary-8.c: Ditto.
+	* gcc.target/riscv/rvv/autovec/partial/slp-8.c: Ditto.
+	* gcc.target/riscv/rvv/autovec/partial/slp-9.c: Ditto.
+	* gcc.target/riscv/rvv/autovec/pr111232.c: Ditto.
+	* gcc.target/riscv/rvv/autovec/unop/cvt-0.c: Ditto.
+	* gcc.target/riscv/rvv/autovec/unop/cvt-1.c: Ditto.
+	* gcc.target/riscv/rvv/autovec/vls-vlmax/perm.h: Ditto.
+	* gcc.target/riscv/rvv/base/abi-call-args-4-run.c: Ditto.
+	* gcc.target/riscv/rvv/base/pr110119-2.c: Ditto.
+	* gcc.target/riscv/rvv/vsetvl/pr111255.c: Ditto.
+	* gcc.target/riscv/rvv/vsetvl/wredsum_vlmax.c: Ditto.
+
 2023-10-05  Patrick O'Neill  <patrick@rivosinc.com>
 	    Joern Rennecke  <joern.rennecke@embecosm.com>
 
diff --git a/libgomp/ChangeLog b/libgomp/ChangeLog
index 077265d5dcd..4f7888a3e02 100644
--- a/libgomp/ChangeLog
+++ b/libgomp/ChangeLog
@@ -1,3 +1,7 @@
+2023-10-06  Tobias Burnus  <tobias@codesourcery.com>
+
+	* libgomp.texi (Device Memory Routines): New.
+
 2023-10-04  Tobias Burnus  <tobias@codesourcery.com>
 
 	* libgomp.texi (OpenMP Context Selectors): Clarify 'kind' trait