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* [gcc(refs/vendors/riscv/heads/gcc-13-with-riscv-opts)] RISC-V: Remove XFAIL of ssa-dom-cse-2.c
@ 2023-10-12 22:00 Jeff Law
  0 siblings, 0 replies; only message in thread
From: Jeff Law @ 2023-10-12 22:00 UTC (permalink / raw)
  To: gcc-cvs

https://gcc.gnu.org/g:c40ccffe11537af997e029c16ecf675d436e4ca1

commit c40ccffe11537af997e029c16ecf675d436e4ca1
Author: Juzhe-Zhong <juzhe.zhong@rivai.ai>
Date:   Wed Oct 11 11:25:07 2023 +0800

    RISC-V: Remove XFAIL of ssa-dom-cse-2.c
    
    Confirm RISC-V is able to CSE this case no matter whether we enable RVV or not.
    
    Remove XFAIL,  to fix:
    XPASS: gcc.dg/tree-ssa/ssa-dom-cse-2.c scan-tree-dump optimized "return 28;"
    
    gcc/testsuite/ChangeLog:
    
            * gcc.dg/tree-ssa/ssa-dom-cse-2.c: Remove riscv.
    
    (cherry picked from commit d4de593d366f3bbdfe2db7baf60ae32ad876c2cc)

Diff:
---
 gcc/testsuite/gcc.dg/tree-ssa/ssa-dom-cse-2.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/gcc/testsuite/gcc.dg/tree-ssa/ssa-dom-cse-2.c b/gcc/testsuite/gcc.dg/tree-ssa/ssa-dom-cse-2.c
index a879d305971..5c89e3f8698 100644
--- a/gcc/testsuite/gcc.dg/tree-ssa/ssa-dom-cse-2.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/ssa-dom-cse-2.c
@@ -27,4 +27,4 @@ foo ()
    but the loop reads only one element at a time, and DOM cannot resolve these.
    The same happens on powerpc depending on the SIMD support available.  */
 
-/* { dg-final { scan-tree-dump "return 28;" "optimized" { xfail { { alpha*-*-* hppa*64*-*-* nvptx*-*-* mmix-knuth-mmixware } || { { { lp64 && { powerpc*-*-* sparc*-*-* riscv*-*-* } } || aarch64_sve } || { arm*-*-* && { ! arm_neon } } } } } } } */
+/* { dg-final { scan-tree-dump "return 28;" "optimized" { xfail { { alpha*-*-* hppa*64*-*-* nvptx*-*-* mmix-knuth-mmixware } || { { { lp64 && { powerpc*-*-* sparc*-*-* } } || aarch64_sve } || { arm*-*-* && { ! arm_neon } } } } } } } */

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