[gcc/meissner/heads/work139-vsubreg] (41 commits) Merge commit 'refs/users/meissner/heads/work139-vsubreg' of

[gcc/meissner/heads/work139-vsubreg] (41 commits) Merge commit 'refs/users/meissner/heads/work139-vsubreg' of

[Michael Meissner]

The branch 'meissner/heads/work139-vsubreg' was updated to point to:

 23efe34b6c7... Merge commit 'refs/users/meissner/heads/work139-vsubreg' of

It previously pointed to:

 2d195ec8881... Merge commit 'refs/users/meissner/heads/work139-vsubreg' of

Diff:

Summary of changes (added commits):
-----------------------------------

  23efe34... Merge commit 'refs/users/meissner/heads/work139-vsubreg' of
  ab8ab36... Add ChangeLog.vsubreg and update REVISION.
  c9aff00... Check in merged changes. (*)
  a6348ee... Update ChangeLog.meissner (*)
  a49d1b5... Power10: Add options to disable load and store vector pair. (*)
  448688a... Update ChangeLog.meissner (*)
  5ba61cf... PowerPC: Do not depend on an undefined shift (*)
  8f3b5e5... Revert patches (*)
  310c14a... Update ChangeLog.meissner (*)
  30673db... PowerPC: Do not depend on an undefined shift (*)
  c20338f... Add ChangeLog.meissner and REVISION. (*)
  611eef7... PR111778, PowerPC: Do not depend on an undefined shift (*)
  8bd11fa... libgomp.texi: Clarify OMP_TARGET_OFFLOAD=mandatory (*)
  f150717... reg-notes.def: Fix up description of REG_NOALIAS (*)
  d8c3ace... RISC-V: Make xtheadcondmov-indirect tests robust against in (*)
  53a9407... wide-int: Fix build with gcc < 12 or clang++ [PR111787] (*)
  e99ad40... RISCV: Bugfix for incorrect documentation heading nesting (*)
  de593b3... AArch64: Fix Armv9-a warnings that get emitted whenever a A (*)
  fb590e4... wide-int: Add simple CHECKING_P stack-protector canary like (*)
  0d00385... wide-int: Allow up to 16320 bits wide_int and change widest (*)
  cd0185b... LibF7: Implement atan2. (*)
  2cc4f58... RISC-V: Support FP lround/lroundf auto vectorization (*)
  dfb4085... dwarf2out: Stop using wide_int in GC structures (*)
  05f9831... tree-optimization/111764 - wrong reduction vectorization (*)
  5fbd91b... Support Intel USER_MSR (*)
  3948844... LoongArch: Modify check_effective_target_vect_int_mod accor (*)
  a2a51b6... LoongArch: Enable vect.exp for LoongArch. [PR111424] (*)
  3c23183... LoongArch: Adjust makefile dependency for loongarch headers (*)
  701363d... Fortran: Set hidden string length for pointer components [P (*)
  530babc... rs6000: Make 32 bit stack_protect support prefixed insn [PR (*)
  610b845... testsuite: Avoid uninit var in pr60510.f [PR111427] (*)
  f1a05dc... vect: Consider vec_perm costing for VMAT_CONTIGUOUS_REVERSE (*)
  0bdb9bb... vect: Get rid of vect_model_store_cost (*)
  0a96eed... vect: Adjust vectorizable_store costing on VMAT_CONTIGUOUS_ (*)
  6a88202... vect: Adjust vectorizable_store costing on VMAT_LOAD_STORE_ (*)
  8b151eb... vect: Adjust vectorizable_store costing on VMAT_ELEMENTWISE (*)
  7184d22... vect: Simplify costing on vectorizable_scan_store (*)
  e00820c... vect: Adjust vectorizable_store costing on VMAT_GATHER_SCAT (*)
  3bf2366... vect: Move vect_model_store_cost next to the transform in v (*)
  32207b1... vect: Ensure vect store is supported for some VMAT_ELEMENTW (*)
  e1e127d... x86: set spincount 1 for x86 hybrid platform (*)

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