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* [gcc/egallager/heads/CI] (1306 commits) Update linux.yaml
@ 2023-10-15  9:08 Eric Gallager
  0 siblings, 0 replies; only message in thread
From: Eric Gallager @ 2023-10-15  9:08 UTC (permalink / raw)
  To: gcc-cvs

The branch 'egallager/heads/CI' was updated to point to:

 03387feb9ff... Update linux.yaml

It previously pointed to:

 e6f92c69cfa... Merge pull request #1 from talregev/TalR/gcc_ci

Diff:

Summary of changes (added commits):
-----------------------------------

  03387fe... Update linux.yaml
  c74844e... Update linux.yaml
  53bb6b5... Merge branch 'gcc-mirror:master' into me/CI
  bc238c4... libgomp.texi: Note to 'Memory allocation' sect and missing  (*)
  969f5c3... Fortran: Support OpenMP's 'allocate' directive for stack va (*)
  cb01192... middle-end: Allow _BitInt(65535) [PR102989] (*)
  78dd49f... RISC-V: Remove redundant iterators. (*)
  300d7d3... Daily bump. (*)
  d78fef5... Fortran: name conflict between internal procedure and deriv (*)
  458c253... fortran: fix handling of options -ffpe-trap and -ffpe-summa (*)
  8be20f3... Do not add partial equivalences with no uses. (*)
  3179ad7... OMP SIMD inbranch call vectorization for AVX512 style masks (*)
  63eaccd... Add support for SLP vectorization of OpenMP SIMD clone call (*)
  8544efd... RISC-V Regression: Fix FAIL of bb-slp-68.c for RVV (*)
  9a82cca... RISC-V: Refine run test cases of math autovec (*)
  8c5447a... RISC-V: Add test for FP llfloor auto vectorization (*)
  9d67561... RISC-V: Add test for FP ifloor auto vectorization (*)
  2943c50... RISC-V: Add test for FP iceil auto vectorization (*)
  ad0bac8... RISC-V: Add test for FP llceil auto vectorization (*)
  24eaada... C99 testsuite readiness: Some verified test case adjustment (*)
  0fef2c8... C99 test suite readiness: Some unverified test case adjustm (*)
  1c23bfd... C99 test suite readiness: Mark some C89 tests (*)
  cf611de... or1k: Fix -Wincompatible-pointer-types warning during libgc (*)
  dab4f3e... arc: Fix -Wincompatible-pointer-types warning during libgcc (*)
  fbd3923... riscv: Fix -Wincompatible-pointer-types warning during libg (*)
  6e5216e... csky: Fix -Wincompatible-pointer-types warning during libgc (*)
  bdbca40... m68k: Avoid implicit function declaration in libgcc (*)
  badb798... libstdc++: Fix tr1/8_c_compatibility/cstdio/functions.cc re (*)
  6decda1... tree-optimization/111779 - Handle some BIT_FIELD_REFs in SR (*)
  35b5bb4... tree-optimization/111773 - avoid CD-DCE of noreturn special (*)
  6b58056... RISC-V: Add test for FP llround auto vectorization (*)
  2a89656... RISC-V Regression: Fix FAIL of bb-slp-pr69907.c for RVV (*)
  d53d20a... RISC-V: Add test for FP iroundf auto vectorization (*)
  0f40e59... RISC-V: Fix the riscv_legitimize_poly_move issue on targets (*)
  f0b0507... RISC-V: Leverage stdint-gcc.h for RVV test cases (*)
  8f52040... RISC-V: Support FP lfloor/lfloorf auto vectorization (*)
  ba0cde8... testsuite: Replace many dg-require-thread-fence with dg-req (*)
  2a4d9e4... testsuite: Add dg-require-atomic-cmpxchg-word (*)
  f9ef2e6... Daily bump. (*)
  51f7bfa... RISC-V: Support FP lceil/lceilf auto vectorization (*)
  611eef7... PR111778, PowerPC: Do not depend on an undefined shift (*)
  8bd11fa... libgomp.texi: Clarify OMP_TARGET_OFFLOAD=mandatory (*)
  f150717... reg-notes.def: Fix up description of REG_NOALIAS (*)
  d8c3ace... RISC-V: Make xtheadcondmov-indirect tests robust against in (*)
  53a9407... wide-int: Fix build with gcc < 12 or clang++ [PR111787] (*)
  e99ad40... RISCV: Bugfix for incorrect documentation heading nesting (*)
  de593b3... AArch64: Fix Armv9-a warnings that get emitted whenever a A (*)
  fb590e4... wide-int: Add simple CHECKING_P stack-protector canary like (*)
  0d00385... wide-int: Allow up to 16320 bits wide_int and change widest (*)
  cd0185b... LibF7: Implement atan2. (*)
  2cc4f58... RISC-V: Support FP lround/lroundf auto vectorization (*)
  dfb4085... dwarf2out: Stop using wide_int in GC structures (*)
  05f9831... tree-optimization/111764 - wrong reduction vectorization (*)
  5fbd91b... Support Intel USER_MSR (*)
  3948844... LoongArch: Modify check_effective_target_vect_int_mod accor (*)
  a2a51b6... LoongArch: Enable vect.exp for LoongArch. [PR111424] (*)
  3c23183... LoongArch: Adjust makefile dependency for loongarch headers (*)
  701363d... Fortran: Set hidden string length for pointer components [P (*)
  530babc... rs6000: Make 32 bit stack_protect support prefixed insn [PR (*)
  610b845... testsuite: Avoid uninit var in pr60510.f [PR111427] (*)
  f1a05dc... vect: Consider vec_perm costing for VMAT_CONTIGUOUS_REVERSE (*)
  0bdb9bb... vect: Get rid of vect_model_store_cost (*)
  0a96eed... vect: Adjust vectorizable_store costing on VMAT_CONTIGUOUS_ (*)
  6a88202... vect: Adjust vectorizable_store costing on VMAT_LOAD_STORE_ (*)
  8b151eb... vect: Adjust vectorizable_store costing on VMAT_ELEMENTWISE (*)
  7184d22... vect: Simplify costing on vectorizable_scan_store (*)
  e00820c... vect: Adjust vectorizable_store costing on VMAT_GATHER_SCAT (*)
  3bf2366... vect: Move vect_model_store_cost next to the transform in v (*)
  32207b1... vect: Ensure vect store is supported for some VMAT_ELEMENTW (*)
  e1e127d... x86: set spincount 1 for x86 hybrid platform (*)
  6a3302a... RISC-V: Support FP llrint auto vectorization (*)
  180b08f... [APX] Support Intel APX PUSH2POP2 (*)
  d6b7fe1... RISC-V: Support FP irintf auto vectorization (*)
  6febf76... Daily bump. (*)
  06f36c1... RISC-V: Add TARGET_MIN_VLEN_OPTS to fix the build (*)
  a3e50ee... RISC-V Adjust long unconditional branch sequence (*)
  faae30c... RISC-V: Extend riscv_subset_list, preparatory for target at (*)
  9452d13... RISC-V: Refactor riscv_option_override and riscv_convert_ve (*)
  0363bba... options: Define TARGET_<NAME>_P and TARGET_<NAME>_OPTS_P ma (*)
  e8d418d... MATCH: [PR111282] Simplify `a & (b ^ ~a)` to `a & b` (*)
  acfca27... modula2: Narrow subranges to int or unsigned int if ZTYPE i (*)
  5ef248c... [PATCH v4 2/2] RISC-V: Add support for XCValu extension in  (*)
  400efdd... [PATCH v4 1/2] RISC-V: Add support for XCVmac extension in  (*)
  70b02df... MAINTAINERS: Fix write after approval name order (*)
  2b783fe... PR modula2/111675 Incorrect packed record field value passe (*)
  f6c5e24... RISC-V: Fix incorrect index(offset) of gather/scatter (*)
  d1e5566... RISC-V: Support FP lrint/lrintf auto vectorization (*)
  d4de593... RISC-V: Remove XFAIL of ssa-dom-cse-2.c (*)
  e75bf19... tree-ssa-strlen: optimization skips clobbering store [PR111 (*)
  c414924... Optimize (ne:SI (subreg:QI (ashift:SI x 7) 0) 0) as (and:SI (*)
  23aabde... RISC-V: Enable full coverage vect tests (*)
  4efe908... Refine predicate of operands[2] in divv4hf3 with register_o (*)
  de04f73... RISC-V Regression: Make pattern match more accurate of vect (*)
  cfe8994... RISC-V Regression: Fix FAIL of vect-multitypes-16.c for RVV (*)
  69e3072... Daily bump. (*)
  71f9064... RISC-V: far-branch: Handle far jumps and branches for funct (*)
  bd5719b... c++: mangle multiple levels of template parms [PR109422] (*)
  975da6f... MATCH: [PR111679] Add alternative simplification of `a | (( (*)
  5bb6a87... RISC-V Regression: Make match patterns more accurate (*)
  0b0fcb2... RISC-V Regression: Fix FAIL of predcom-2.c (*)
  8a36140... RISC-V Regression: Fix FAIL of pr65947-8.c for RVV (*)
  ddf17b6... MAINTAINERS: Add myself to write after approval (*)
  5255273... RISC-V: Add VLS BOOL mode vcond_mask[PR111751] (*)
  70b5c69... tree-optimization/111751 - support 1024 bit vector constant (*)
  2f15083... ada: Fix internal error on too large representation clause  (*)
  42c46cf... ada: Tweak internal subprogram in Ada.Directories (*)
  25c253e... ada: Remove superfluous setter procedure (*)
  e05e5d6... ada: Fix bad finalization of limited aggregate in condition (*)
  6bd83c9... ada: Fix infinite loop with multiple limited with clauses (*)
  34992e1... ada: Fix filesystem entry filtering (*)
  f71c631... ada: Tweak documentation comments (*)
  85a0ce9... ada: Crash processing pragmas Compile_Time_Error and Compil (*)
  a704603... RISC-V: Add testcase for SCCVN optimization[PR111751] (*)
  7c76c87... Fix missed CSE with a BLKmode entity (*)
  4d23049... RISC-V Regression: Fix FAIL of bb-slp-pr65935.c for RVV (*)
  aaa5a53... arc: Refurbish add.f combiner patterns (*)
  4ecb9b0... RISC-V: Add available vector size for RVV (*)
  fb124f2... Daily bump. (*)
  cc50337... Fixes for profile count/probability maintenance (*)
  08d0f84... analyzer: fix build with gcc < 6 (*)
  b0892b1... Ensure float equivalences include + and - zero. (*)
  5ee5111... Remove unused get_identity_relation. (*)
  dae2144... RISC-V Regression test: Fix slp-perm-4.c FAIL for RVV (*)
  e90eddd... RISC-V Regression tests: Fix FAIL of pr97832* for RVV (*)
  30b76f8... RISC-V Regression test: Fix FAIL of slp-12a.c (*)
  db20b83... RISC-V Regression test: Fix FAIL of slp-reduc-4.c for RVV (*)
  79e6ea4... RISC-V Regression test: Adapt SLP tests like ARM SVE (*)
  f849843... RISC-V: Add initial pipeline description for an out-of-orde (*)
  dee55cf... RISC-V: Support movmisalign of RVV VLA modes (*)
  578aa2f... THead: Fix missing CFI directives for th.sdd in prologue. (*)
  11b8cf1... tree-optimization/111715 - improve TBAA for access paths wi (*)
  841668a... RISC-V: Refine bswap16 auto vectorization code gen (*)
  1543f3e... RISC-V Regression test: Fix FAIL of pr45752.c for RVV (*)
  3f99b70... testsuite: Fix vect_cond_arith_* dump checks for RVV. (*)
  784deda... RISC-V Regression test: Fix FAIL of fast-math-slp-38.c for  (*)
  34d4168... i386: Implement doubleword right shifts by 1 bit using s[ha (*)
  85bd47b... Allow -mno-evex512 usage (*)
  43b08ab... Support -mevex512 for AVX512FP16 intrins (*)
  b549005... Support -mevex512 for AVX512{IFMA,VBMI,VNNI,BF16,VPOPCNTDQ, (*)
  8e79b1b... Support -mevex512 for AVX512BW intrins (*)
  1b24890... Support -mevex512 for AVX512DQ intrins (*)
  c1eef66... Support -mevex512 for AVX512F intrins (*)
  aa9bce3... Disable zmm register and 512 bit libmvec call when !TARGET_ (*)
  c2a282a... [PATCH 5/5] Add OPTION_MASK_ISA2_EVEX512 for 512 bit builti (*)
  b74e292... [PATCH 4/5] Add OPTION_MASK_ISA2_EVEX512 for 512 bit builti (*)
  031e033... [PATCH 3/5] Add OPTION_MASK_ISA2_EVEX512 for 512 bit builti (*)
  cb8c718... [PATCH 2/5] Add OPTION_MASK_ISA2_EVEX512 for 512 bit builti (*)
  8d4b3b3... [PATCH 1/5] Add OPTION_MASK_ISA2_EVEX512 for 512 bit builti (*)
  aea8e41... [PATCH 5/5] Push evex512 target for 512 bit intrins (*)
  8108b22... [PATCH 4/5] Push evex512 target for 512 bit intrins (*)
  03a8504... [PATCH 4/5] Push evex512 target for 512 bit intrins (*)
  ba8e3f3... [PATCH 2/5] Push evex512 target for 512 bit intrins (*)
  79fb476... [PATCH 1/5] Push evex512 target for 512 bit intrins (*)
  6882df7... Initial support for -mevex512 (*)
  873586e... TEST: Fix dump FAIL for RVV (RISCV-V vector) (*)
  c1e4747... rs6000: support 32bit inline lrint (*)
  5cbe235... rs6000: enable SImode in FP register on P7 (*)
  6f28992... s390: Make use of new copysign RTL (*)
  86d92c8... [i386] APX EGPR: fix missing patterns that prohibit egpr (*)
  00c67d6... Daily bump. (*)
  0a0ceb7... libcpp: eliminate LINEMAPS_{ORDINARY,MACRO}_MAPS (*)
  45bae18... libcpp: eliminate LINEMAPS_{,ORDINARY_,MACRO_}CACHE (*)
  a73c80d... libcpp: eliminate LINEMAPS_LAST_ALLOCATED{,_ORDINARY,_MACRO (*)
  b365e9d... analyzer: improvements to out-of-bounds diagrams [PR111155] (*)
  1f68a3e... libcpp: eliminate COMBINE_LOCATION_DATA (*)
  25af7c1... libcpp: "const" and other cleanups (*)
  94caa6a... diagnostics: fix ICE on sarif output when source file is un (*)
  b4fc1ab... Support signbit/xorsign/copysign/abs/neg/and/xor/ior/andn f (*)
  91fdbd6... Support smin/smax for V2HF/V4HF (*)
  6a8edd5... Fortran/OpenMP: Fix handling of strictly structured blocks (*)
  3da32cc... rs6000: build constant via li/lis;rldic (*)
  8f1a70a... rs6000: build constant via li/lis;rldicl/rldicr (*)
  6e5f627... rs6000: build constant via lis;rotldi (*)
  25b9175... rs6000: build constant via li;rotldi (*)
  e067e89... [i386] Fix apx test fails on 32bit target (*)
  b20e59f... RISC-V: add static-pie support (*)
  f1ccee6... TEST: Fix XPASS of TSVC testsuites for RVV (*)
  752bfdb... RISC-V: Enable more tests of "vect" for RVV (*)
  df726a7... Daily bump. (*)
  3bfde22... aarch64: Enable Cortex-X4 CPU (*)
  066a43c... Revert "RISC-V: Add more run test for FP rounding autovec" (*)
  d77ee4a... [APX EGPR] Handle vex insns that only support GPR16 (5/5) (*)
  f15b6ee... [APX_EGPR] Handle legacy insns that only support GPR16 (4/5 (*)
  1328bb7... [APX EGPR] Handle legacy insns that only support GPR16 (3/5 (*)
  797b893... [APX EGPR] Handle legacy insns that only support GPR16 (2/5 (*)
  e4e8b60... [APX EGPR] Handle legacy insn that only support GPR16 (1/5) (*)
  f498864... [APX EGPR] Handle GPR16 only vector move insns (*)
  ccdc0f0... [APX EGPR] Map reg/mem constraints in inline asm to non-EGP (*)
  0793ee0... [APX EGPR] Add backend hook for base_reg_class/index_reg_cl (*)
  835951d... [APX EGPR] Add register and memory constraints that disallo (*)
  c9d5040... [APX EGPR] Add 16 new integer general purpose registers (*)
  e686416... [APX_EGPR] Initial support for APX_F (*)
  dfa15b4... [APX EGPR] middle-end: Add index_reg_class with insn argume (*)
  bc4466b... [APX EGPR] middle-end: Add insn argument to base_reg_class (*)
  7866984... RISC-V: Add more run test for FP rounding autovec (*)
  537d7a4... rs6000: use mtvsrws to move sf from si p9 (*)
  5f56b76... rs6000: optimize moving to sf from highpart di (*)
  a809a55... RISC-V: Bugfix for legitimize address PR/111634 (*)
  15c1530... RISC-V: Fix scan-assembler-times of RVV test case (*)
  0defa2a... Daily bump. (*)
  ce658ac... i386: Implement doubleword shift left by 1 bit using add+ad (*)
  2551e10... Makefile.tpl: disable -Werror for feedback stage [PR111663] (*)
  fa8c99c... i386: Split lea into shorter left shift by 2 or 3 bits with (*)
  c1bc751... RISC-V: const: hide mvconst splitter from IRA (*)
  837a12a... Docs: Minimally document standard C/C++ attribute syntax. (*)
  ddfa439... amdgcn: switch mov insns to compact syntax (*)
  eb239c7... amdgcn: silence warning (*)
  e0786ba... libgomp.texi: Document some of the device-memory routines (*)
  e77428a... MATCH: Fix infinite loop between `vec_cond(vec_cond(a,b,0), (*)
  171420f... ipa: Remove ipa_bits (*)
  00e167f... RISC-V: Use stdint-gcc.h in rvv testsuite (*)
  f05b68b... RISC-V: Update comments for FP rounding related autovec (*)
  6c44b95... Daily bump. (*)
  250dce2... RISC-V: Test memcpy inlined on riscv_v (*)
  0ee3266... Delete MALLOC_ABI_ALIGNMENT define from pa32-linux.h (*)
  7c0ae1a... libstdc++: [_GLIBCXX_INLINE_VERSION] Add missing symbols (*)
  56cbd50... Create a fast VRP pass (*)
  3303382... Add a dom based ranger for fast VRP. (*)
  480648c... Add outgoing range vector calcualtion API (*)
  043a6fc... ipa-utils: avoid uninitialized probabilities on ICF [PR1115 (*)
  604e76e... secpol: consistent indentation (*)
  2e08795... secpol: add grammatically missing commas / remove one exces (*)
  c6bff80... i386: Improve memory copy from named address space [PR11165 (*)
  e866d08... contrib: add mdcompact (*)
  a28f097... LibF7: Remove uses of attribute pure. (*)
  c4f05cb... LibF7: Use monic denominator polynomials to save a multipli (*)
  ebfd27e... sreal: Fix typo in function name (*)
  1f7295a... Revert "ipa: Self-DCE of uses of removed call LHSs (PR 1080 (*)
  0bda3f2... RISC-V: Remove @ of vec_series (*)
  92cf0cf... arc: Update tests predicates when using linux toolchain. (*)
  1daa0db... arc: Remove obsolete ccfsm instruction predication mechanis (*)
  f4d35da... arc: Remove '^' print punct character (*)
  728b470... arc: Update/remove ARC specific tests (*)
  e4b1940... arc: Remove unused/incomplete alignment assembly annotation (*)
  6dc4443... Fix SIMD call SLP discovery (*)
  b583a29... Avoid left around copies when value-numbering BBs (*)
  ffbd7c3... ipa/111643 - clarify flatten attribute documentation (*)
  bf2e66e... Daily bump. (*)
  4cac1d2... Add a GCC Security policy (*)
  4bf77db... libstdc++: Correctly call _string_types function (*)
  3ceb109... ARC: Split SImode shifts pre-reload on !TARGET_BARREL_SHIFT (*)
  f4e7bba... ARC: Correct instruction length attributes. (*)
  263369b... PR rtl-optimization/110701: Fix SUBREG SET_DEST handling in (*)
  d342c9d... libstdc++: _versioned_namespace is always non-None (*)
  83ec6e8... libstdc++: Define _versioned_namespace in xmethods.py (*)
  027a94c... options: Prevent multidimensional arrays [PR111664] (*)
  75e3773... libgomp.texi: Clarify that no other OpenMP context selector (*)
  64eb7b0... LoongArch: Replace UNSPEC_FCOPYSIGN with copysign RTL (*)
  64eeec2... match.pd: Avoid other build_nonstandard_integer_type calls  (*)
  7ab0126... match.pd: Fix up a ? cst1 : cst2 regression on signed bool  (*)
  84284e1... Fortran: Alloc comp of non-finalizable type not finalized [ (*)
  96557ee... Daily bump. (*)
  1c45319... c++: print source code in print_instantiation_partial_conte (*)
  645f2a7... RISC-V: Unescape chars in pr111566.f90 test (*)
  d8808c3... Don't use range_info_get_range for pointers. (*)
  5f18797... contrib/mklog.py: Fix issues reported by flake8 (*)
  ed8fe3b... ipa-modref: Fix dumping (*)
  14d0c50... ipa-sra: Allow IPA-SRA in presence of returns which will be (*)
  1be18ea... ipa: Self-DCE of uses of removed call LHSs (PR 108007) (*)
  7eb5ce7... Remove pass counting in VRP. (*)
  ec8e866... Return TRUE only when a global value is updated. (*)
  c44ca7c... diagnostics: add ctors to text_info; add m_ prefixes to fie (*)
  0988121... ARC: Use rlc r0,0 to implement scc_ltu (i.e. carry_flag ? 1 (*)
  3ca09d6... aarch64: Convert aarch64 multi choice patterns to new synta (*)
  9d31045... recog: Support space in "[ cons" (*)
  dd1091f... recog: Improve parser for pattern new compact syntax (*)
  41d1c9a... Daily bump. (*)
  269c259... Add hppa*-*-* to dg-error targets at line 5 (*)
  c542906... Require target lra in gcc.dg/pr108095.c (*)
  8ef36f6... Increase timeout factor for hppa*-*-* in gcc.dg/long_branch (*)
  594fe74... contrib: Update Darwin entries in config-list.mk (*)
  a70b158... Replace UNSPEC_COPYSIGN with copysign RTL (*)
  1408202... diagnostics: add diagnostic_output_format class (*)
  c5c565e... diagnostics: group together source printing fields of diagn (*)
  c64693f... diagnostics: fix missing init of set_locations_cb (*)
  0731889... Arm: Block predication on atomics [PR111235] (*)
  bada3c2... Revert "ifcvt: replace C++ sort with vec::qsort [PR109154]" (*)
  f2b23a5... AArch64: Fix scalar xorsign lowering (*)
  a35ab1c... rtl: relax validate_subreg to allow paradoxical subregs tha (*)
  1961058... ifcvt: replace C++ sort with vec::qsort [PR109154] (*)
  76547f4... testsuite, Darwin: Skip g++.dg/debug/dwarf2/pr85550.C (*)
  e465e5e... Fix profiledbootstrap poly_int fallout [PR111642] (*)
  9464e72... cpymem for RISC-V with v extension (*)
  e7a23bb... Daily bump. (*)
  5f3da48... Fix typo in add_options_for_riscv_v, add_options_for_riscv_ (*)
  86b2ffc... rtl-optimization/110939 Really fix narrow comparison of mem (*)
  e4a4b8e... RISC-V:Optimize the MASK opt generation (*)
  f416a3f... Make riscv_vector::legitimize_move adjust SRC in the caller (*)
  125781f... Daily bump. (*)
  04e772b... RISC-V: Use safe_grow_cleared for vector info [PR111649] (*)
  1e68150... gimple-match-head: Fix a pasto in function comment (*)
  09b5124... lowerbitint: Fix 2 bitint lowering bugs [PR111625] (*)
  9d249b7... vec.h: Uncomment static_assert (*)
  d6fe757... RISC-V: Add type attribute in *<optab>_not_const<mode> patt (*)
  6cc9904... Remove .PHONY targets when building .fda files during autop (*)
  87c0050... Daily bump. (*)
  c00fcbd... modula2: testsuite correction to m2date.mod (*)
  44efc74... Fix INSN costing and more zicond tests (*)
  4f1e537... RISC-V: Specify -mabi=lp64d in wredsum_vlmax.c testcase (*)
  895ec19... check_GNU_style.py: Skip .md square bracket linting (*)
  51d09e6... RISC-V: Replace not + bitwise_imm with li + bitwise_not (*)
  eaa41a6... Remove poly_int_pod (*)
  94e68ce... Testsuite, DWARF2: adjust regexp to match darwin output (*)
  0084cad... Merge branch 'gcc-mirror:master' into me/CI
  5f24087... modula2: iso library SysClock.mod and wrapclock.cc fixes. (*)
  0f184b4... Fix memory barrier patterns for pre PA8800 processors (*)
  a8b9c32... libstdc++: Fix handling of surrogate CP in codecvt [PR10897 (*)
  28adad7... libstdc++: Ensure active union member is correctly set (*)
  346f599... Harmonize headers between both dg-extract-results scripts (*)
  e40f330... vec.h: Guard most of static assertions for GCC >= 5 (*)
  a680274... Fortran: Free alloc. comp. in allocated coarrays only. (*)
  574cec4... aarch64: Improve on ldp-stp policies code structure. (*)
  962ca71... tree-optimization/111583 - loop distribution issue (*)
  59cda1f... use *_grow_cleared rather than *_grow on vect_unpromoted_va (*)
  7525707... ggc: do not wipe out unrelated data via gt_ggc_rtab [PR1115 (*)
  bcc97ed... Simplify & expand c_readstr (*)
  a561369... use *_grow_cleared rather than *_grow on vec<bitmap_head> (*)
  14c363c... Daily bump. (*)
  2028109... libstdc++: Use Python "not in" operator (*)
  860b284... libstdc++: Remove std_ratio_t_tuple (*)
  3384192... libstdc++: Remove unused locals from printers.py (*)
  bed1f84... libstdc++: Remove unused Python imports (*)
  64f1210... libstdc++: Use gdb.ValuePrinter base class (*)
  98db58e... libstdc++: Show full Python stack on error (*)
  17d3477... libstdc++: Refactor Python Xmethods to use is_specializatio (*)
  6b5c3f9... libstdc++: Reformat Python code (*)
  0ef4cc8... libstdc++: Format Python docstrings according to PEP 357 (*)
  918a691... modula2: Increase linking test timeouts for slower targets (*)
  2c1e354... libstdc++: Force _Hash_node_value_base methods inline to fi (*)
  8552dcd... Revert "[RA]: Improve cost calculation of pseudos with equi (*)
  d8b56c9... AArch64: Fix memmove operand corruption [PR111121] (*)
  88d8829... RISC-V: Support {U}INT64 to FP16 auto-vectorization (*)
  0c8ecbc... [RA]: Add flag for checking IRA in progress (*)
  f194c68... target/111600 - avoid deep recursion in access diagnostics (*)
  4f41d49... libgfortran: Use __builtin_unreachable() not -Wno-stringop- (*)
  73cd319... vec.h: Make some ops work with non-trivially copy construct (*)
  46595ce... Remove some unused poly_int variables (*)
  0d9b4e8... Daily bump. (*)
  88d79b9... tree-optimization/111614 - missing convert in undistribute_ (*)
  0fb176e... Replace riscv_vector with riscv_v in target selector clause (*)
  110ffb2... RISC-V: Bugfix for RTL check[PR111533] (*)
  1fab05a... libstdc++: Fix format string in StdChronoTimeZoneRulePrinte (*)
  0f205d0... OpenMP: GIMPLE_OMP_STRUCTURED_BLOCK bug fix (*)
  2ecab2f... Darwin, configure: Allow for an unrecognisable dsymutil [PR (*)
  834fc2b... aarch64: Fine-grained policies to control ldp-stp formation (*)
  b31218b... vect, omp: inbranch simdclone dropping const (*)
  f7d7e26... Simplify abs (copysign (x, y)) (*)
  d326bb6... Harden scan patterns with a bit of scripting: (*)
  3ba882c... remove workaround for GCC 4.1-4.3 [PR105606] (*)
  fcbbf15... RISC-V: Support FP roundeven auto-vectorization (*)
  073849d... DSE: Fix ICE when the mode with access_size don't exist on  (*)
  c00b6fe... ifcvt: Fix comments (*)
  4a15bb6... RISCV test infrastructure for d / v / zfh extensions (*)
  1c4ca59... RISC-V: Support FP trunc auto-vectorization (*)
  12039c9... Fix pr111456-1.c for targets that use unsigned char by defa (*)
  8e6757b... __atomic_test_and_set: Fall back to library, not non-atomic (*)
  dd0c42c... testsuite: Require thread-fence for 29_atomics/atomic_flag/ (*)
  a5f3985... RISC-V: Add zicond tests (*)
  c9dbace... Ensure ssa_name is still valid. (*)
  53daf67... PR modula2/111510 runtime ICE findChildAndParent has caused (*)
  e1e18ea... AArch64: Remove BTI from outline atomics (*)
  c3c6f30... MATCH: Simplify `(A ==/!= B) &/| (((cast)A) CMP C)` (*)
  68fa82e... PHIOPT: Fix minmax_replacement for three way (*)
  2774561... MATCH: Optimize COND_ADD reduction pattern (*)
  dd0197f... MATCH: Optimize COND_ADD_LEN reduction pattern (*)
  6e8a035... ada: Fix missing call to Finalize_Protection for simple pro (*)
  f6367fc... ada: Fix deferred constant wrongly rejected (*)
  a1c7807... ada: Fix unnesting generated loops with nested finalization (*)
  52a7e4c... ada: Crash processing the accessibility level of an actual  (*)
  2e135bd... ada: Fix missing finalization of extended return object on  (*)
  198e643... ada: Update personality function for CHERI purecap (*)
  0787c56... ada: Fix conversions between addresses and integers (*)
  8e8e3a0... ada: Add CHERI variant of System.Stream_Attributes (*)
  08ba004... ada: Define CHERI exception types (*)
  4a91264... ada: Make minor corrections to CUDA-related comments (*)
  3b426e2... ada: Dimensional analysis when used with elementary functio (*)
  9236169... ada: Clarify RM references that justify a constraint check (*)
  d324984... RISC-V: Support FP round auto-vectorization (*)
  31ef3fe... RISC-V/testsuite: Fix ILP32 RVV failures from missing <gnu/ (*)
  3b18fd2... Darwin: Handle -dynamiclib on cc1 lines. (*)
  1fab441... invoke.texi: Update -fopenmp and -fopenmp-simd for omp::dec (*)
  e4cf5f5... RISC-V: Support FP rint auto-vectorization (*)
  e2023d2... RISC-V: Support FP nearbyint auto-vectorization (*)
  c983744... RISC-V: Rename rounding const fp function for refactor (*)
  a435e4a... Daily bump. (*)
  3c23def... [PR111497][LRA]: Copy substituted equivalence (*)
  19df06f... Add missing return in gori_compute::logical_combine (*)
  bf3c199... libstdc++: Shorten integer std::to/from_chars symbol names (*)
  c92d330... Update baseline symbols for hppa-linux. (*)
  77cf377... libstdc++: Prevent unwanted ADL in std::to_array [PR111512] (*)
  55cf4f8... libstdc++: Define C++23 std::forward_like (P2445R1) (*)
  c25d6f1... LoongArch: doc: Update -m[no-]explicit-relocs for r14-4160 (*)
  2bbac12... Fix PR 110386: backprop vs ABSU_EXPR (*)
  9d5f20f... RISC-V: Fix AVL/VL bug of VSETVL PASS[PR111548] (*)
  a65b38e... rs6000: Skip empty inline asm in rs6000_update_ipa_fn_targe (*)
  266dfed... rs6000: Use default target option node for callee by defaul (*)
  39bab88... LoongArch: Optimizations of vector construction. (*)
  1eb80f7... Daily bump. (*)
  deb844c... RISC-V: Fix fortran ICE/PR111546 when RV32 vec_init (*)
  c23ce23... Fortran: Pad mismatched charlens in component initializers  (*)
  1bf0cd0... MATCH: Add `(X & ~Y) & Y` and `(X | ~Y) | Y` (*)
  08b887f... Daily bump. (*)
  e4aa1a4... RISC-V: Support full coverage VLS combine support (*)
  767eea9... fortran: error recovery on duplicate declaration of class v (*)
  d6679fa... d: Merge upstream dmd, druntime 4574d1728d, phobos d7e79f02 (*)
  59d27cc... testsuite: Add new test for already fixed PR111455 (*)
  648347b... RISC-V: Add VLS unary combine patterns (*)
  83441e7... RISC-V: Suport FP floor auto-vectorization (*)
  63f3c0f... RISC-V: Remove FP run test for ceil. (*)
  f72591c... Daily bump. (*)
  fd35d72... c++ __integer_pack conversion again [PR111357] (*)
  22cda0c... c++: constexpr and designated initializer (*)
  9c62af1... c++: unroll pragma in templates [PR111529] (*)
  4c49602... RISC-V: Refine the code gen for ceil auto vectorization. (*)
  190ba48... RISC-V: Add VLS mode widen ternary tests (*)
  dc607a0... RISC-V: Add VLS widen binary combine patterns (*)
  1fea14d... c++: missing SFINAE in grok_array_decl [PR111493] (*)
  6f902a4... c++: constraint rewriting during ttp coercion [PR111485] (*)
  cefd4ad... RISC-V: Move ceil test cases to unop folder (*)
  6eb55ca... RISC-V: Remove @ of vec_duplicate pattern (*)
  8a87ba0... RISC-V: Add VLS conditional patterns support (*)
  40ac613... RISC-V: Rename the test macro for math autovec test (*)
  0ed05db... RISC-V: Optimization of vrgather.vv into vrgatherei16.vv[PR (*)
  e446ed2... RISC-V: Remove arch and abi option for run test case. (*)
  5bc8c83... RISC-V: Support combine cond extend and reduce sum to widen (*)
  e99cdab... RISC-V: Split VLS avl_type from NONVLMAX avl_type (*)
  dba79ce... RISC-V: Leverage __builtin_xx instead of math.h for test (*)
  8bf5636... RISC-V: Support ceil and ceilf auto-vectorization (*)
  d35e12e... Daily bump. (*)
  1df81f0... RISC-V: Add VLS integer ABS support (*)
  29862e2... RISC-V: Add more VLS unary tests (*)
  94982a6... RISC-V: Support VLS mult high (*)
  5ff4431... RISC-V: Adjusting the comments of the emit_vlmax_insn/emit_ (*)
  7439f40... rust: Implement TARGET_RUST_OS_INFO for *-*-*linux*. (*)
  47c17c8... rust: Implement TARGET_RUST_OS_INFO for i[34567]86-*-mingw* (*)
  d184d3a... rust: Implement TARGET_RUST_OS_INFO for *-*-fuchsia*. (*)
  4a48f34... rust: Implement TARGET_RUST_OS_INFO for *-*-vxworks* (*)
  595d949... rust: Implement TARGET_RUST_OS_INFO for *-*-dragonfly* (*)
  17adf45... rust: Implement TARGET_RUST_OS_INFO for *-*-solaris2*. (*)
  07883d3... rust: Implement TARGET_RUST_OS_INFO for *-*-openbsd* (*)
  06d5c3c... rust: Implement TARGET_RUST_OS_INFO for *-*-netbsd* (*)
  57e2c3e... rust: Implement TARGET_RUST_OS_INFO for *-*-freebsd* (*)
  f23567a... rust: Implement TARGET_RUST_OS_INFO for *-*-darwin* (*)
  22e3557... rust: Implement TARGET_RUST_CPU_INFO for i[34567]86-*-* and (*)
  335da4e... rust: Reintroduce TARGET_RUST_OS_INFO hook (*)
  a7ea90e... rust: Reintroduce TARGET_RUST_CPU_INFO hook (*)
  b1c06fd... rust: Add skeleton support and documentation for targetrust (*)
  9b5b2c9... RISC-V: Enable undefined support for RVV auto-vectorization (*)
  38048fc... RISC-V: Fix SUBREG move of VLS mode[PR111486] (*)
  4d80863... check undefine_p for one more vr (*)
  d946fc1... using overflow_free_p to simplify pattern (*)
  47065ff... RISC-V: Optimized for strided load/store with stride == ele (*)
  4e35cf2... RISC-V: Rename predicate vector_gs_scale_operand_16/32 to m (*)
  66c1352... RISC-V: Support VLS INT <-> FP conversions (*)
  4907d22... Daily bump. (*)
  d8e08ba... testsuite: Add test for already-fixed issue with _Pragma ex (*)
  601dbf2... libcpp: Fix ICE on #include after a line marker directive [ (*)
  b512d70... Tweak merge_range API. (*)
  0a59ff6... aarch64: Ensure const and sign correctness (*)
  c08ffa0... RISC-V: Remove math.h import to resolve missing stubs failu (*)
  0bd9616... [frange] Remove special casing from unordered operators. (*)
  53d834a... c, c++: Accept __builtin_classify_type (typename) (*)
  27282dc... internal-fn: Support undefined rtx for uninitialized SSA_NA (*)
  75c4b0c... c++: improve class NTTP object pretty printing [PR111471] (*)
  915574e... c++: further optimize tsubst_template_decl (*)
  1a554a2... OpenMP: Add ME support for 'omp allocate' stack variables (*)
  b9cb735... RISC-V: Support simplifying x/(-1) to neg for vector. (*)
  b343978... RISC-V: Support VLS floating-point extend/truncate (*)
  c3d2b6b... RISC-V: Fix Demand comparison bug[VSETVL PASS] (*)
  2e36eed... Darwin: Move checking of the 'shared' driver spec. (*)
  daf175e... tree-optimization/111489 - raise --param uninit-max-chain-l (*)
  b8a2a12... tree-optimization/111489 - turn uninit limits to params (*)
  47ecac5... middle-end: use MAX_FIXED_MODE_SIZE instead of precidion of (*)
  264ff81... RISC-V: Reorganize and rename combine patterns in autovec-o (*)
  04b2fb5... openmp: Add omp::decl attribute support [PR111392] (*)
  d024a31... RISC-V: Fixed ICE caused by missing operand (*)
  80048aa... debug/111409 - don't generate COMDAT macro sections for spl (*)
  d64631f... testcase: rename pr111303.c to pr111324.c (*)
  bea89f7... RISC-V: Extend VLS modes in 'VWEXTI' iterator (*)
  677249a... ira: Consider save/restore costs of callee-save registers [ (*)
  c44926f... Modify gas uleb128 support test (*)
  9bab65a... LoongArch: Check whether binutils supports the relax functi (*)
  590a8be... Daily bump. (*)
  6c33fad... c++modules: report module mapper files as a dependency (*)
  ce1b47e... c++modules: report imported CMI files as dependencies (*)
  024f135... p1689r5: initial support (*)
  1e44764... spec: add a spec function to join arguments (*)
  5b554c5... RISC-V: Fix --enable-checking=rtl ICE on rv32gc bootstrap (*)
  7a4e57f... [frange] Clean up floating point relational folding. (*)
  4f52e61... c++: extend cold, hot attributes to classes (*)
  b991233... c++: fix cxx_print_type's template-info dumping (*)
  58ab382... Disable generation of scalar modulo instructions. (*)
  81d5ca0... PR 108143/modula2 LONGREAL and powerpc64le-linux (*)
  eec7c37... Fix bogus operand predicate on iq2000 (*)
  15acabb... fortran: fix checking of CHARACTER lengths in array constru (*)
  36eec79... [frange] Remove redundant known_isnan() checks. (*)
  cb3f870... Add frange::update_nan (const nan_state &). (*)
  9c739c9... [frange] Add op2_range for operator_not_equal. (*)
  d2f53a6... testsuite work-around compound-assignment-1.c C++ failures  (*)
  1560cc9... c++: inherited default constructor [CWG2799] (*)
  bf6b107... New early __builtin_unreachable processing. (*)
  6851e34... c++: Move consteval folding to cp_fold_r (*)
  f25960b... c/111468 - dump unordered compare operators in their GIMPLE (*)
  b510b83... c++: overeager type completion in convert_to_void [PR111419 (*)
  ddd064e... c++: constness of decltype of NTTP object [PR99631] (*)
  131c1df... RISC-V: Add FNMS floating-point VLS tests (*)
  c81d9b9... LTO: Get rid of 'lto_mode_identity_table' (*)
  e181742... RISC-V: Fix RVV can change mode class bug (*)
  0058886... ada: TSS finalize address subprogram generation for constra (*)
  eceb45b... ada: Private extensions with the keyword "synchronized" are (*)
  5b94524... RISC-V: Support VLS unary floating-point patterns (*)
  0472693... ada: Refine upper array bound for bit packed array (*)
  54c1682... ada: Crash processing type invariants on child subprogram (*)
  564ecb7... tree-optimization/111465 - bougs jump threading with no-cop (*)
  836e2cf... c/111468 - add unordered compare and pointer diff to GIMPLE (*)
  28569e7... RISC-V: Support VLS floating-point FMA/FNMA/FMS auto-vector (*)
  5c5851b... match.pd: Some build_nonstandard_integer_type tweaks (*)
  8e09480... RISC-V: Support integer FMA/FNMA VLS modes autovectorizatio (*)
  e16dee6... small _BitInt tweaks (*)
  1534598... libgomp: Handle NULL environ like pointer to NULL pointer [ (*)
  98c25cf... [testsuite][aarch64] Adjust vect_copy_lane_1.c for new code (*)
  95d2ce0... RISC-V: Refactor and cleanup fma patterns (*)
  7f4fc87... RISC-V: Fix typos on comments (SVE -> RVV) (*)
  f45cca2... RISC-V: Add builtin .def file dependencies (*)
  6b78e9a... Daily bump. (*)
  aad0c3e... RISC-V: Support VLS mode for vec_set (*)
  28f16f6... RISC-V: Bugfix for scalar move with merged operand (*)
  7ea501d... MATCH: Make zero_one_valued_p non-recursive fully (*)
  951d3c1... MATCH: Avoid recursive zero_one_valued_p for conversions (*)
  80968d5... c++: optimize unifying nested templated classes [PR89231] (*)
  6e92a6a... c++: non-dependent assignment checking [PR63198, PR18474] (*)
  a6ac1fc... c++: unifying identical tmpls from current inst [PR108347] (*)
  155178c... c++: always check arity before deduction (*)
  47346ac... Darwin,debug : Switch to DWARF 3 or 4 when dsymutil support (*)
  ce7a757... configure, Darwin: Adjust handing of stdlib option. (*)
  0940919... c++: optimize tsubst_template_decl for function templates (*)
  0fb828a... MATCH: Add simplifications of `(a == CST) & a` (*)
  0db5331... Move 'g++.dg/abi/nvptx-[...].C' -> 'g++.target/nvptx/abi-[. (*)
  ade81bb... Add 'g++.target/nvptx/nvptx.exp' for nvptx-specific C++ tes (*)
  3049501... Fix up 'g++.dg/abi/nvptx-ptrmem1.C' (*)
  00d16a2... libstdc++: Minor tweak to C++20 status docs (*)
  c8e9a75... libstdc++: Update C++20 and C++23 status docs (*)
  4260f4a... RISC-V: Remove redundant vec_duplicate pattern (*)
  bdb7d85... RISC-V: Fix bogus FAILs of vsetvl testcases (*)
  1b03c73... RISC-V: Removed misleading comments in testcases (*)
  fc70700... AArch64: Improve immediate expansion [PR105928] (*)
  64d5bc3... AArch64: List official cores before codenames (*)
  4ab744a... RISC-V: Add fixed PR111255 testcase by other patch (*)
  71e0f38... RISC-V: Support VLS reduction (*)
  12755fe... libstdc++: Minor update to installation docs (*)
  8fbc087... RISC-V: Fix VSETVL PASS fusion bug (*)
  79b34b9... MAINTAINERS: Add myself to write after approval (*)
  d45ddc2... tree-optimization/111294 - backwards threader PHI costing (*)
  1f9bf6f... RISC-V: Support VLS modes vec_init auto-vectorization (*)
  4e679b9... RISC-V: Remove autovec-vls.md file and clean up VLS move mo (*)
  fafd250... RISC-V: Support VLS modes reduction[PR111153] (*)
  93996cf... doc: GTY((cache)) documentation tweak (*)
  d5d4546... c++: overlapping subobjects tweak (*)
  5761dce... RISC-V: Remove redundant codes of VLS patterns[NFC] (*)
  55b22a6... use local range for one more pattern in match.pd (*)
  5b4acfa... Daily bump. (*)
  51f1287... Remove xfail from gcc.dg/tree-ssa/20040204-1.c (*)
  b34f8e7... rs6000: unnecessary clear after vctzlsbb in vec_first_match (*)
  68845f7... Daily bump. (*)
  8645130... RISC-V: Expand VLS mode to scalar mode move[PR111391] (*)
  9882b81... RISC-V: Make SHA-256, SM3 and SM4 builtins operate on uint3 (*)
  a175168... RISC-V: Make bit manipulation value / round number and shif (*)
  23224f0... RISC-V: Support FP SGNJX autovec for VLS mode (*)
  37bbfd1... Daily bump. (*)
  0ff3121... libstdc++: Do not require effective target pthread for some (*)
  8ccae16... libstdc++: Remove dg-options "-std=gnu++20" from remaining  (*)
  4be56e2... libstdc++: Remove dg-options "-std=gnu++20" from 30_threads (*)
  f1b06f5... libstdc++: Remove dg-options "-std=gnu++20" from 27_io test (*)
  bb2dd76... libstdc++: Remove dg-options "-std=gnu++20" from 26_numeric (*)
  762baaf... libstdc++: Remove dg-options "-std=gnu++20" from 24_iterato (*)
  b9a2dce... libstdc++: Remove dg-options "-std=gnu++20" from 23_contain (*)
  d8c446a... libstdc++: Remove dg-options "-std=gnu++20" from 21_strings (*)
  6d0b43f... libstdc++: Remove dg-options "-std=gnu++20" from 20_utils t (*)
  771752c... libstdc++: Remove dg-options "-std=gnu++20" from <compare>  (*)
  1b13c42... libstdc++: Remove dg-options "-std=gnu++20" from <atomic> t (*)
  6693bd9... libstdc++: Add missing tests for std::basic_filebuf::native (*)
  c4baeae... libstdc++: Implement C++26 native handles for file streams  (*)
  a923c52... libstdc++: Add log line to testsuite output (*)
  8cd5e57... libstdc++: Simplify dejagnu directives for some tests using (*)
  ed8fcd0... libstdc++: Remove dg-options "-std=gnu++2a" from XFAIL std: (*)
  7810fb3... libstdc++: Remove dg-options "-std=gnu++23" from remaining  (*)
  5188b40... libstdc++: Remove dg-options "-std=gnu++23" from std::expec (*)
  41cd9d4... libstdc++: Remove dg-options "-std=gnu++20" from std::chron (*)
  4c0fbba... libstdc++: Remove dg-options "-std=gnu++20" from std::forma (*)
  7dbb691... libstdc++: Remove dg-options "-std=gnu++2a" from constraine (*)
  d4ac20b... libstdc++: Remove dg-options "-std=gnu++20" from <concepts> (*)
  5d06672... libstdc++: Remove dg-options "-std=c++20" from <span> and < (*)
  07c602b... libstdc++: Replace dg-options "-std=c++20" with dg-add-opti (*)
  c4bf6e8... libstdc++: Replace dg-options "-std=c++17" with dg-add-opti (*)
  52841fb... libstdc++: Replace dg-options "-std=c++11" with dg-add-opti (*)
  3a0e01f... libstdc++: Add support for running tests with multiple -std (*)
  038c0af... libstdc++: Fix 29_atomics/headers/atomic/types_std_c++2a_ne (*)
  d7b6020... fix PR 111259 invalid zcmp mov predicate. (*)
  fd5a858... libstdc++: Use C++20 constraints in <bit> (*)
  b09193f... analyzer: support diagnostics that don't have a stmt (*)
  759a1a5... analyzer: introduce pending_location (*)
  6319b5b... analyzer: handle volatile ops (*)
  1cbf189... Fortran: improve bounds-checking for array sections [PR3080 (*)
  b975c0d... MATCH: Improve zero_one_valued_p for cases without range in (*)
  ba4c1f2... MATCH: Fix `(1 >> X) != 0` pattern for vector types (*)
  76a2d56... Always do PHI analysis and before loop analysis. (*)
  c43bd87... Fix indentation. (*)
  4aca1cf... Fix PR111407--SSA corruption due to widening_mul opt on con (*)
  540a1d9... ada: Fix minor glitch in finish_record_type (*)
  d9275e8... ada: Explicitly analyze and expand null array aggregates (*)
  b96446e... ada: Fix wrong optimization of extended return for discrimi (*)
  2578936... ada: Do not perform local-exception-to-goto optimization on (*)
  62e170e... ada: Generate runtime restrictions list when the standard l (*)
  140e20f... ada: Fix internal error on misaligned component with variab (*)
  ab246c1... ada: Fix internal error on aggregate nested in container ag (*)
  ee88062... ada: Remove GNAT Pro details regarding mold (*)
  ef49cc3... ada: Fix internal error on expression function with Refined (*)
  553c37b... ada: Clean up scope depth and related code (tech debt) (*)
  545af80... ada: Crash on creation of extra formals on type extension (*)
  dd6e5d2... RISC-V: Fix using wrong mode to get reduction insn vlmax (*)
  e6dba70... fortran: Remove reference count update [PR108957] (*)
  b259284... test: Block SLP check of slp-35.c for vect_strided5 (*)
  5c7c359... test: Block SLP check of slp-34.c for vect_strided5 (*)
  16c5d0f... test: Block vect_strided5 for slp-34-big-array.c SLP check (*)
  9b80311... test: Block slp-16.c check for target support vect_strided6 (*)
  0854ebe... test: Isolate slp-1.c check of target supports vect_strided (*)
  e1ec05b... test: Remove XPASS for RISCV (*)
  e6413b5... RISC-V: Refactor expand_reduction and cleanup enum reductio (*)
  5daeda5... libstdc++: Fix constraints for std::variant default constru (*)
  d19bdf8... libstdc++: Remove non-void static assertions in variant's s (*)
  8fa1430... libstdc++: Add operator bool to <charconv> result types (P2 (*)
  2d38f45... aarch64: Fix loose ldpstp check [PR111411] (*)
  227b18f... LoongArch: Reimplement multilib build option handling. (*)
  68cb873... RISC-V: Support combine extend and reduce sum to widen redu (*)
  05cb873... Daily bump. (*)
  3a1e9f3... diagnostics: support multithreaded diagnostic paths (*)
  59f6185... analyzer: fix missing return in compatible_epath_p (*)
  8878f7a... analyzer: use unique_ptr for rejected_constraint (*)
  eaa8e85... ggc, jit: forcibly clear GTY roots in jit (*)
  d8b4d6c... modula2: Add missing comments to M2CaseList.mod and add tes (*)
  fd948fd... gcc: xtensa: use salt/saltu in xtensa_expand_scc (*)
  4e1c5d5... modula2: introduce case checking when switching on subrange (*)
  3c834d8... [RA]: Improve cost calculation of pseudos with equivalences (*)
  6223ea7... RISC-V: Refactor vector reduction patterns (*)
  14c481f... RISC-V: Cleanup redundant reduction patterns after refactor (*)
  c8e4f0d... aarch64: Restore SVE WHILE costing (*)
  5e4a248... MATCH: Support `(a != (CST+1)) & (a > CST)` optimizations (*)
  4241415... Improve error message for if with an else part while in swi (*)
  8ebb02d... RISC-V: Support VLS modes mask operations (*)
  557a858... libstdc++: Add testcase for std::make_integer_sequence bug  (*)
  9da3c93... libstdc++: Support dg-additional-files in tests (*)
  b9b9d0a... libstdc++: Remove some more unconditional uses of atomics (*)
  8517317... ada: Improve detection of deactivated code for warnings wit (*)
  fa16e32... ada: Assertion failure on expansion of record with invarian (*)
  6123146... ada: Assertion failure on calculation of Large_Max_Size_Mut (*)
  1f68777... ada: Assertion failure on for-of loop iterating on selected (*)
  f8f05af... ada: Fix late finalization for function call in delta aggre (*)
  c3e9511... ada: Fix premature finalization in loop over limited iterab (*)
  deb34fa... ada: Assertion failure adding extra formals to late overrid (*)
  9ea74d2... tree-optimization/111294 - better DCE after forwprop (*)
  0f1f6cf... aarch64: Coerce addresses to be suitable for LD1RQ (*)
  62b2934... libstdc++: Add dg-require-thread-fence in several tests (*)
  53ad1bd... RISC-V: Fix ICE in get_avl_or_vl_reg (*)
  7c4f6eb... RISC-V: Format VSETVL PASS code (*)
  3acf7e9... LoongArch: Change the value of branch_cost from 2 to 6. (*)
  5079b62... libstdc++: Limit <stacktrace> synopsis test to normal names (*)
  1d17d58... xtensa: Optimize several boolean evaluations of EQ/NE again (*)
  9a033b9... LoongArch: Fix bug of '<optab>di3_fake'. (*)
  f9edfaf... LoongArch: Add tests for ASX vector xvssran/xvssrani/xvssra (*)
  c66bc0f... LoongArch: Add tests for ASX vector xvssrln/xvssrlni/xvssrl (*)
  2b1c3bb... LoongArch: Add tests for ASX vector xvpackev/xvpackod/xvpic (*)
  1855610... LoongArch: Add tests for ASX vector xvext2xv/xvexth/xvextin (*)
  0ff53d6... LoongArch: Add tests for ASX vector xvfcmp{saf/seq/sle/slt/ (*)
  522fdeb... LoongArch: Add tests for ASX vector xvfcmp{caf/ceq/cle/clt/ (*)
  ea08f0c... LoongArch: Add tests for ASX vector xvabsd/xvavg/xvavgr/xvb (*)
  804e9d9... LoongArch: Add tests for ASX vector xvfnmadd/xvfrstp/xvfstp (*)
  e2f9184... LoongArch: Add tests for ASX vector comparison and selectio (*)
  70784a0... LoongArch: Add tests for ASX vector floating-point conversi (*)
  681fc4a... LoongArch: Add tests for ASX vector floating-point operatio (*)
  efba540... LoongArch: Add tests for ASX xvldrepl/xvstelm instruction g (*)
  5ee9b28... LoongArch: Add tests for ASX builtin functions. (*)
  0c7953b... LoongArch: Add tests for ASX vector xvbitclr/xvbitclri/xvbi (*)
  317d457... LoongArch: Add tests for ASX vector xvextl/xvsra/xvsran/xvs (*)
  fdf2eaf... LoongArch: Add tests for ASX vector xvsll/xvsrl instruction (*)
  149cbe1... LoongArch: Add tests for ASX vector xvand/xvandi/xvandn/xvo (*)
  1242b26... LoongArch: Add tests for ASX vector xvldi/xvmskgez/xvmskltz (*)
  610d41f... LoongArch: Add tests for ASX vector xvmax/xvmaxi/xvmin/xvmi (*)
  5f23cd2... LoongArch: Add tests for ASX vector xvmul/xvmod/xvdiv instr (*)
  46af903... LoongArch: Add tests for ASX vector subtraction instruction (*)
  1e35905... LoongArch: Add tests for ASX vector xvhadd/xvhaddw/xvmaddwe (*)
  753e6cd... LoongArch: Add tests for ASX vector xvadd/xvadda/xvaddi/xva (*)
  a34a87a... LoongArch: Add tests for SX vector vfmadd/vfnmadd/vld/vst i (*)
  574c88e... LoongArch: Add tests for SX vector vand/vandi/vandn/vor/vor (*)
  8748683... LoongArch: Add tests for SX vector handling and shuffle ins (*)
  8350311... LoongArch: Add tests for SX vector vfcmp instructions. (*)
  5591e6c... LoongArch: Add tests for SX vector vfrstp/vfrstpi/vseq/vseq (*)
  b3a02ee... LoongArch: Add tests for SX vector floating point arithmeti (*)
  c232cc0... LoongArch: Add tests for SX vector vbitclr/vbitclri/vbitrev (*)
  765ef95... LoongArch: Add tests for SX vector vssran/vssrani/vssrarn/v (*)
  c05d87a... LoongArch: Add tests for SX vector vrotr/vrotri/vsra/vsrai/ (*)
  dbd116b... LoongArch: Add tests for SX vector vsll/vslli/vsrl/vsrli/vs (*)
  9a6a540... LoongArch: Add tests for SX vector vdiv/vmod instructions. (*)
  05da72b... LoongArch: Add tests for SX vector vabsd/vmskgez/vmskltz/vm (*)
  d51ce9e... LoongArch: Add tests for SX vector vexth/vextl/vldi/vneg/vs (*)
  ff36ca4... LoongArch: Add tests for SX vector vmax/vmaxi/vmin/vmini in (*)
  d19f156... LoongArch: Add tests for SX vector vavg/vavgr instructions. (*)
  185ee8a... LoongArch: Add tests for the SX vector multiplication instr (*)
  8bdfb8f... LoongArch: Add tests for SX vector addition vsadd instructi (*)
  f2a3d9b... LoongArch: Add tests for SX vector subtraction instructions (*)
  f8896c1... LoongArch: Add tests for SX vector addition instructions. (*)
  9225e5b... LoongArch: Add tests for SX vector floating-point instructi (*)
  d1c0a3b... LoongArch: Add tests for Loongson SX builtin functions. (*)
  a53d713... LoongArch: Add testsuite framework for Loongson SX/ASX. (*)
  4fedd6b... LoongArch: Add tests of -mstrict-align option. (*)
  ef701ef... Daily bump. (*)
  9245629... libstdc++: [_GLIBCXX_INLINE_VERSION] Fix <format> friend de (*)
  3af2af1... modula2: -Wcase-enum detect singular/plural and use switch  (*)
  d03773c... RISC-V: Support VLS modes VEC_EXTRACT auto-vectorization (*)
  4a937fa... MATCH: Move `X <= MAX(X, Y)` before `MIN (X, C1) < C2` patt (*)
  06bedc3... MATCH: [PR111364] Add some more minmax cmp operand simplifi (*)
  635a34e... MATCH: Simplify `(X % Y) < Y` pattern. (*)
  0423861... tree-optimization/111387 - BB SLP and irreducible regions (*)
  c0a70df... RISC-V: Support cond vmulh.vv and vmulu.vv autovec patterns (*)
  842e4d5... RISC-V: Support cond vnsrl/vnsra autovec patterns (*)
  6737a51... RISC-V: Support cond vfsgnj.vv autovec patterns (*)
  92ea12e... tree-optimization/111397 - missed copy propagation involvin (*)
  feb23a3... RISC-V: Bugfix PR111362 for incorrect frm emit (*)
  20268ad... RISC-V: Remove redundant ABI test (*)
  8d8bc56... Checking undefined_p before using the vr (*)
  a1c2015... Daily bump. (*)
  fcf66bc... RISC-V: Enable vec_int testsuite for RVV VLA vectorization (*)
  701b930... RISC-V: Support VECTOR BOOL vcond_mask optab[PR111337] (*)
  08dfde5... libgo: fix DejaGNU testsuite compiler when using build sysr (*)
  f73d2d6... c++: __integer_pack with class argument [PR111357] (*)
  ea5abbb... c++: ICE with -fno-exceptions and array init [PR107198] (*)
  27e2e7c... math-opts: Add dbgcounter for FMA formation (*)
  2e36c4a... MAINTAINERS: Add myself to write after approval (*)
  360c8ca... RISC-V: Finish Typing Un-Typed Instructions and Turn on Ass (*)
  52f65d1... libstdc++: Fix std::not_fn perfect forwarding [PR111327] (*)
  4289f6c... libstdc++: Fix std::bind_front perfect forwarding [PR111327 (*)
  f1e87ae... libstdc++: Remove std::bind_front specialization for no bou (*)
  3e4afea... aarch64: Make stack smash canary protect saved registers (*)
  2abfc86... aarch64: Remove below_hard_fp_saved_regs_size (*)
  5ce9574... aarch64: Explicitly record probe registers in frame info (*)
  f87028a... aarch64: Simplify probe of final frame allocation (*)
  fee0a18... aarch64: Put LR save probe in first 16 bytes (*)
  1785b80... aarch64: Tweak stack clash boundary condition (*)
  ee5466f... aarch64: Minor initial adjustment tweak (*)
  bc9dcdd... aarch64: Simplify top of frame allocation (*)
  67a36b6... aarch64: Measure reg_offset from the bottom of the frame (*)
  492b606... aarch64: Tweak frame_size comment (*)
  ed61c87... aarch64: Rename hard_fp_offset to bytes_above_hard_fp (*)
  28034db... aarch64: Rename locals_offset to bytes_above_locals (*)
  aa8b57e... aarch64: Only calculate chain_offset if there is a chain (*)
  3869896... aarch64: Tweak aarch64_save/restore_callee_saves (*)
  99305f3... aarch64: Add bytes_below_hard_fp to frame info (*)
  7b792ec... aarch64: Add bytes_below_saved_regs to frame info (*)
  c601c91... aarch64: Explicitly handle frames with no saved registers (*)
  f9ab771... aarch64: Avoid a use of callee_offset (*)
  76d89da... aarch64: Use local frame vars in shrink-wrapping code (*)
  895e476... MATCH: Simplify (a CMP1 b) ^ (a CMP2 b) (*)
  75f069a... RISC-V: Remove unused structure in cost model (*)
  df63338... contrib: Quote variable in test expression [PR111360] (*)
  e085592... libstdc++: Format Python code according to PEP8 (*)
  af6d089... RISC-V: Support Dynamic LMUL Cost model (*)
  b24fd3b... fold-const: Handle BITINT_TYPE in range_check_type (*)
  6067dbd... sccvn: Avoid ICEs on _BitInt load BIT_AND_EXPR mask [PR1113 (*)
  89b5866... modula2: new option -Wcase-enum and associated fixes (*)
  5600412... nvptx: stack size limits are relevant for execution only (*)
  949f1cc... riscv: Add support for str(n)cmp inline expansion (*)
  df48285... riscv: Add support for strlen inline expansion (*)
  fb5d27b... libgomp: Consider '--with-build-sysroot=[...]' for target l (*)
  d1bff1b... Pass 'SYSROOT_CFLAGS_FOR_TARGET' down to target libraries [ (*)
  27144cc... OpenMP (C only): For 'omp allocate', really walk tree for ' (*)
  5e19f89... RISC-V: Add missed cond autovec testcases (*)
  537e2cc... nvptx 'TARGET_USE_LOCAL_THUNK_ALIAS_P', 'TARGET_SUPPORTS_AL (*)
  5041023... testsuite: Port 'check-function-bodies' to nvptx (*)
  b9cbd1a... fortran: Undo new symbols in all namespaces [PR110996] (*)
  35f498d... OpenMP (C only): omp allocate - extend parsing support, imp (*)
  b90a4c3... RISC-V: Elimilate warning in class vcreate (*)
  26da197... c: reorganize recursive type checking (*)
  c1e4efd... RISC-V: Add vcreate intrinsics for RVV tuple types (*)
  721021a... RISC-V: enable muti push and pop for Zcmp when shrink-wrap- (*)
  66d89a4... Allow targets to check shrink-wrap-separate enabled or not (*)
  fb4b53d... Daily bump. (*)
  fbd72a2... PR modula2/111330 Bootstrap failure building SeqFile.lo (*)
  8fdf712... MATCH: [PR111348] add missing :c to cmp in the `(a CMP b) ? (*)
  048927e... i386: Handle CONST_WIDE_INT in output_pic_addr_const [PR111 (*)
  316d57d... RISC-V: Add Types to Un-Typed Thead Instructions (*)
  25c3004... RISC-V: Update Types for RISC-V Instructions (*)
  4074aed... RISC-V: Add Types to Un-Typed Zicond Instructions (*)
  d8751d9... RISC-V: Add Types for Un-Typed zc Instructions (*)
  aa512cc... RISC-V: Update Types for Vector Instructions (*)
  a98d821... s390: Fix some builtin definitions (*)
  248df13... s390: Fix builtins vec_rli and verll (*)
  4a2766e... libstdc++: Remove unconditional use of atomics in Debug Mod (*)
  c7db900... libstdc++: Move __glibcxx_assert_fail to its own file (*)
  286655d... libstdc++: Define _GLIBCXX_USE_BUILTIN_TRAIT (*)
  af91934... gccrs: move functions from rust-gcc-diagnostics to rust-dia (*)
  b59e9de... MATCH: [PR111349] add missing :c to cmp in the `(a CMP CST1 (*)
  f1dd83b... libstdc++: Formatting std::thread::id and std::stacktrace ( (*)
  88a0a88... RISC-V: Enable RVV scalable vectorization by default[PR1113 (*)
  390fa3a... libstdc++: Fix -Wunused-parameter warnings (*)
  5c3c049... contrib: Check if getent is available in git setup script [ (*)
  48d4ab6... RISC-V: Remove redundant functions (*)
  6f7f728... pretty-print: Fix up pp_wide_int [PR111329] (*)
  7f9083f... RISC-V: Use dominance analysis in global vsetvl elimination (*)
  d05aac0... RISC-V: Add VLS modes VEC_PERM support[PR111311] (*)
  4ab2520... RISC-V: Add missing VLS mask bool mode reg -> reg patterns (*)
  190cf0c... MATCH: [PR111346] `X CMP MINMAX` pattern missing :c on CMP (*)
  f197392... Remove constraint modifier % for fcmaddcph/fmaddcph/fcmulcp (*)
  da4deff... Daily bump. (*)
  1087790... RISC-V: Expand fixed-vlmax/vls vector permutation in target (*)
  e390872... RISC-V: Avoid unnecessary slideup in compress pattern of ve (*)
  30e6ee0... Fix PR 111331: wrong code for `a > 28 ? MIN<a, 28> : 29` (*)
  5b33b36... Darwin: Partial reversion of r14-3648 (Inits Section). (*)
  0d50fac... RISC-V: Fix dump FILE of VSETVL PASS[PR111311] (*)
  a467cfd... Daily bump. (*)
  50b5199... analyzer: Move gcc.dg/analyzer tests to c-c++-common (2) [P (*)
  1ea7130... fortran: Remove redundant tree walk to delete element (*)
  ce5e2db... LoongArch: Fix up memcpy-vec-3.c test case (*)
  f83d6fc... LoongArch: Optimized multiply instruction generation. (*)
  c0bb7a6... LoongArch: Slightly simplify loongarch_block_move_straight (*)
  35adc54... LoongArch: Use LSX and LASX for block move (*)
  df9a253... RISC-V: Fix VLS floating-point operations predicate (*)
  7547f65... Support folding min(poly,poly) to const (*)
  fd0b952... Daily bump. (*)
  67761b3... [frange] Revert relation handling in LTGT_EXPR. (*)
  d9926c0... testsuite: adjust for darwin linker warning (*)
  b96b554... libstdc++: Add Filesystem TS and std::stacktrace symbols to (*)
  1a0c6de... libstdc++: Fix unconditional -Werror in libbacktrace direct (*)
  67009f1... libstdc++: Reduce output of 'make check' (*)
  2154bcd... c++: refine CWG 2369 satisfaction vs non-dep convs [PR99599 (*)
  d8bdc97... riscv: xtheadbb: Fix extendqi<SUPERQI> insn (*)
  0e25761... riscv: thead: Fix mode attribute for extension patterns (*)
  478c37e... Update contrib + libgomp ChangeLogs for failed reject-commi (*)
  f3ba571... LoongArch: Enable -fsched-pressure by default at -O1 and hi (*)
  d07682d... LoongArch: Fix unintentional bash-ism in r14-3665. (*)
  62a550e... LoongArch: Adjust C++ multilib header layout. (*)
  109c11f... Daily bump. (*)
  0c37fef... riscv: bitmanip: Remove duplicate zero_extendhi<GPR:mode>2  (*)
  5ead44d... Revert "libstdc++: Use GLIBCXX_CHECK_LINKER_FEATURES for cr (*)
  a0e042d... RISC-V: Suppress bogus warning for VLS types (*)
  f9cb357... RISC-V: Fix incorrect nregs calculation for VLS modes (*)
  daaed75... Support vpermw/vpermi2w/vpermt2w instructions for vector HF (*)
  1b761fe... analyzer: basic support for computed gotos (PR analyzer/110 (*)
  7ece864... [irange] Fix typo in contains_zero_p. (*)
  7d2274b... analyzer: Call off a superseding when diagnostics are unrel (*)
  18f1f79... analyzer: fix -Wunused-parameter warnings (*)
  cf2ae3f... Some ssa-names get incorrectly marked as always_current. (*)
  ab4bdad... OpenMP: Fix ICE in fixup_blocks_walker [PR111274] (*)
  64fad6a... libstdc++: Update docbook xsl URI (*)
  09c2815... libstdc++: Fix 'doc-install-info' rule (*)
  3b1b24f... libstdc++: Simplify dejagnu target selector (*)
  bd3d7e1... libstdc++: Remove trailing whitespace from dejagnu files (*)
  5435449... libstdc++: Add autoconf checks for mkdir, chmod, chdir, and (*)
  d295a53... libstdc++: Disable <stacktrace> support by default for avr (*)
  971f119... libgomp.texi: Fix ICV var name, document some memory manage (*)
  f7bca44... [LRA]: Don't reuse chosen insn alternative with special mem (*)
  6aba1fa... RISC-V: Add VLS mask modes mov patterns (*)
  d22cd77... Revert: "Another revert test with a bogus hash" (*)
  1b0934b... Revert "contrib/gcc-changelog: Check whether revert-commit  (*)
  69e8318... contrib/gcc-changelog: Check whether revert-commit exists (*)
  fbbd900... Revert "contrib/gcc-changelog: Check whether revert-commit  (*)
  ff20bce... contrib/gcc-changelog: Check whether revert-commit exists (*)
  1aee5d2... gccrs: Experiment with adding an error code to an error (*)
  1ad5ae5... diagnostics: add error_meta (*)
  18c90ea... middle-end: Avoid calling targetm.c.bitint_type_info inside (*)
  5b857e8... LoongArch: Use bstrins instruction for (a & ~mask) and (a & (*)
  b1ca841... libstdc++: Fix missing/misplaced { dg-options "-std=gnu++20 (*)
  f12e26f... libstdc++: Fix <ranges> tests that fail in C++23 (*)
  6854e3a... libstdc++: Simplify C++20 poison pill overloads (P2602R2) (*)
  faea9d9... libstdc++: Rename C++20 Customization Point Objects (*)
  9f41791... libstdc++: Relax range adaptors for move-only types (P2494R (*)
  8337337... libstdc++: Avoid -Wunused-parameter warning in testsuite he (*)
  10d59b8... lra: Avoid unfolded plus-0 (*)
  572abb5... RISC-V: Remove incorrect earliest vsetvl post optimization[ (*)
  af88776... RISC-V: Add support for 'XVentanaCondOps' reusing 'Zicond'  (*)
  a134b6c... Daily bump. (*)
  e4775af... -fgo-dump-spec: support _BitInt (*)
  6de5f5a... libstdc++: Disable <stacktrace> support by default for free (*)
  dab7163... cmd/go: permit $AR to include options (*)
  52e2aaa... Additional _BitInt test coverage [PR102989] (*)
  dce6f6a... Handle BITINT_TYPE in build_{,minus_}one_cst [PR102989] (*)
  3ad9948... _BitInt profile fixes [PR102989] (*)
  c62c82d... Add further _BitInt <-> floating point tests [PR102989] (*)
  f6e0ec5... libgcc _BitInt helper documentation [PR102989] (*)
  f76ae43... C _BitInt incremental fixes [PR102989] (*)
  a2f50aa... testsuite part 2 for _BitInt support [PR102989] (*)
  faff317... testsuite part 1 for _BitInt support [PR102989] (*)
  8c984a1... C _BitInt support [PR102989] (*)
  2ce182e... libgcc _BitInt support [PR102989] (*)
  7a610d4... libgcc: Generated tables for _BitInt <-> _Decimal* conversi (*)
  95521e1... ubsan: _BitInt -fsanitize=undefined support [PR102989] (*)
  b38deff... i386: Enable _BitInt on x86-64 [PR102989] (*)
  a9d6c7f... _BitInt lowering support [PR102989] (*)
  4f4fa25... Middle-end _BitInt support [PR102989] (*)
  6b96de2... RISC-V: Fix incorrect mode tieable which cause ICE in RA[PR (*)
  1b4c70d... RISC-V: Fix VSETVL PASS AVL/VL fetch bug[111295] (*)
  ee21f79... RISC-V: Remove unreasonable TARGET_64BIT for VLS modes with (*)
  f2d7a40... analyzer: implement kf_strstr [PR105899] (*)
  b51cde3... analyzer: implement kf_strncpy [PR105899] (*)
  b923978... analyzer: add ctxt to fill_region/zero_fill_region (*)
  0574a19... RISC-V: Fix incorrect folder for VRGATHERI16 test case (*)
  a4829dd... xtensa: Optimize boolean evaluation when SImode EQ/NE to ze (*)
  57d1c9c... riscv: xtheadbb: Fix xtheadbb-li-rotr test for rv32 (*)
  9ee40b9... RISC-V: Keep vlmax vector operators in simple form until sp (*)
  4abcc50... RISC-V: Part-3: Output .variant_cc directive for vector fun (*)
  fdd59c0... RISC-V: Part-2: Save/Restore vector registers which need to (*)
  94a4b93... RISC-V: Part-1: Select suitable vector registers for vector (*)
  80acabb... c: Don't pedwarn on _FloatN{,x} or {f,F}N{,x} suffixes for  (*)
  c1597e7... RISC-V: Add conditional sqrt autovec pattern (*)
  dbae784... c++: [[no_unique_address]] and cv-qualified type (*)
  254100a... RISC-V: typo: add closing paren to a comment (*)
  ce65641... RISC-V: Fix Zicond ICE on large constants (*)
  4388bc8... Daily bump. (*)
  102dd3e... riscv: Synthesize all 11-bit-rotate constants with rori (*)
  fbc0174... RISC-V: Expose bswapsi for TARGET_64BIT (*)
  ab28676... MATCH: Add `(x | c) & ~(y | c)` and `x & ~(y | x)` patterns (*)
  8e995e8... MATCH: Add pattern for `(x | y) & (x & z)` (*)
  e6bcf83... MATCH: `(nop_convert)-(convert)a` into -(convert)a if we ar (*)
  244d132... MATCH: Add `~MAX(~X, Y)` pattern: [PR96694] (*)
  b34f373... MATCH: Transform `(1 >> X) !=/== 0` into `X ==/!= 0` (*)
  b78cedc... c++: improve verify_constant diagnostic [PR91483] (*)
  decbf9e... RISC-V: Add Types to Un-Typed Risc-v Instructions (*)
  c85db60... RISC-V: Add Types to Un-Typed Pic Instructions (*)
  af5cb06... riscv: xtheadbb: Enable constant synthesis with th.srri (*)
  efafa66... c++: Diagnose [basic.scope.block]/2 violations even for blo (*)
  c249826... c++: Diagnose [basic.scope.block]/2 violations even in comp (*)
  e87212e... RISC-V: zicond: Fix opt2 pattern (*)
  5524389... OpenMP: Avoid ICE in c_parser_omp_clause_allocate with inva (*)
  b7f4745... aarch64: AARCH64_ISA_RCPC was defined twice (*)
  9922bfa... c++: more dummy non_constant_p arg avoidance (*)
  ad82d19... c++: use conversion_obstack_sentinel throughout (*)
  d820cd7... Daily bump. (*)
  d4ec3d5... LoongArch: Fix unintentionally breakage in r14-3665 (*)
  fba0f47... RISC-V: Emit .note.GNU-stack for non-linux target as well (*)
  a7b048c... RISC-V: Support FP SGNJ autovec for VLS mode (*)
  72b6397... LoongArch: Add Loongson ASX directive builtin function supp (*)
  bfcccf0... LoongArch: Add Loongson ASX base instruction support. (*)
  cc0457a... LoongArch: Add Loongson SX directive builtin function suppo (*)
  c9b4c79... LoongArch: Add Loongson SX base instruction support. (*)
  da4e06d... ada: Elide the copy in extended returns for nonlimited by-r (*)
  7f77d69... ada: Fix DWARF for certain arrays (*)
  10b4a45... ada: Remove redundant protection against empty list (*)
  4e61fc4... ada: Add guard before querying the type for its interfaces (*)
  e394afd... ada: Remove redundant guard against an empty list of interf (*)
  adb3b4d... ada: Fix problematic secondary stack management in protecte (*)
  d54e996... ada: Fix crash on selected component lookup in generic inst (*)
  9be6a69... ada: Fix spurious warning emissions (*)
  2f1cde4... ada: Fix assertion failure on very peculiar enumeration typ (*)
  ea271bd... ada: Remove TBC comment, no more needed (*)
  2aa1a92... ada: Crash on creation of extra formals on type extension (*)
  fd208cc... ada: Pass -msmp when linking for ppc-vx6 --RTS=rtp-smp (*)
  67138e0... ada: Crash on function returning empty Ada 2022 aggregate (*)
  9fc6f15... ada: Compiler hangs on invalid postcondition (*)
  bed3041... ada: Spurious warning about negative modular literal (*)
  46644c3... ada: Support setting task affinity on QNX (*)
  a5c1652... ada: building_executable_programs_with_gnat.rst: fix -gnatw (*)
  c416d2f... ada: Preserve capability validity in address arithmetic (*)
  518f93c... ada: Fix internal error on instantiation with private compo (*)
  f9a68b4... ada: Remove GNATcheck violations (*)
  17fcc7d... ada: Add missing units to Makefile.rtl (*)
  105891c... ada: Handle GNATcheck violations (*)
  8950360... ada: Enforce subtype conformance of interface primitives (*)
  eb7c56a... ada: Tweak comment about tasking corner case (*)
  83bb096... Revert "Adjust one Ada test" (*)
  509c10a... RISC-V: Export functions as global extern preparing for dyn (*)
  8451fbd... riscv: xtheadcondmov: Don't run tests with -Oz (*)
  1cf57a1... arc: Cleanup addsi3 instruction pattern (*)
  07f7615... arc: Remove obsolete mbbit-peephole option and unused patte (*)
  f47fcd2... tree-ssa-tail-merge: Fix a comment typo (*)
  137d623... LoongArch: initial ada support on linux (*)
  976f4f9... LoongArch: support loongarch*-elf target (*)
  18e2e58... LoongArch: add new configure option --with-strict-align-lib (*)
  f095da2... LoongArch: define preprocessing macros "__loongarch_{arch,t (*)
  bb4a819... LoongArch: improved target configuration interface (*)
  33066c9... Generate vmovsh instead of vpblendw for specific vec_merge. (*)
  6f94ef6... RISC-V: Fix Dynamic LMUL compile option (*)
  99ec76e... testsuite: Remove unwanted 'dg-do run' from gcc.dg/vect tes (*)
  084a7cf... Revert "libstdc++: Use GLIBCXX_CHECK_LINKER_FEATURES for cr (*)
  56d0592... libstdc++: Use GLIBCXX_CHECK_LINKER_FEATURES for cross-buil (*)
  f3f6ff7... mklog: handle Signed-off-by, minor cleanup (*)
  a338c5f... testsuite: aarch64: Adjust SVE ACLE tests to new generated  (*)
  270e702... libstdc++: Remove unnecessary dg-options and outdated comme (*)
  4559075... libstdc++: Remove dg-options "-std=c++98" from TR1 tests (*)
  678834e... libstdc++: Enable std::auto_ptr tests for C++11 and later (*)
  affbb7b... libstdc++: Fix filenames and comments in tests [PR26142] (*)
  4bbe141... libstdc++: Add { target c++98_only } to tests (*)
  0eb3509... libstdc++: Add explicit -std=gnu++98 to tests that use { ta (*)
  c34ad4b... libstdc++: Add missing target selector to std::expected tes (*)
  fe0f9e0... Add 'libgomp.c-c++-common/pr100059-1.c' (*)
  b3ab28c... Darwin, ppc: Add system stubs for all 32b PPC (*)
  68dc3e9... Darwin: Place global inits in the correct section. (*)
  0fe7962... Darwin: Match system sections and relocs for exception tabl (*)
  9018cd0... Darwin, machopic: Debug printer for macho symbol flags. (*)
  d99a868... RISC-V: Support FP16 for RVV VRGATHEREI16 intrinsic (*)
  1aceceb... Optimize '(X - N * M) / N' to 'X / N - M' if valid (*)
  8281307... LoongArch: Support storing floating-point zero into MEM[bas (*)
  ead6a14... LoongArch: Optimize switch with sign-extended index. (*)
  26aa5d9... LoongArch: Optimize fixed-point and floating-point conversi (*)
  124749a... Daily bump. (*)
  78f636d... Testsuite: fix contructor priority test (*)
  a7d052b... RISC-V: Support FP MAX/MIN autovec for VLS mode (*)
  9f48aba... Daily bump. (*)
  474473f... diagnostics: Delete config pointer before overwriting it (*)
  4e2d53c... LoongArch: Implement 128-bit floating point functions in gc (*)
  80907b0... Daily bump. (*)
  6f06152... Fortran: runtime bounds-checking in presence of array const (*)
  e7b2674... analyzer: Add support of placement new and improved operato (*)
  d3dd697... testsuite: Fix analyzer_cpython_plugin.c declarations, PR t (*)
  b0d75f7... libstdc++: Fix debug-mode tests for constexpr algorithms (*)
  e3d2518... libstdc++: Add -Wno-self-move to two filesystem tests (*)
  8d35b1a... c++: Move new test to 'opt' sub-directory (*)
  419c423... libstdc++: fix memory clobbering in std::vector [PR110879] (*)
  283994c... libstdc++: Use std::string::__resize_and_overwrite in std:: (*)
  dcbec95... libstdc++: Use a loop in atomic_ref::compare_exchange_stron (*)
  cd37325... c++: Fix up mangling of function/block scope static structu (*)
  c2d3211... testsuite: Fix vectcond-1.C FAIL on i686-linux [PR19832] (*)
  b8df57b... testsuite: Fix up pr110915* tests on i686-linux [PR110915] (*)
  258af9c... RISC-V: Add conditional autovec convert(INT<->FP) patterns (*)
  75a243c... RISC-V: Add conditional autovec convert(FP<->FP) patterns (*)
  a1e5fd2... RISC-V: Add conditional autovec convert(INT<->INT) patterns (*)
  4d1c8b0... RISC-V: Adjust expand_cond_len_{unary,binop,op} api (*)
  c07d82c... libstdc++: Use dg-require-filesystem-ts in link test (*)
  f2eb613... libstdc++: Avoid useless dependency on read_symlink from tz (*)
  fcede95... libstdc++: Make --enable-libstdcxx-backtrace=auto default t (*)
  5f2098c... RISC-V: Enable VECT_COMPARE_COSTS by default (*)
  ffbb19c... RISC-V: Add vec_extract for BI -> QI. (*)
  e40edf6... testsuite/vect: Make match patterns more accurate. (*)
  ef4e916... RISC-V: Add dynamic LMUL compile option (*)
  e5af77a... libstdc++: Fix how chrono::parse handles errors for time-of (*)
  207c507... libstdc++: Do not allow chrono::parse to overflow for %C [P (*)
  17a371d... libstdc++: Simplify __format::_Sink::_M_reset (*)
  ed60ffd... RISC-V: Support FP ADD/SUB/MUL/DIV autovec for VLS mode (*)
  3d86e7f... MATCH [PR19832]: Optimize some `(a != b) ? a OP b : c` (*)
  1967f21... LoongArch: Fix bug in loongarch_emit_stack_tie [PR110484]. (*)
  65c36ec... Daily bump. (*)
  16a2687... MATCH: extend min_value/max_value match to vectors (*)
  a335cf2... Darwin: homogenize spelling of macOS (*)
  af0c625... RISC-V: Support rounding mode for VFNMADD/VFNMACC autovec (*)
  a7cefea... RISC-V: Support rounding mode for VFNMSAC/VFNMSUB autovec (*)
  629efe2... aarch64: Fix return register handling in untyped_call (*)
  80277e1... rs6000: Update instruction counts to match vec_* calls [PR1 (*)
  6259624... RISC-V: Support rounding mode for VFMSAC/VFMSUB autovec (*)
  3e37e82... RISC-V: Support rounding mode for VFMADD/VFMACC autovec (*)
  e3ece76... middle-end/111253 - partly revert r11-6508-gabb1b6058c09a7 (*)
  0337555... RISC-V: Add vector_scalar_shift_operand (*)
  4da3065... RISC-V: Add Vector cost model framework for RVV (*)
  9ea1248... rs6000: Don't allow AltiVec address in movoo & movxo patter (*)
  e69d050... RISC-V: Change vsetvl tail and mask policy to default polic (*)
  b5900ad... Fix gcc.dg/tree-ssa/forwprop-42.c (*)
  79ab19b... RISC-V: Refactor and clean emit_{vlmax,nonvlmax}_xxx functi (*)
  9afdebb... Adjust gcc.target/i386/pr52252-{atom,core}.c (*)
  946b896... rs6000: call vector load/store with length only on 64-bit P (*)
  7ed0732... arc: Honor SWAP option for lsl16 instruction (*)
  68ec7d7... arm: Remove unsigned variant of vcaddq_m (*)
  15269a6... Refactor vector HF/BF mode iterators and patterns. (*)
  ac55f97... RISC-V: Fix vsetvl pass ICE (*)
  97442a0... Add overflow API for plus minus mult on range (*)
  ffb8568... Daily bump. (*)
  597b9ec... analyzer: implement reference count checking for CPython pl (*)
  4e1e875... Analyzer: include algorithm header (*)
  ee077d0... pru: Add cstore expansion patterns (*)
  4a92205... c++: CWG 2359, wrong copy-init with designated init [PR9131 (*)
  c121afc... c++: disallow constinit on functions [PR111173] (*)
  7f2ed06... tree-optimization/111228 - fix testcase (*)
  282c33c... test: Add xfail into slp-reduc-7.c for RVV VLA vectorizatio (*)
  5d34a42... test: Adapt slp-26.c check for RVV (*)
  d581504... fortran: Restore interface to its previous state on error [ (*)
  caa7a99... tree-optimization/111228 - combine two VEC_PERM_EXPRs (*)
  f7bff24... RISC-V: Remove movmisalign pattern for VLA modes (*)
  ece3884... test: Fix XPASS of RVV (*)
  586ca3d... test: Add xfail for riscv_vector (*)
  490bf0b... RISC-V: support cm.mva01s cm.mvsa01 in zcmp (*)
  b27d323... RISC-V: support cm.popretz in zcmp (*)
  3d1d313... RISC-V: support cm.push cm.pop cm.popret in zcmp (*)
  398842e... tree-ssa-strlen: Fix up handling of conditionally zero memc (*)
  49a3b35... store-merging: Fix up >= 64 bit insertion [PR111015] (*)
  0394184... middle-end: Apply MASK_LEN_LOAD_LANES/MASK_LEN_STORE_LANES  (*)
  a248e1c... RISC-V: Make arch-24.c to test "success" case (*)
  7accc62... RISC-V: Make sure we get VL REG operand for VLMAX vsetvl (*)
  260f743... RISC-V: Enable movmisalign for VLS modes (*)
  ded52c9... Daily bump. (*)
  94b950d... RISC-V: Use splitter to generate zicond in another case (*)
  034d99e... analyzer: new warning: -Wanalyzer-overlapping-buffers [PR99 (*)
  85ad41a... c++: tweaks for explicit conversion fns diagnostic (*)
  fce74ce... RISC-V: Added zvfh support for zfa extensions. (*)
  6e23440... RISC-V: generate builtin macro for compilation with strict  (*)
  29763b0... libgccjit: add support for `restrict` attribute on function (*)
  4b70c7c... RISC-V: Add Types to Un-Typed Vector Instructions (*)
  14a3839... rs6000, add overloaded DFP quantize support (*)
  f687fc1... analyzer: improve strdup handling [PR105899] (*)
  d16af3e... RISC-V: Fix one ICE for vect test vect-multitypes-5 (*)
  f30d6a4... RISC-V: Add stub support for existing extensions (unprivile (*)
  fea5442... RISC-V: Add stub support for existing extensions (vendor) (*)
  4053d29... RISC-V: Add stub support for existing extensions (privilege (*)
  8b06622... RISC-V: Make PR 102957 tests more comprehensive (*)
  b3176bd... RISC-V: Refactor and clean expand_cond_len_{unop,binop,tern (*)
  f224269... MAINTAINERS: Add myself to write after approval (*)
  a7aec76... tree-ssa-math-opts: Improve uaddc/usubc pattern matching [P (*)
  7c04da7... MATCH: Move `(x | y) & (~x ^ y)` over to use bitwise_invert (*)
  97aafa9... vect test: Remove xfail for riscv (*)
  acaf9e3... arm: Fix bootstrap / add missing initializer in MVE type_su (*)
  58a4878... RISC-V: Fix ASM check of vlmax_switch_vtype-16.c (*)
  818cc9f... RISC-V: Fix AVL/VL get ICE[VSETVL PASS] (*)
  973eb0d... RISC-V: Fix error combine of pred_mov pattern (*)
  ebffc84... mklog: fix bugs of --append option (*)
  88ae53a... LoongArch: Enable '-free' starting at -O2. (*)
  61dcc62... Daily bump. (*)
  cf64ab1... RISC-V: Fix documentation of __builtin_riscv_pause (*)
  c2d04dd... RISC-V: __builtin_riscv_pause for all environment (*)
  b7f9ee7... Fix cond-bool-2.c on powerpc and other targets (*)
  c3669bb... MATCH: Move `(X & ~Y) | (~X & Y)` over to use bitwise_inver (*)
  cbde03a... MATCH: Remove redundant pattern for `(x | y) & ~x` (*)
  6164adf... PHIOPT: Add dump for match and simplify and early phiopt (*)
  421cf61... RISC-V: Fix uninitialized probability for GIMPLE IR tests (*)
  e7b585a... RISC-V: Disable user vsetvl fusion into EMPTY or DIRTY (Pol (*)
  b52b09c... arm: [MVE intrinsics] rework vmullbq_poly vmulltq_poly (*)
  910249f... arm: [MVE intrinsics] add unspec_mve_function_exact_insn_vm (*)
  b06a800... arm: [MVE intrinsics] add binary_widen_poly shape (*)
  455d608... arm: [MVE intrinsics] add support for U and p formats in pa (*)
  9bae37e... arm: [MVE intrinsics] add support for p8 and p16 polynomial (*)
  ee1ec8e... arm: [MVE intrinsics] rework vmullbq_int vmulltq_int (*)
  dfd45e2... arm: [MVE intrinsics] add binary_widen shape (*)
  cf13ab5... arm: [MVE intrinsics] add unspec_mve_function_exact_insn_vm (*)
  195cc20... arm: [MVE intrinsics] factorize vmullbq vmulltq (*)
  3f142ab... arm: [MVE intrinsics] Remove dead check for float type in p (*)
  2357016... arm: [MVE intrinsics] fix binary_acca_int32 and binary_acca (*)
  979e0fb... [frange] Handle relations in LTGT_EXPR. (*)
  c28c579... LoongArch: Remove redundant sign extension instructions cau (*)
  1671ad9... RISC-V: Fix VSETVL test failures (*)
  9452178... Use vmaskmov{ps,pd} for VI48_128_256 when TARGET_AVX2 is no (*)
  e030af3... RISC-V: Refactor Phase 3 (Demand fusion) of VSETVL PASS (*)
  9cc5521... Daily bump. (*)
  3745feb... RISC-V: Fix spill-11.c testsuite failure (*)
  6567837... RISC-V: Fix spill-12 test (*)
  b3b13fb... RISC-V: Fix xtheadcondmov-indirect.c (*)
  55f6a7d... analyzer: Move gcc.dg/analyzer tests to c-c++-common (1) [P (*)
  7997f0d... Daily bump. (*)
  44bcb51... Fortran: Supply a missing dereference [PR92586] (*)
  e7545ca... RISC-V: Support LEN_FOLD_EXTRACT_LAST auto-vectorization (*)
  3e8db37... Fix phi-opt-34.c testcase (*)
  b886364... Daily bump. (*)
  df17751... RISC-V: Add Types to Un-Typed Sync Instructions: (*)
  e1f096a... RISC-V: Make stack_save_restore tests more robust (*)
  3cd2b73... [committed] RISC-V: Fix minor testsuite problem with zicond (*)
  30699b9... [PATCH v10] RISC-V: Add support for the Zfa extension (*)
  87f9b6c... OpenMP: Document support for imperfectly-nested loops. (*)
  b7c4a12... OpenMP: Fortran support for imperfectly-nested loops (*)
  410df08... OpenMP: New C/C++ testcases for imperfectly nested loops. (*)
  53891f1... OpenMP: C++ support for imperfectly-nested loops (*)
  143151a... OpenMP: C front end support for imperfectly-nested loops (*)
  a62c832... OpenMP: Add OMP_STRUCTURED_BLOCK and GIMPLE_OMP_STRUCTURED_ (*)
  b41d7eb... RISC-V: Enable Hoist to GCSE simple constants (*)
  d9a0d69... MATCH: Move `a ? one_zero : one_zero` matching after min/ma (*)
  6df8dce... MATCH: `a | C -> C` when we know that `a & ~C == 0` (*)
  4024ddb... Fortran: improve bounds checking for DATA with implied-do [ (*)
  54cc21e... fortran: Rename TRUE/FALSE to true/false in *.cc files (*)
  3339220... gcc: Rename TRUE/FALSE to true/false in *.cc files (*)
  99a3fcb... analyzer: fix ICE in text art strings support (*)
  845ee9c... tree-optimization/111137 - dependence checking for SLP (*)
  470da3b... Apply some TLC to vect_slp_analyze_instance_dependence (*)
  66be6ed... [frange] Relax floating point relational folding. (*)
  a739bac... tree-optimization/111136 - STMT_VINFO_SLP_VECT_ONLY and sto (*)
  449ab11... RISC-V: Add early continue for ENTRY and EXIT block (*)
  4a684e4... Refactor mode iterator V_128 and V_128H, V_256 and V_256H (*)
  3ea624d... RISC-V: Move vector-abi testcases into rvv/base folder (*)
  e62fe74... Fix avx512ne2ps2bf16 wrong code [PR 111127] (*)
  6d47c9b... Daily bump. (*)
  6dd73f0... i386: Optimize pinsrq of 0 with index 1 into movq [PR94866] (*)
  721f7e2... Fix tests for PR 106537. (*)
  bbdc0e0... analyzer: implement kf_strcat [PR105899] (*)
  2bad0ee... analyzer: handle strlen(BITS_WITHIN) [PR105899] (*)
  46cb27e... analyzer: handle INIT_VAL(ELEMENT_REG(STRING_REG), CONSTANT (*)
  d99d73c... analyzer: handle strlen(INIT_VAL(STRING_REG)) [PR105899] (*)
  8556d00... analyzer: reimplement kf_memcpy_memmove (*)
  603bdf9... analyzer: eliminate region_model::get_string_size [PR105899 (*)
  0ae07a7... analyzer: reimplement kf_strcpy [PR105899] (*)
  5ef89c5... analyzer: handle symbolic bindings in scan_for_null_termina (*)
  9aaec66... analyzer: add logging to impl_path_context (*)
  abf9151... tree-optimization/111123 - indirect clobbers thrown away to (*)
  0c78240... Check that passes do not forget to define profile (*)
  7564fe9... libstdc++: Add test for illegal pointer arithmetic in forma (*)
  dd4bdb9... libstdc++: fix illegal pointer arithmetic in format [PR1111 (*)
  d6271d6... libstdc++: Fix -Wunused-but-set-variable in std::format_to  (*)
  e64ad2c... libstdc++: Tweak some preprocessor conditions for feature t (*)
  c47430b... libstdc++: Implement new SI prefixes in <ratio> for C++23 ( (*)
  d96659e... Fix confusion about load_p in vect_build_slp_tree_1 (*)
  3d2e240... libstdc++: Add pretty printer for std::locale (*)
  701ce3c... libstdc++: Declutter std::optional and std:variant pretty p (*)
  a6303a0... Fix profile update in gimple-harden-conditionals.cc (*)
  1fbcae1... RISC-V: Add COND_LEN_FNMA/COND_LEN_FMS/COND_LEN_FNMS testca (*)
  a047513... RISC-V: Enable pressure-aware scheduling by default. (*)
  b6ba0cc... RISC-V: Allow const 17-31 for vector shift. (*)
  e7aec3a... RISC-V: Add missing conversion tests. (*)
  8c3146c... RISC-V: Fix reduc_strict_run-1 test case. (*)
  43da77a... tree-optimization/111125 - avoid BB vectorization in novect (*)
  207a5da... c: Add support for [[__extension__ ...]] (*)
  2a0de83... gimple_fold: Support COND_LEN_FNMA/COND_LEN_FMS/COND_LEN_FN (*)
  a1558e9... tree-optimization/111115 - SLP of masked stores (*)
  e80f7c1... tree-optimization/111125 - properly cost BB reduction remai (*)
  aa81e80... aarch64: Account for different Advanced SIMD fusing options (*)
  a28d4fc... VECT: Apply LEN_FOLD_EXTRACT_LAST into loop vectorizer (*)
  7b67cab... tree-optimization/111128 - fix shift pattern recog (*)
  308e716... testsuite/111125 - disable BB vectorization for the test (*)
  1c51805... RISC-V: Fix one typo in autovec.md pattern comment (*)
  0345152... RISC-V: Refactor RVV class by frm_op_type template arg (*)
  4aa14ec... MATCH: [PR111109] Fix bit_ior(cond,cond) when comparisons a (*)
  ddd64a6... MATCH: remove negate for 1bit types (*)
  7e05cd6... Revert "Initial support for AVX10.1" (*)
  cbd3b88... Revert "Emit a warning when disabling AVX512 with AVX10 ena (*)
  edb1a75... Revert "Emit a warning when AVX10 options conflict in vecto (*)
  1ce82f5... Revert "Support AVX10.1 for AVX512DQ+AVX512VL intrins" (*)
  1744817... Revert "Support AVX10.1 for AVX512DQ+AVX512VL intrins" (*)
  5aa36dd... Revert "[Patch 3/6] Support AVX10.1 for AVX512DQ+AVX512VL i (*)
  31242f4... Revert "[Patch 4/6] Support AVX10.1 for AVX512DQ+AVX512VL i (*)
  cfb1dde... Revert "[Patch 5/6] Support AVX10.1 for AVX512DQ+AVX512VL i (*)
  0a92eb2... Revert "[Patch 6/6] Support AVX10.1 for AVX512DQ+AVX512VL i (*)
  c4f2a0e... Revert "i386: Add AVX2 pragma wrapper for AVX512DQVL intrin (*)
  bd2c4d6... debug/111080 - avoid outputting debug info for unused restr (*)
  0a88865... Adjust GCC V13 to GCC 13.1 in diagnotic. (*)
  afe15e9... Fix target_clone ("arch=graniterapids-d") and target_clone  (*)
  0c2633d... testsuite: Xfail gcc.dg/tree-ssa/update-threading.c for CRI (*)
  4e27ba6... Daily bump. (*)
  6619b3d... Improve quality of code from LRA register elimination (*)
  829c0c0... Fortran: improve diagnostic message for COMMON with automat (*)
  0cfc9c9... Phi analyzer - Initialize with range instead of a tree. (*)
  e5f83a2... Don't process phi groups with one phi. (*)
  bf64392... rtl: use rtx_code for gen_ccmp_first and gen_ccmp_next (*)
  3e086a1... rtl: Forward declare rtx_code (*)
  94a25d3... i386: Fix register spill failure with concat RTX [PR111010] (*)
  18befd6... [PATCH] RISC-V:add a more appropriate type attribute (*)
  92f2ec4... RISC-V: Add conditional unary neg/abs/not autovec patterns (*)
  936a123... Fix handling of static exists in loop_ch (*)
  7a2e232... Add testcase for PR110940 (*)
  4beacf3... libffi: Backport of LoongArch support for libffi. (*)
  af3820d... vect: Move VMAT_GATHER_SCATTER handlings from final loop ne (*)
  69a0c51... vect: Move VMAT_LOAD_STORE_LANES handlings from final loop  (*)
  82d5c72... vect: Remove some manual release in vectorizable_store (*)
  2aa8ebc... libstdc++: Fix tests relying on operator new/delete overloa (*)
  3beef5e... RISC-V: Fix potential ICE of global vsetvl elimination (*)
  29487eb... RISC-V: Fix VTYPE fuse rule bug (*)
  5f3c807... RISC-V: Fix gather_load_run-12.c test (*)
  ea1eb12... RISC-V: Add attribute to vtype change only vsetvl (*)
  d18296e... RISC-V: Adapt live-1.c testcase (*)
  6cd8527... Daily bump. (*)
  10a7d31... RISC-V: Clang format riscv-vsetvl.cc[NFC] (*)
  b817bfa... RISC-V: Add riscv-vsetvl.def to t-riscv (*)
  0ccfbe6... libgomp, testsuite: Do not call nonstandard functions (*)
  3242fb5... analyzer: reimplement kf_strlen [PR105899] (*)
  f40d24c... c++: maybe_substitute_reqs_for fix (*)
  810bcc0... c++: constrained hidden friends [PR109751] (*)
  3571cc9... RISC-V: output Autovec params explicitly in --help ... (*)
  47f95bc... RISC-V: Add multiarch support on riscv-linux-gnu (*)
  0698c9f... OpenMP: Handle 'all' as category in defaultmap (*)
  145da6a... doc: Remove obsolete sentence about _Float* not being suppo (*)
  f4658e0... VECT: Add LEN_FOLD_EXTRACT_LAST pattern (*)
  2c27600... Simplify intereaved store vectorization processing (*)
  9e5b47b... MAINTAINERS: Update my email address (*)
  27de9aa... tree-optimization/94864 - vector insert of vector extract s (*)
  d3b5a1b... Fortran: implement vector sections in DATA statements [PR49 (*)
  c27f062... VECT: Support loop len control on EXTRACT_LAST vectorizatio (*)
  710d54f... Testcase fix. (*)
  eaabae8... RISC-V: Change fnms testcases assertion to xfail (*)
  3b691e0... analyzer: check format strings for null termination [PR1058 (*)
  4325c82... analyzer: add kf_fopen (*)
  fe97f09... analyzer: replace -Wanalyzer-unterminated-string with scan_ (*)
  1e7b0a5... analyzer: handle NULL inner context in region_model_context (*)
  2503dd5... analyzer: add ability for context to add events to a saved_ (*)
  e40a935... analyzer: convert note_adding_context to annotating_context (*)
  5f55721... Daily bump. (*)
  1d17e3d... RISC-V: Support RVV VFWREDUSUM.VS rounding mode intrinsic A (*)
  e2c4286... bpf: neg instruction does not accept an immediate (*)
  36788c9... [PATCH] RISC-V: Add Types to Missing Bitmanip Instructions (*)
  b369f0b... Remove XFAIL from gcc/testsuite/gcc.dg/unroll-7.c (*)
  3949144... [RISCV][committed] Remove spurious newline in ztso sequence (*)
  04eea1e... aarch64: fix format specifier (*)
  f9ff6fa... [frange] Return false if nothing changed in union_nans(). (*)
  ab7de14... [PATCH 2/2] RISC-V: Add quotes to #error messages (all) (*)
  56c28ce... [PATCH 1/2] RISC-V: Add quotes to #error messages (*)
  2eaebcf... Fix FAIL: gcc.target/i386/pr87007-5.c (*)
  e4e6a92... Fix gcc.dg/vect/bb-slp-subgroups-2.c with 256bit vectors (*)
  dd606dc... Fix gcc.dg/vect/pr65947-7.c failures on aarch64. (*)
  4c5712f... Fix gcc.dg/vect/bb-slp-46.c FAIL (*)
  6450397... Adjust testcase for Intel GDS. (*)
  6493884... PR111048: Set arg_npatterns correctly. (*)
  e10cb80... tree-optimization/111082 - bogus promoted min (*)
  03cb690... libstdc++: Remove reliance on unspecified behaviour in std: (*)
  d5dfba1... LCM: Export 2 helpful functions as global for VSETVL PASS u (*)
  966b0a9... tree-optimization/111070 - fix ICE with recent ifcombine fi (*)
  47b833a... MATCH: [PR111002] Sink view_convert for vec_cond (*)
  b942654... Testsuite, LTO: silence warning to make test pass on Darwin (*)
  f847e01... Support -march=gracemont (*)
  a759321... Daily bump. (*)
  a724c6e... PR modula2/111085 nexttoward and nexttowardf contain incorr (*)
  6d33602... Testsuite, darwin: account for macOS 13 and 14 (*)
  40a6803... testsuite: Adjust g++.dg/gomp/pr58567.C to new compiler mes (*)
  7694d03... Testsuite, darwin: Fix analyzer testcases (*)
  02393e4... Testsuite: mark IPA test as requiring alias support (*)
  a037992... Testsuite, plugin: make testcase pattern more flexible (*)
  791952e... i386: Micro-optimize ix86_expand_sse_extend (*)
  d77c280... d: Merge upstream dmd, druntime 26f049fb26, phobos 330d6a4f (*)
  ce33bbf... Testsuite: fix analyzer tests on Darwin (*)
  70c50c8... MATCH: Sink convert for vec_cond (*)
  1e3003c... fix misleading identation breaking bootstrap (*)

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2023-10-15  9:08 [gcc/egallager/heads/CI] (1306 commits) Update linux.yaml Eric Gallager

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