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* [gcc r14-4704] Initial Panther Lake Support
@ 2023-10-18 6:41 Haochen Jiang
0 siblings, 0 replies; only message in thread
From: Haochen Jiang @ 2023-10-18 6:41 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:f019251ac9be017aaf3c58f87f43d88b974d21cf
commit r14-4704-gf019251ac9be017aaf3c58f87f43d88b974d21cf
Author: Haochen Jiang <haochen.jiang@intel.com>
Date: Wed Oct 18 14:40:45 2023 +0800
Initial Panther Lake Support
gcc/ChangeLog:
* common/config/i386/cpuinfo.h (get_intel_cpu): Add Panther
Lake.
* common/config/i386/i386-common.cc (processor_name):
Ditto.
(processor_alias_table): Ditto.
* common/config/i386/i386-cpuinfo.h (enum processor_types):
Add INTEL_PANTHERLAKE.
* config.gcc: Add -march=pantherlake.
* config/i386/driver-i386.cc (host_detect_local_cpu): Refactor
the if clause. Handle pantherlake.
* config/i386/i386-c.cc (ix86_target_macros_internal):
Handle pantherlake.
* config/i386/i386-options.cc (processor_cost_table): Ditto.
(m_PANTHERLAKE): New.
(m_CORE_HYBRID): Add pantherlake.
* config/i386/i386.h (enum processor_type): Ditto.
* doc/extend.texi: Ditto.
* doc/invoke.texi: Ditto.
gcc/testsuite/ChangeLog:
* g++.target/i386/mv16.C: Ditto.
* gcc.target/i386/funcspec-56.inc: Handle new march.
Diff:
---
gcc/common/config/i386/cpuinfo.h | 8 +++
gcc/common/config/i386/i386-common.cc | 3 +
gcc/common/config/i386/i386-cpuinfo.h | 1 +
gcc/config.gcc | 2 +-
gcc/config/i386/driver-i386.cc | 92 ++++++++++++++-------------
gcc/config/i386/i386-c.cc | 7 ++
gcc/config/i386/i386-options.cc | 5 +-
gcc/config/i386/i386.h | 2 +
gcc/doc/extend.texi | 3 +
gcc/doc/invoke.texi | 9 +++
gcc/testsuite/g++.target/i386/mv16.C | 6 ++
gcc/testsuite/gcc.target/i386/funcspec-56.inc | 1 +
12 files changed, 94 insertions(+), 45 deletions(-)
diff --git a/gcc/common/config/i386/cpuinfo.h b/gcc/common/config/i386/cpuinfo.h
index 5cfbcf0e1bcd..f7218887c0ff 100644
--- a/gcc/common/config/i386/cpuinfo.h
+++ b/gcc/common/config/i386/cpuinfo.h
@@ -614,6 +614,14 @@ get_intel_cpu (struct __processor_model *cpu_model,
CHECK___builtin_cpu_is ("clearwaterforest");
cpu_model->__cpu_type = INTEL_CLEARWATERFOREST;
break;
+ case 0xcc:
+ /* Panther Lake. */
+ cpu = "pantherlake";
+ CHECK___builtin_cpu_is ("corei7");
+ CHECK___builtin_cpu_is ("pantherlake");
+ cpu_model->__cpu_type = INTEL_COREI7;
+ cpu_model->__cpu_subtype = INTEL_COREI7_PANTHERLAKE;
+ break;
case 0x17:
case 0x1d:
/* Penryn. */
diff --git a/gcc/common/config/i386/i386-common.cc b/gcc/common/config/i386/i386-common.cc
index 903034d2afd5..79b1b35ad6c8 100644
--- a/gcc/common/config/i386/i386-common.cc
+++ b/gcc/common/config/i386/i386-common.cc
@@ -2095,6 +2095,7 @@ const char *const processor_names[] =
"graniterapids-d",
"arrowlake",
"arrowlake-s",
+ "pantherlake",
"intel",
"lujiazui",
"geode",
@@ -2227,6 +2228,8 @@ const pta processor_alias_table[] =
M_CPU_SUBTYPE (INTEL_COREI7_ARROWLAKE_S), P_PROC_AVX2},
{"lunarlake", PROCESSOR_ARROWLAKE_S, CPU_HASWELL, PTA_ARROWLAKE_S,
M_CPU_SUBTYPE (INTEL_COREI7_ARROWLAKE_S), P_PROC_AVX2},
+ {"pantherlake", PROCESSOR_PANTHERLAKE, CPU_HASWELL, PTA_PANTHERLAKE,
+ M_CPU_SUBTYPE (INTEL_COREI7_PANTHERLAKE), P_PROC_AVX2},
{"bonnell", PROCESSOR_BONNELL, CPU_ATOM, PTA_BONNELL,
M_CPU_TYPE (INTEL_BONNELL), P_PROC_SSSE3},
{"atom", PROCESSOR_BONNELL, CPU_ATOM, PTA_BONNELL,
diff --git a/gcc/common/config/i386/i386-cpuinfo.h b/gcc/common/config/i386/i386-cpuinfo.h
index 44db6a070762..533b7481c161 100644
--- a/gcc/common/config/i386/i386-cpuinfo.h
+++ b/gcc/common/config/i386/i386-cpuinfo.h
@@ -102,6 +102,7 @@ enum processor_subtypes
INTEL_COREI7_GRANITERAPIDS_D,
INTEL_COREI7_ARROWLAKE,
INTEL_COREI7_ARROWLAKE_S,
+ INTEL_COREI7_PANTHERLAKE,
CPU_SUBTYPE_MAX
};
diff --git a/gcc/config.gcc b/gcc/config.gcc
index 2d045d6d00f3..37311fcd0750 100644
--- a/gcc/config.gcc
+++ b/gcc/config.gcc
@@ -708,7 +708,7 @@ skylake goldmont goldmont-plus tremont cascadelake tigerlake cooperlake \
sapphirerapids alderlake rocketlake eden-x2 nano nano-1000 nano-2000 nano-3000 \
nano-x2 eden-x4 nano-x4 lujiazui x86-64 x86-64-v2 x86-64-v3 x86-64-v4 \
sierraforest graniterapids graniterapids-d grandridge arrowlake arrowlake-s \
-clearwaterforest native"
+clearwaterforest pantherlake native"
# Additional x86 processors supported by --with-cpu=. Each processor
# MUST be separated by exactly one space.
diff --git a/gcc/config/i386/driver-i386.cc b/gcc/config/i386/driver-i386.cc
index 23fcff324f96..a9e54ef82b5b 100644
--- a/gcc/config/i386/driver-i386.cc
+++ b/gcc/config/i386/driver-i386.cc
@@ -589,26 +589,14 @@ const char *host_detect_local_cpu (int argc, const char **argv)
if (arch)
{
/* This is unknown family 0x6 CPU. */
- if (has_feature (FEATURE_AVX))
+ if (has_feature (FEATURE_AVX512F))
{
- /* Assume Clearwater Forest. */
- if (has_feature (FEATURE_USER_MSR))
- cpu = "clearwaterforest";
- /* Assume Arrow Lake S. */
- else if (has_feature (FEATURE_SM3))
- cpu = "arrowlake-s";
- /* Assume Grand Ridge. */
- else if (has_feature (FEATURE_RAOINT))
- cpu = "grandridge";
/* Assume Granite Rapids D. */
- else if (has_feature (FEATURE_AMX_COMPLEX))
+ if (has_feature (FEATURE_AMX_COMPLEX))
cpu = "graniterapids-d";
/* Assume Granite Rapids. */
else if (has_feature (FEATURE_AMX_FP16))
cpu = "graniterapids";
- /* Assume Sierra Forest. */
- else if (has_feature (FEATURE_AVXVNNIINT8))
- cpu = "sierraforest";
/* Assume Tiger Lake */
else if (has_feature (FEATURE_AVX512VP2INTERSECT))
cpu = "tigerlake";
@@ -621,36 +609,54 @@ const char *host_detect_local_cpu (int argc, const char **argv)
/* Assume Ice Lake Server. */
else if (has_feature (FEATURE_WBNOINVD))
cpu = "icelake-server";
- /* Assume Ice Lake. */
- else if (has_feature (FEATURE_AVX512BITALG))
- cpu = "icelake-client";
- /* Assume Cannon Lake. */
- else if (has_feature (FEATURE_AVX512VBMI))
- cpu = "cannonlake";
- /* Assume Knights Mill. */
- else if (has_feature (FEATURE_AVX5124VNNIW))
- cpu = "knm";
- /* Assume Knights Landing. */
- else if (has_feature (FEATURE_AVX512ER))
- cpu = "knl";
- /* Assume Skylake with AVX-512. */
- else if (has_feature (FEATURE_AVX512F))
- cpu = "skylake-avx512";
- /* Assume Alder Lake */
- else if (has_feature (FEATURE_SERIALIZE))
+ /* Assume Ice Lake. */
+ else if (has_feature (FEATURE_AVX512BITALG))
+ cpu = "icelake-client";
+ /* Assume Cannon Lake. */
+ else if (has_feature (FEATURE_AVX512VBMI))
+ cpu = "cannonlake";
+ /* Assume Knights Mill. */
+ else if (has_feature (FEATURE_AVX5124VNNIW))
+ cpu = "knm";
+ /* Assume Knights Landing. */
+ else if (has_feature (FEATURE_AVX512ER))
+ cpu = "knl";
+ /* Assume Skylake with AVX-512. */
+ else
+ cpu = "skylake-avx512";
+ }
+ else if (has_feature (FEATURE_AVX))
+ {
+ /* Assume Panther Lake. */
+ if (has_feature (FEATURE_PREFETCHI))
+ cpu = "pantherlake";
+ /* Assume Clearwater Forest. */
+ else if (has_feature (FEATURE_USER_MSR))
+ cpu = "clearwaterforest";
+ /* Assume Arrow Lake S. */
+ else if (has_feature (FEATURE_SM3))
+ cpu = "arrowlake-s";
+ /* Assume Grand Ridge. */
+ else if (has_feature (FEATURE_RAOINT))
+ cpu = "grandridge";
+ /* Assume Sierra Forest. */
+ else if (has_feature (FEATURE_AVXVNNIINT8))
+ cpu = "sierraforest";
+ /* Assume Alder Lake. */
+ else if (has_feature (FEATURE_SERIALIZE))
cpu = "alderlake";
- /* Assume Skylake. */
- else if (has_feature (FEATURE_CLFLUSHOPT))
- cpu = "skylake";
- /* Assume Broadwell. */
- else if (has_feature (FEATURE_ADX))
- cpu = "broadwell";
- else if (has_feature (FEATURE_AVX2))
- /* Assume Haswell. */
- cpu = "haswell";
- else
- /* Assume Sandy Bridge. */
- cpu = "sandybridge";
+ /* Assume Skylake. */
+ else if (has_feature (FEATURE_CLFLUSHOPT))
+ cpu = "skylake";
+ /* Assume Broadwell. */
+ else if (has_feature (FEATURE_ADX))
+ cpu = "broadwell";
+ /* Assume Haswell. */
+ else if (has_feature (FEATURE_AVX2))
+ cpu = "haswell";
+ /* Assume Sandy Bridge. */
+ else
+ cpu = "sandybridge";
}
else if (has_feature (FEATURE_SSE4_2))
{
diff --git a/gcc/config/i386/i386-c.cc b/gcc/config/i386/i386-c.cc
index 7ac95a923be9..ebe6a63ed41c 100644
--- a/gcc/config/i386/i386-c.cc
+++ b/gcc/config/i386/i386-c.cc
@@ -282,6 +282,10 @@ ix86_target_macros_internal (HOST_WIDE_INT isa_flag,
def_or_undef (parse_in, "__arrowlake_s");
def_or_undef (parse_in, "__arrowlake_s__");
break;
+ case PROCESSOR_PANTHERLAKE:
+ def_or_undef (parse_in, "__pantherlake");
+ def_or_undef (parse_in, "__pantherlake__");
+ break;
/* use PROCESSOR_max to not set/unset the arch macro. */
case PROCESSOR_max:
@@ -476,6 +480,9 @@ ix86_target_macros_internal (HOST_WIDE_INT isa_flag,
case PROCESSOR_ARROWLAKE_S:
def_or_undef (parse_in, "__tune_arrowlake_s__");
break;
+ case PROCESSOR_PANTHERLAKE:
+ def_or_undef (parse_in, "__tune_pantherlake__");
+ break;
case PROCESSOR_INTEL:
case PROCESSOR_GENERIC:
break;
diff --git a/gcc/config/i386/i386-options.cc b/gcc/config/i386/i386-options.cc
index 952cfe54da07..3a03de5ceca7 100644
--- a/gcc/config/i386/i386-options.cc
+++ b/gcc/config/i386/i386-options.cc
@@ -142,8 +142,10 @@ along with GCC; see the file COPYING3. If not see
#define m_ARROWLAKE (HOST_WIDE_INT_1U<<PROCESSOR_ARROWLAKE)
#define m_ARROWLAKE_S (HOST_WIDE_INT_1U<<PROCESSOR_ARROWLAKE_S)
#define m_CLEARWATERFOREST (HOST_WIDE_INT_1U<<PROCESSOR_CLEARWATERFOREST)
+#define m_PANTHERLAKE (HOST_WIDE_INT_1U<<PROCESSOR_PANTHERLAKE)
#define m_CORE_ATOM (m_SIERRAFOREST | m_GRANDRIDGE | m_CLEARWATERFOREST)
-#define m_CORE_HYBRID (m_ALDERLAKE | m_ARROWLAKE | m_ARROWLAKE_S)
+#define m_CORE_HYBRID (m_ALDERLAKE | m_ARROWLAKE | m_ARROWLAKE_S \
+ | m_PANTHERLAKE)
#define m_INTEL (HOST_WIDE_INT_1U<<PROCESSOR_INTEL)
/* Gather Data Sampling / CVE-2022-40982 / INTEL-SA-00828.
Software mitigation. */
@@ -787,6 +789,7 @@ static const struct processor_costs *processor_cost_table[] =
&icelake_cost,
&alderlake_cost,
&alderlake_cost,
+ &alderlake_cost,
&intel_cost,
&lujiazui_cost,
&geode_cost,
diff --git a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h
index d7d0085f9250..abfe1672c415 100644
--- a/gcc/config/i386/i386.h
+++ b/gcc/config/i386/i386.h
@@ -2286,6 +2286,7 @@ enum processor_type
PROCESSOR_GRANITERAPIDS_D,
PROCESSOR_ARROWLAKE,
PROCESSOR_ARROWLAKE_S,
+ PROCESSOR_PANTHERLAKE,
PROCESSOR_INTEL,
PROCESSOR_LUJIAZUI,
PROCESSOR_GEODE,
@@ -2405,6 +2406,7 @@ constexpr wide_int_bitmask PTA_ARROWLAKE_S = PTA_ARROWLAKE | PTA_AVXVNNIINT16
| PTA_SHA512 | PTA_SM3 | PTA_SM4;
constexpr wide_int_bitmask PTA_CLEARWATERFOREST = PTA_ARROWLAKE_S | PTA_PREFETCHI
| PTA_USER_MSR;
+constexpr wide_int_bitmask PTA_PANTHERLAKE = PTA_ARROWLAKE_S | PTA_PREFETCHI;
constexpr wide_int_bitmask PTA_KNM = PTA_KNL | PTA_AVX5124VNNIW
| PTA_AVX5124FMAPS | PTA_AVX512VPOPCNTDQ;
constexpr wide_int_bitmask PTA_ZNVER1 = PTA_64BIT | PTA_MMX | PTA_SSE | PTA_SSE2
diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi
index 5beb8361b1c3..a3db9423ce66 100644
--- a/gcc/doc/extend.texi
+++ b/gcc/doc/extend.texi
@@ -22639,6 +22639,9 @@ Intel Core i7 Arrow Lake S CPU.
@item clearwaterforest
Intel Atom Clearwater Forest CPU.
+@item pantherlake
+Intel Core i7 Panther Lake CPU.
+
@item knl
Intel Knights Landing CPU.
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index 44a6d3d7efb3..a0da7f9d5acf 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -32865,6 +32865,15 @@ LZCNT, PCONFIG, PKU, VAES, VPCLMULQDQ, SERIALIZE, HRESET, KL, WIDEKL, AVX-VNNI,
AVXIFMA, AVXVNNIINT8, AVXNECONVERT, CMPCCXADD, AVXVNNIINT16, SHA512, SM3, SM4,
USER_MSR and PREFETCHI instruction set support.
+@item pantherlake
+Intel Panther Lake CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, SSE3,
+SSSE3, SSE4.1, SSE4.2, POPCNT, AES, PREFETCHW, PCLMUL, RDRND, XSAVE, XSAVEC,
+XSAVES, XSAVEOPT, FSGSBASE, PTWRITE, RDPID, SGX, GFNI-SSE, CLWB, MOVDIRI,
+MOVDIR64B, CLDEMOTE, WAITPKG, ADCX, AVX, AVX2, BMI, BMI2, F16C, FMA, LZCNT,
+PCONFIG, PKU, VAES, VPCLMULQDQ, SERIALIZE, HRESET, KL, WIDEKL, AVX-VNNI,
+AVXIFMA, AVXVNNIINT8, AVXNECONVERT, CMPCCXADD, AVXVNNIINT16, SHA512, SM3, SM4
+and PREFETCHI instruction set support.
+
@item knl
Intel Knight's Landing CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, SSE3,
SSSE3, SSE4.1, SSE4.2, POPCNT, CX16, SAHF, FXSR, AVX, XSAVE, PCLMUL, FSGSBASE,
diff --git a/gcc/testsuite/g++.target/i386/mv16.C b/gcc/testsuite/g++.target/i386/mv16.C
index d29002b18dba..ef47831f93ca 100644
--- a/gcc/testsuite/g++.target/i386/mv16.C
+++ b/gcc/testsuite/g++.target/i386/mv16.C
@@ -120,6 +120,10 @@ int __attribute__ ((target("arch=clearwaterforest"))) foo () {
return 31;
}
+int __attribute__ ((target("arch=pantherlake"))) foo () {
+ return 32;
+}
+
int main ()
{
int val = foo ();
@@ -172,6 +176,8 @@ int main ()
assert (val == 30);
else if (__builtin_cpu_is ("clearwaterforest"))
assert (val == 31);
+ else if (__builtin_cpu_is ("pantherlake"))
+ assert (val == 32);
else
assert (val == 0);
diff --git a/gcc/testsuite/gcc.target/i386/funcspec-56.inc b/gcc/testsuite/gcc.target/i386/funcspec-56.inc
index c1d93243ea7e..c6307fb7be5d 100644
--- a/gcc/testsuite/gcc.target/i386/funcspec-56.inc
+++ b/gcc/testsuite/gcc.target/i386/funcspec-56.inc
@@ -217,6 +217,7 @@ extern void test_arch_graniterapids_d (void) __attribute__((__target__("arch=gra
extern void test_arch_arrowlake (void) __attribute__((__target__("arch=arrowlake")));
extern void test_arch_arrowlake_s (void) __attribute__((__target__("arch=arrowlake-s")));
extern void test_arch_clearwaterforest (void) __attribute__((__target__("arch=clearwaterforest")));
+extern void test_arch_pantherlake (void) __attribute__((__target__("arch=pantherlake")));
extern void test_arch_lujiazui (void) __attribute__((__target__("arch=lujiazui")));
extern void test_arch_k8 (void) __attribute__((__target__("arch=k8")));
extern void test_arch_k8_sse3 (void) __attribute__((__target__("arch=k8-sse3")));
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