[gcc r14-4836] LoongArch: Define macro CLEAR_INSN_CACHE.

[gcc r14-4836] LoongArch: Define macro CLEAR_INSN_CACHE.

[LuluCheng]

https://gcc.gnu.org/g:5697ed0327f23d2e2ec4f7beec3b3d02f463173c

commit r14-4836-g5697ed0327f23d2e2ec4f7beec3b3d02f463173c
Author: Lulu Cheng <chenglulu@loongson.cn>
Date:   Mon Oct 23 09:07:32 2023 +0800

    LoongArch: Define macro CLEAR_INSN_CACHE.
    
    LoongArch's microstructure ensures cache consistency by hardware.
    Due to out-of-order execution, "ibar" is required to ensure the visibility of the
    store (invalidated icache) executed by this CPU before "ibar" (to the instance).
    "ibar" will not invalidate the icache, so the start and end parameters are not Affect
    "ibar" performance.
    
    gcc/ChangeLog:
    
            * config/loongarch/loongarch.h (CLEAR_INSN_CACHE): New definition.

Diff:
---
 gcc/config/loongarch/loongarch.h | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/gcc/config/loongarch/loongarch.h b/gcc/config/loongarch/loongarch.h
index da3ec2add9ad..c72fc515aebb 100644
--- a/gcc/config/loongarch/loongarch.h
+++ b/gcc/config/loongarch/loongarch.h
@@ -1231,3 +1231,8 @@ struct GTY (()) machine_function
   (TARGET_HARD_FLOAT_ABI ? (TARGET_DOUBLE_FLOAT_ABI ? 8 : 4) : 0)
 
 #define FUNCTION_VALUE_REGNO_P(N) ((N) == GP_RETURN || (N) == FP_RETURN)
+
+/* LoongArch maintains ICache/DCache coherency by hardware,
+   we just need "ibar" to avoid instruction hazard here.  */
+#undef  CLEAR_INSN_CACHE
+#define CLEAR_INSN_CACHE(beg, end) __builtin_loongarch_ibar (0)