[gcc r14-4876] RISC-V: Fix ICE of RTL CHECK on VSETVL PASS[PR111947]

[gcc r14-4876] RISC-V: Fix ICE of RTL CHECK on VSETVL PASS[PR111947]

[Lehua Ding]

https://gcc.gnu.org/g:7b2984ad76cac67b962eeb39eab62b6dacf7845e

commit r14-4876-g7b2984ad76cac67b962eeb39eab62b6dacf7845e
Author: Juzhe-Zhong <juzhe.zhong@rivai.ai>
Date:   Tue Oct 24 10:12:49 2023 +0800

    RISC-V: Fix ICE of RTL CHECK on VSETVL PASS[PR111947]
    
    ICE on vsetvli a5, 8 instruction demand info.
    
    The AVL is const_int 8 which ICE on RENGO caller.
    
    Committed as it is obvious fix.
    
            PR target/111947
    
    gcc/ChangeLog:
    
            * config/riscv/riscv-vsetvl.cc (pre_vsetvl::compute_lcm_local_properties): Add REGNO check.
    
    gcc/testsuite/ChangeLog:
    
            * gcc.target/riscv/rvv/vsetvl/pr111947.c: New test.

Diff:
---
 gcc/config/riscv/riscv-vsetvl.cc                     | 15 +++++++++------
 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr111947.c | 13 +++++++++++++
 2 files changed, 22 insertions(+), 6 deletions(-)

diff --git a/gcc/config/riscv/riscv-vsetvl.cc b/gcc/config/riscv/riscv-vsetvl.cc
index ef5efe002b72..e9dd669de98e 100644
--- a/gcc/config/riscv/riscv-vsetvl.cc
+++ b/gcc/config/riscv/riscv-vsetvl.cc
@@ -2687,13 +2687,16 @@ pre_vsetvl::compute_lcm_local_properties ()
 	      if (!info.has_nonvlmax_reg_avl () && !info.has_vl ())
 		continue;
 
-	      unsigned int regno;
-	      sbitmap_iterator sbi;
-	      EXECUTE_IF_SET_IN_BITMAP (m_reg_def_loc[bb->index ()], 0, regno,
-					sbi)
+	      if (info.has_nonvlmax_reg_avl ())
 		{
-		  if (regno == REGNO (info.get_avl ()))
-		    bitmap_clear_bit (m_transp[bb->index ()], i);
+		  unsigned int regno;
+		  sbitmap_iterator sbi;
+		  EXECUTE_IF_SET_IN_BITMAP (m_reg_def_loc[bb->index ()], 0,
+					    regno, sbi)
+		    {
+		      if (regno == REGNO (info.get_avl ()))
+			bitmap_clear_bit (m_transp[bb->index ()], i);
+		    }
 		}
 
 	      for (const insn_info *insn : bb->real_nondebug_insns ())
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr111947.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr111947.c
new file mode 100644
index 000000000000..cea19b70e200
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr111947.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -O2 -Wno-implicit-int" } */
+
+char *a;
+b() {
+  int c[2];
+  int d = 0;
+  for (; d < 16; d += 2)
+    c[d / 2] = a[d | 1];
+  if (c[0])
+    for (;;)
+      ;
+}