public inbox for gcc-cvs@sourceware.org
help / color / mirror / Atom feed
* [gcc(refs/users/meissner/heads/work141)] Update ChangeLog.meissner
@ 2023-10-24 18:25 Michael Meissner
  0 siblings, 0 replies; only message in thread
From: Michael Meissner @ 2023-10-24 18:25 UTC (permalink / raw)
  To: gcc-cvs

https://gcc.gnu.org/g:2bce235b0e5dbcd8e524f37233f08d16095a8a5a

commit 2bce235b0e5dbcd8e524f37233f08d16095a8a5a
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Tue Oct 24 14:25:11 2023 -0400

    Update ChangeLog.meissner

Diff:
---
 gcc/ChangeLog.meissner | 100 +++++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 100 insertions(+)

diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index 258837b6e82..811adfb37a2 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -1,5 +1,105 @@
+==================== Branch work141, patch #1 ====================
+
+Power10: Add options to disable load and store vector pair.
+
+In working on some future patches that involve utilizing vector pair
+instructions, I wanted to be able to tune my program to enable or disable using
+the vector pair load or store operations while still keeping the other
+operations on the vector pair.
+
+This patch adds two undocumented tuning options.  The -mno-load-vector-pair
+option would tell GCC to generate two load vector instructions instead of a
+single load vector pair.  The -mno-store-vector-pair option would tell GCC to
+generate two store vector instructions instead of a single store vector pair.
+
+If either -mno-load-vector-pair is used, GCC will not generate the indexed
+stxvpx instruction.  Similarly if -mno-store-vector-pair is used, GCC will not
+generate the indexed lxvpx instruction.  The reason for this is to enable
+splitting the {,p}lxvp or {,p}stxvp instructions after reload without needing a
+scratch GPR register.
+
+The default for -mcpu=power10 is that both load vector pair and store vector
+pair are enabled.
+
+I decided that if the user explicitly used the __builtin_vsx_lxvp or the
+__builtin_vsx_stxvp built-in functions to load or store a vector pair, that
+those functions would always generate a vector pair instruction.
+
+I added code so that the user code can modify these settings using either a
+'#pragma GCC target' directive or used __attribute__((__target__(...))) in the
+function declaration.
+
+I added tests for the switches, #pragma, and attribute options.
+
+I have built this on both little endian power10 systems and big endian power9
+systems doing the normal bootstrap and test.  There were no regressions in any
+of the tests, and the new tests passed.  Can I check this patch into the master
+branch?
+
+2023-10-24  Michael Meissner  <meissner@linux.ibm.com>
+
+gcc/
+
+	* config/rs6000/mma.md (movoo): Add support for -mload-vector-pair and
+	-mstore-vector-pair.
+	* config/rs6000/rs6000-cpus.def (OTHER_POWER10_MASKS): Likewise.
+	(POWERPC_MASKS): Likewise.
+	* config/rs6000/rs6000.md (rs6000_setup_reg_addr_masks): If either load
+	vector pair or store vector pair instructions are not being generated,
+	don't allow lxvpx or stxvpx to be generated.
+	(rs6000_option_override_internal): Add warnings if either
+	-mload-vector-pair or -mstore-vector-pair is used without having MMA
+	instructions.
+	(rs6000_opt_masks): Allow user to override -mload-vector-pair or
+	-mstore-vector-pair via #pragma or attribute.
+	* config/rs6000/rs6000.opt (-mload-vector-pair): New option.
+	(-mstore-vector-pair): Likewise.
+
+gcc/testsuite/
+
+	* gcc.target/powerpc/vector-pair-attribute.c: New test.
+	* gcc.target/powerpc/vector-pair-pragma.c: New test.
+	* gcc.target/powerpc/vector-pair-switch1.c: New test.
+	* gcc.target/powerpc/vector-pair-switch2.c: New test.
+	* gcc.target/powerpc/vector-pair-switch3.c: New test.
+	* gcc.target/powerpc/vector-pair-switch4.c: New test.
+
 ==================== Branch work141, baseline ====================
 
+Add ChangeLog.meissner and REVISION.
+
+2023-10-24  Michael Meissner  <meissner@linux.ibm.com>
+
+gcc/
+
+	* REVISION: New file for branch.
+	* ChangeLog.meissner: New file.
+
+gcc/c-family/
+
+	* ChangeLog.meissner: New file.
+
+gcc/c/
+
+	* ChangeLog.meissner: New file.
+
+gcc/cp/
+
+	* ChangeLog.meissner: New file.
+
+gcc/fortran/
+
+	* ChangeLog.meissner: New file.
+
+gcc/testsuite/
+
+	* ChangeLog.meissner: New file.
+
+libgcc/
+
+	* ChangeLog.meissner: New file.
+
+
 2023-10-24   Michael Meissner  <meissner@linux.ibm.com>
 
 	Clone branch

^ permalink raw reply	[flat|nested] only message in thread

only message in thread, other threads:[~2023-10-24 18:25 UTC | newest]

Thread overview: (only message) (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2023-10-24 18:25 [gcc(refs/users/meissner/heads/work141)] Update ChangeLog.meissner Michael Meissner

This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).