[gcc(refs/vendors/riscv/heads/gcc-13-with-riscv-opts)] RISC-V: Make rv32i_zcmp testcase more robust

[gcc(refs/vendors/riscv/heads/gcc-13-with-riscv-opts)] RISC-V: Make rv32i_zcmp testcase more robust

[Jeff Law]

https://gcc.gnu.org/g:1ed6d441cebb1231cc3351fc02396c981e583b80

commit 1ed6d441cebb1231cc3351fc02396c981e583b80
Author: Patrick O'Neill <patrick@rivosinc.com>
Date:   Mon Oct 30 09:30:01 2023 -0700

    RISC-V: Make rv32i_zcmp testcase more robust
    
    GCC recently changed its register allocator which causes this
    testcase to fail.
    This patch updates the regex to be more robust to change by accepting
    any s register in the range of 1-9 for cm.push and cm.popret insns.
    
    gcc/testsuite/ChangeLog:
    
            * gcc.target/riscv/rv32i_zcmp.c: Accept any register in the
            range of 1-9 for cm.push and cm.popret insns.
    
    Signed-off-by: Patrick O'Neill <patrick@rivosinc.com>
    (cherry picked from commit 68880e40533c41c89eb72247c3080703ad09270c)

Diff:
---
 gcc/testsuite/gcc.target/riscv/rv32i_zcmp.c | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/gcc/testsuite/gcc.target/riscv/rv32i_zcmp.c b/gcc/testsuite/gcc.target/riscv/rv32i_zcmp.c
index ea562b7a233a..1e1a8be87054 100644
--- a/gcc/testsuite/gcc.target/riscv/rv32i_zcmp.c
+++ b/gcc/testsuite/gcc.target/riscv/rv32i_zcmp.c
@@ -26,9 +26,9 @@ f2 (void);
 /*
 **test1:
 **	...
-**	cm.push	{ra, s0-s4}, -80
+**	cm.push	{ra, s0-s[1-9]}, -80
 **	...
-**	cm.popret	{ra, s0-s4}, 80
+**	cm.popret	{ra, s0-s[1-9]}, 80
 **	...
 */
 int
@@ -50,9 +50,9 @@ test1 ()
 /*
 **test2_step1_0_size:
 **	...
-**	cm.push	{ra, s0-s1}, -64
+**	cm.push	{ra, s0-s[1-9]}, -64
 **	...
-**	cm.popret	{ra, s0-s1}, 64
+**	cm.popret	{ra, s0-s[1-9]}, 64
 **	...
 */
 int
@@ -70,9 +70,9 @@ test2_step1_0_size ()
 /*
 **test3:
 **	...
-**	cm.push	{ra, s0-s4}, -80
+**	cm.push	{ra, s0-s[1-9]}, -80
 **	...
-**	cm.popret	{ra, s0-s4}, 80
+**	cm.popret	{ra, s0-s[1-9]}, 80
 **	...
 */
 float