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* [gcc(refs/users/meissner/heads/work146-dmf)] PowerPC: Make -mcpu=future enable -mblock-ops-vector-pair.
@ 2023-11-17 19:17 Michael Meissner
0 siblings, 0 replies; only message in thread
From: Michael Meissner @ 2023-11-17 19:17 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:ca9618f82e4d1575422e9396670a3eeb170f84ee
commit ca9618f82e4d1575422e9396670a3eeb170f84ee
Author: Michael Meissner <meissner@linux.ibm.com>
Date: Fri Nov 17 14:13:40 2023 -0500
PowerPC: Make -mcpu=future enable -mblock-ops-vector-pair.
This patch re-enables generating load and store vector pair instructions when
doing certain memory copy operations when -mcpu=future is used.
During power10 development, it was determined that using store vector pair
instructions were problematical in a few cases, so we disabled generating load
and store vector pair instructions for memory options by default. This patch
re-enables generating these instructions if -mcpu=future is used.
The patches have been tested on both little and big endian systems. Can I check
it into the master branch?
2023-11-17 Michael Meissner <meissner@linux.ibm.com>
gcc/
* config/rs6000/rs6000-cpus.def (ISA_FUTURE_MASKS): Add
-mblock-ops-vector-pair.
(POWERPC_MASKS): Likewise.
Diff:
---
gcc/config/rs6000/rs6000-cpus.def | 2 ++
1 file changed, 2 insertions(+)
diff --git a/gcc/config/rs6000/rs6000-cpus.def b/gcc/config/rs6000/rs6000-cpus.def
index 14df93fd595..ac41a29334c 100644
--- a/gcc/config/rs6000/rs6000-cpus.def
+++ b/gcc/config/rs6000/rs6000-cpus.def
@@ -90,6 +90,7 @@
/* Flags for a potential future processor that may or may not be delivered. */
#define ISA_FUTURE_MASKS (ISA_3_1_MASKS_SERVER \
+ | OPTION_MASK_BLOCK_OPS_VECTOR_PAIR \
| OPTION_MASK_FUTURE)
/* Flags that need to be turned off if -mno-power9-vector. */
@@ -127,6 +128,7 @@
/* Mask of all options to set the default isa flags based on -mcpu=<xxx>. */
#define POWERPC_MASKS (OPTION_MASK_ALTIVEC \
+ | OPTION_MASK_BLOCK_OPS_VECTOR_PAIR \
| OPTION_MASK_CMPB \
| OPTION_MASK_CRYPTO \
| OPTION_MASK_DFP \
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