[gcc(refs/vendors/riscv/heads/gcc-13-with-riscv-opts)] [IRA]: Check autoinc and memory address after temporary equivalence substitution

[gcc(refs/vendors/riscv/heads/gcc-13-with-riscv-opts)] [IRA]: Check autoinc and memory address after temporary equivalence substitution

[Jeff Law]

https://gcc.gnu.org/g:d5523b8aa32cace980326d3ed637d22a2ff648c1

commit d5523b8aa32cace980326d3ed637d22a2ff648c1
Author: Vladimir N. Makarov <vmakarov@redhat.com>
Date:   Fri Nov 10 11:14:46 2023 -0500

    [IRA]: Check autoinc and memory address after temporary equivalence substitution
    
    My previous RA patches to take register equivalence into account do
    temporary register equivalence substitution to find out that the
    equivalence can be consumed by insns.  The insn with the substitution is
    checked on validity using target-depended code.  This code expects that
    autoinc operations work on register but this register can be substituted
    by equivalent memory.  The patch fixes this problem.  The patch also adds
    checking that the substitution can be consumed in memory address too.
    
    gcc/ChangeLog:
    
            PR target/112337
            * ira-costs.cc: (validate_autoinc_and_mem_addr_p): New function.
            (equiv_can_be_consumed_p): Use it.
    
    gcc/testsuite/ChangeLog:
    
            PR target/112337
            * gcc.target/arm/pr112337.c: New.
    
    (cherry picked from commit df66fa08578a28b3acc8bdb6257b68c245a6a0fa)

Diff:
---
 gcc/ira-costs.cc                        | 35 ++++++++++++++++++++++++++++++++-
 gcc/testsuite/gcc.target/arm/pr112337.c | 14 +++++++++++++
 2 files changed, 48 insertions(+), 1 deletion(-)

diff --git a/gcc/ira-costs.cc b/gcc/ira-costs.cc
index 7a3628b624a..69622e21a3c 100644
--- a/gcc/ira-costs.cc
+++ b/gcc/ira-costs.cc
@@ -1751,13 +1751,46 @@ process_bb_node_for_costs (ira_loop_tree_node_t loop_tree_node)
     process_bb_for_costs (bb);
 }
 
+/* Return true if all autoinc rtx in X change only a register and memory is
+   valid.  */
+static bool
+validate_autoinc_and_mem_addr_p (rtx x)
+{
+  enum rtx_code code = GET_CODE (x);
+  if (GET_RTX_CLASS (code) == RTX_AUTOINC)
+    return REG_P (XEXP (x, 0));
+  const char *fmt = GET_RTX_FORMAT (code);
+  for (int i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
+    if (fmt[i] == 'e')
+      {
+	if (!validate_autoinc_and_mem_addr_p (XEXP (x, i)))
+	  return false;
+      }
+    else if (fmt[i] == 'E')
+      {
+	for (int j = 0; j < XVECLEN (x, i); j++)
+	  if (!validate_autoinc_and_mem_addr_p (XVECEXP (x, i, j)))
+	    return false;
+      }
+  /* Check memory after checking autoinc to guarantee that autoinc is already
+     valid for machine-dependent code checking memory address.  */
+  return (!MEM_P (x)
+	  || memory_address_addr_space_p (GET_MODE (x), XEXP (x, 0),
+					  MEM_ADDR_SPACE (x)));
+}
+
 /* Check that reg REGNO can be changed by TO in INSN.  Return true in case the
    result insn would be valid one.  */
 static bool
 equiv_can_be_consumed_p (int regno, rtx to, rtx_insn *insn)
 {
   validate_replace_src_group (regno_reg_rtx[regno], to, insn);
-  bool res = verify_changes (0);
+  /* We can change register to equivalent memory in autoinc rtl.  Some code
+     including verify_changes assumes that autoinc contains only a register.
+     So check this first.  */
+  bool res = validate_autoinc_and_mem_addr_p (PATTERN (insn));
+  if (res)
+    res = verify_changes (0);
   cancel_changes (0);
   return res;
 }
diff --git a/gcc/testsuite/gcc.target/arm/pr112337.c b/gcc/testsuite/gcc.target/arm/pr112337.c
new file mode 100644
index 00000000000..5dacf0aa4f8
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/pr112337.c
@@ -0,0 +1,14 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -march=armv8.1-m.main+fp.dp+mve.fp -mfloat-abi=hard" } */
+
+#pragma GCC arm "arm_mve_types.h"
+int32x4_t h(void *p) { return __builtin_mve_vldrwq_sv4si(p); }
+void g(int32x4_t);
+void f(int, int, int, short, int *p) {
+  int *bias = p;
+  for (;;) {
+    int32x4_t d = h(bias);
+    bias += 4;
+    g(d);
+  }
+}