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* [gcc(refs/vendors/riscv/heads/gcc-13-with-riscv-opts)] Allow md iterators to include other iterators
@ 2023-11-21 4:12 Jeff Law
0 siblings, 0 replies; only message in thread
From: Jeff Law @ 2023-11-21 4:12 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:d913f9354493b860440335bd7c9dda6d08f8f239
commit d913f9354493b860440335bd7c9dda6d08f8f239
Author: Richard Sandiford <richard.sandiford@arm.com>
Date: Fri Nov 10 15:46:21 2023 +0000
Allow md iterators to include other iterators
This patch allows an .md iterator to include the contents of
previous iterators, possibly with an extra condition attached.
Too much indirection might become hard to follow, so for the
AArch64 changes I tried to stick to things that seemed likely
to be uncontroversial:
(a) structure iterators that combine modes for different sizes
and vector counts
(b) iterators that explicitly duplicate another iterator
(for iterating over the cross product)
gcc/
* read-rtl.cc (md_reader::read_mapping): Allow iterators to
include other iterators.
* doc/md.texi: Document the change.
* config/aarch64/iterators.md (DREG2, VQ2, TX2, DX2, SX2): Include
the iterator that is being duplicated, rather than reproducing it.
(VSTRUCT_D): Redefine using VSTRUCT_[234]D.
(VSTRUCT_Q): Likewise VSTRUCT_[234]Q.
(VSTRUCT_2QD, VSTRUCT_3QD, VSTRUCT_4QD, VSTRUCT_QD): Redefine using
the individual D and Q iterators.
(cherry picked from commit 5dbaf4851bbf56b6176dca1f1e7d38a16b5b84ee)
Diff:
---
gcc/config/aarch64/iterators.md | 61 ++++++++++++-----------------------------
gcc/doc/md.texi | 13 +++++++++
gcc/read-rtl.cc | 21 ++++++++++++--
3 files changed, 49 insertions(+), 46 deletions(-)
diff --git a/gcc/config/aarch64/iterators.md b/gcc/config/aarch64/iterators.md
index 6cbc97cc82c..bb87912f93b 100644
--- a/gcc/config/aarch64/iterators.md
+++ b/gcc/config/aarch64/iterators.md
@@ -103,7 +103,7 @@
(define_mode_iterator DREG [V8QI V4HI V4HF V2SI V2SF DF])
;; Copy of the above.
-(define_mode_iterator DREG2 [V8QI V4HI V4HF V2SI V2SF DF])
+(define_mode_iterator DREG2 [DREG])
;; All modes suitable to store/load pair (2 elements) using STP/LDP.
(define_mode_iterator VP_2E [V2SI V2SF V2DI V2DF])
@@ -118,7 +118,7 @@
(define_mode_iterator VQ [V16QI V8HI V4SI V2DI V8HF V4SF V2DF V8BF])
;; Copy of the above.
-(define_mode_iterator VQ2 [V16QI V8HI V4SI V2DI V8HF V8BF V4SF V2DF])
+(define_mode_iterator VQ2 [VQ])
;; Quad vector modes suitable for moving. Includes BFmode.
(define_mode_iterator VQMOV [V16QI V8HI V4SI V2DI V8HF V8BF V4SF V2DF])
@@ -313,19 +313,14 @@
(define_mode_iterator TX [TI TF TD])
+;; Duplicate of the above
+(define_mode_iterator TX2 [TX])
+
(define_mode_iterator VTX [TI TF TD V16QI V8HI V4SI V2DI V8HF V4SF V2DF V8BF])
;; Advanced SIMD opaque structure modes.
(define_mode_iterator VSTRUCT [OI CI XI])
-;; Advanced SIMD 64-bit vector structure modes.
-(define_mode_iterator VSTRUCT_D [V2x8QI V2x4HI V2x2SI V2x1DI
- V2x4HF V2x2SF V2x1DF V2x4BF
- V3x8QI V3x4HI V3x2SI V3x1DI
- V3x4HF V3x2SF V3x1DF V3x4BF
- V4x8QI V4x4HI V4x2SI V4x1DI
- V4x4HF V4x2SF V4x1DF V4x4BF])
-
;; Advanced SIMD 64-bit 2-vector structure modes.
(define_mode_iterator VSTRUCT_2D [V2x8QI V2x4HI V2x2SI V2x1DI
V2x4HF V2x2SF V2x1DF V2x4BF])
@@ -338,6 +333,9 @@
(define_mode_iterator VSTRUCT_4D [V4x8QI V4x4HI V4x2SI V4x1DI
V4x4HF V4x2SF V4x1DF V4x4BF])
+;; Advanced SIMD 64-bit vector structure modes.
+(define_mode_iterator VSTRUCT_D [VSTRUCT_2D VSTRUCT_3D VSTRUCT_4D])
+
;; Advanced SIMD 64-bit 2-vector structure modes minus V2x1DI and V2x1DF.
(define_mode_iterator VSTRUCT_2DNX [V2x8QI V2x4HI V2x2SI V2x4HF
V2x2SF V2x4BF])
@@ -362,14 +360,6 @@
;; Advanced SIMD 64-bit 4-vector structure modes with 64-bit elements.
(define_mode_iterator VSTRUCT_4DX [V4x1DI V4x1DF])
-;; Advanced SIMD 128-bit vector structure modes.
-(define_mode_iterator VSTRUCT_Q [V2x16QI V2x8HI V2x4SI V2x2DI
- V2x8HF V2x4SF V2x2DF V2x8BF
- V3x16QI V3x8HI V3x4SI V3x2DI
- V3x8HF V3x4SF V3x2DF V3x8BF
- V4x16QI V4x8HI V4x4SI V4x2DI
- V4x8HF V4x4SF V4x2DF V4x8BF])
-
;; Advanced SIMD 128-bit 2-vector structure modes.
(define_mode_iterator VSTRUCT_2Q [V2x16QI V2x8HI V2x4SI V2x2DI
V2x8HF V2x4SF V2x2DF V2x8BF])
@@ -382,49 +372,32 @@
(define_mode_iterator VSTRUCT_4Q [V4x16QI V4x8HI V4x4SI V4x2DI
V4x8HF V4x4SF V4x2DF V4x8BF])
+;; Advanced SIMD 128-bit vector structure modes.
+(define_mode_iterator VSTRUCT_Q [VSTRUCT_2Q VSTRUCT_3Q VSTRUCT_4Q])
+
;; Advanced SIMD 2-vector structure modes.
-(define_mode_iterator VSTRUCT_2QD [V2x8QI V2x4HI V2x2SI V2x1DI
- V2x4HF V2x2SF V2x1DF V2x4BF
- V2x16QI V2x8HI V2x4SI V2x2DI
- V2x8HF V2x4SF V2x2DF V2x8BF])
+(define_mode_iterator VSTRUCT_2QD [VSTRUCT_2D VSTRUCT_2Q])
;; Advanced SIMD 3-vector structure modes.
-(define_mode_iterator VSTRUCT_3QD [V3x8QI V3x4HI V3x2SI V3x1DI
- V3x4HF V3x2SF V3x1DF V3x4BF
- V3x16QI V3x8HI V3x4SI V3x2DI
- V3x8HF V3x4SF V3x2DF V3x8BF])
+(define_mode_iterator VSTRUCT_3QD [VSTRUCT_3D VSTRUCT_3Q])
;; Advanced SIMD 4-vector structure modes.
-(define_mode_iterator VSTRUCT_4QD [V4x8QI V4x4HI V4x2SI V4x1DI
- V4x4HF V4x2SF V4x1DF V4x4BF
- V4x16QI V4x8HI V4x4SI V4x2DI
- V4x8HF V4x4SF V4x2DF V4x8BF])
+(define_mode_iterator VSTRUCT_4QD [VSTRUCT_4D VSTRUCT_4Q])
;; Advanced SIMD vector structure modes.
-(define_mode_iterator VSTRUCT_QD [V2x8QI V2x4HI V2x2SI V2x1DI
- V2x4HF V2x2SF V2x1DF V2x4BF
- V3x8QI V3x4HI V3x2SI V3x1DI
- V3x4HF V3x2SF V3x1DF V3x4BF
- V4x8QI V4x4HI V4x2SI V4x1DI
- V4x4HF V4x2SF V4x1DF V4x4BF
- V2x16QI V2x8HI V2x4SI V2x2DI
- V2x8HF V2x4SF V2x2DF V2x8BF
- V3x16QI V3x8HI V3x4SI V3x2DI
- V3x8HF V3x4SF V3x2DF V3x8BF
- V4x16QI V4x8HI V4x4SI V4x2DI
- V4x8HF V4x4SF V4x2DF V4x8BF])
+(define_mode_iterator VSTRUCT_QD [VSTRUCT_D VSTRUCT_Q])
;; Double scalar modes
(define_mode_iterator DX [DI DF DD])
;; Duplicate of the above
-(define_mode_iterator DX2 [DI DF DD])
+(define_mode_iterator DX2 [DX])
;; Single scalar modes
(define_mode_iterator SX [SI SF])
;; Duplicate of the above
-(define_mode_iterator SX2 [SI SF])
+(define_mode_iterator SX2 [SX])
;; Single and double integer and float modes
(define_mode_iterator DSX [DF DI SF SI])
diff --git a/gcc/doc/md.texi b/gcc/doc/md.texi
index 5d9870ad42a..30de805b1da 100644
--- a/gcc/doc/md.texi
+++ b/gcc/doc/md.texi
@@ -11496,6 +11496,19 @@ to @code{@var{mode}}. For example:
means that the @code{:DI} expansion only applies if @code{TARGET_64BIT}
but that the @code{:SI} expansion has no such constraint.
+It is also possible to include iterators in other iterators. For example:
+
+@smallexample
+(define_mode_iterator VI [V16QI V8HI V4SI V2DI])
+(define_mode_iterator VF [V8HF V4SF (V2DF "TARGET_DOUBLE")])
+(define_mode_iterator V [VI (VF "TARGET_FLOAT")])
+@end smallexample
+
+makes @samp{:V} iterate over the modes in @code{VI} and the modes
+in @code{VF}. When a construct uses @samp{:V}, the @code{V8HF} and
+@code{V4SF} expansions require @samp{TARGET_FLOAT} while the @code{V2DF}
+expansion requires @samp{TARGET_DOUBLE && TARGET_FLOAT}.
+
Iterators are applied in the order they are defined. This can be
significant if two iterators are used in a construct that requires
substitutions. @xref{Substitutions}.
diff --git a/gcc/read-rtl.cc b/gcc/read-rtl.cc
index 8cb25aebdbb..6e88a7c53da 100644
--- a/gcc/read-rtl.cc
+++ b/gcc/read-rtl.cc
@@ -1267,8 +1267,25 @@ md_reader::read_mapping (struct iterator_group *group, htab_t table)
string = read_string (false);
require_char_ws (')');
}
- number = group->find_builtin (name.string);
- end_ptr = add_map_value (end_ptr, number, string);
+ auto *subm = (struct mapping *) htab_find (group->iterators,
+ &name.string);
+ if (subm)
+ {
+ if (m == subm)
+ fatal_with_file_and_line ("recursive definition of `%s'",
+ name.string);
+ for (map_value *v = subm->values; v; v = v->next)
+ {
+ auto *joined = rtx_reader_ptr->join_c_conditions (v->string,
+ string);
+ end_ptr = add_map_value (end_ptr, v->number, joined);
+ }
+ }
+ else
+ {
+ number = group->find_builtin (name.string);
+ end_ptr = add_map_value (end_ptr, number, string);
+ }
c = read_skip_spaces ();
}
while (c != ']');
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