[gcc r14-6256] aarch64: rcpc3: Add +rcpc3 extension

[gcc r14-6256] aarch64: rcpc3: Add +rcpc3 extension

[Victor Do Nascimento]

https://gcc.gnu.org/g:df193bda748c9c3f1e23cc2c4a636db578239001

commit r14-6256-gdf193bda748c9c3f1e23cc2c4a636db578239001
Author: Victor Do Nascimento <victor.donascimento@arm.com>
Date:   Wed May 3 12:02:54 2023 +0100

    aarch64: rcpc3: Add +rcpc3 extension
    
    Given the optional LRCPC3 target support for Armv8.2-a cores onwards,
    the +rcpc3 arch feature modifier is added to GCC's command-line options.
    
    gcc/ChangeLog:
    
            * config/aarch64/aarch64-option-extensions.def (rcpc3): New.
            * config/aarch64/aarch64.h (AARCH64_ISA_RCPC3): Likewise.
            (TARGET_RCPC3): Likewise.
            * doc/invoke.texi (rcpc3): Document feature in AArch64 Options.

Diff:
---
 gcc/config/aarch64/aarch64-option-extensions.def | 1 +
 gcc/config/aarch64/aarch64.h                     | 4 ++++
 gcc/doc/invoke.texi                              | 2 ++
 3 files changed, 7 insertions(+)

diff --git a/gcc/config/aarch64/aarch64-option-extensions.def b/gcc/config/aarch64/aarch64-option-extensions.def
index 02fc895338e..5aa37ac4e0e 100644
--- a/gcc/config/aarch64/aarch64-option-extensions.def
+++ b/gcc/config/aarch64/aarch64-option-extensions.def
@@ -165,4 +165,5 @@ AARCH64_OPT_EXTENSION("the", THE, (), (), (), "the")
 
 AARCH64_OPT_EXTENSION("gcs", GCS, (), (), (), "gcs")
 
+AARCH64_OPT_EXTENSION("rcpc3", RCPC3, (), (), (), "rcpc3")
 #undef AARCH64_OPT_EXTENSION
diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h
index 5a776dfdff0..2cd0bc552eb 100644
--- a/gcc/config/aarch64/aarch64.h
+++ b/gcc/config/aarch64/aarch64.h
@@ -250,6 +250,7 @@ constexpr auto AARCH64_FL_DEFAULT_ISA_MODE = AARCH64_FL_SM_OFF;
 #define AARCH64_ISA_F64MM	   (aarch64_isa_flags & AARCH64_FL_F64MM)
 #define AARCH64_ISA_BF16	   (aarch64_isa_flags & AARCH64_FL_BF16)
 #define AARCH64_ISA_SB		   (aarch64_isa_flags & AARCH64_FL_SB)
+#define AARCH64_ISA_RCPC3	   (aarch64_isa_flags & AARCH64_FL_RCPC3)
 #define AARCH64_ISA_V8R		   (aarch64_isa_flags & AARCH64_FL_V8R)
 #define AARCH64_ISA_PAUTH	   (aarch64_isa_flags & AARCH64_FL_PAUTH)
 #define AARCH64_ISA_V8_7A	   (aarch64_isa_flags & AARCH64_FL_V8_7A)
@@ -433,6 +434,9 @@ constexpr auto AARCH64_FL_DEFAULT_ISA_MODE = AARCH64_FL_SM_OFF;
    and sign-extending versions.*/
 #define TARGET_RCPC2 (AARCH64_ISA_RCPC8_4)
 
+/* RCPC3 (Release Consistency) extensions, optional from Armv8.2-a.  */
+#define TARGET_RCPC3 (AARCH64_ISA_RCPC3)
+
 /* Apply the workaround for Cortex-A53 erratum 835769.  */
 #define TARGET_FIX_ERR_A53_835769	\
   ((aarch64_fix_a53_err835769 == 2)	\
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index f8d6f799e11..43341fe6e5e 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -21381,6 +21381,8 @@ Enable support for 128-bit system register read/write instructions.
 Enable support for Armv9.4-a Guarded Control Stack extension.
 @item the
 Enable support for Armv8.9-a/9.4-a translation hardening extension.
+@item rcpc3
+Enable the RCpc3 (Release Consistency) extension.
 
 @end table