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* [gcc r14-8821] AArch64: aarch64_class_max_nregs mishandles 64-bit structure modes [PR112577]
@ 2024-02-06 10:40 Tejas Belagod
0 siblings, 0 replies; only message in thread
From: Tejas Belagod @ 2024-02-06 10:40 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:ca04e7a2e1b08ed02e22e2656ba6032099195856
commit r14-8821-gca04e7a2e1b08ed02e22e2656ba6032099195856
Author: Tejas Belagod <tejas.belagod@arm.com>
Date: Thu Jan 11 12:37:06 2024 +0530
AArch64: aarch64_class_max_nregs mishandles 64-bit structure modes [PR112577]
The target hook aarch64_class_max_nregs returns the incorrect result for 64-bit
structure modes like V31DImode or V41DFmode etc. The calculation of the nregs
is based on the size of AdvSIMD vector register for 64-bit modes which ought to
be UNITS_PER_VREG / 2. This patch fixes the register size.
gcc/ChangeLog:
PR target/112577
* config/aarch64/aarch64.cc (aarch64_class_max_nregs): Handle 64-bit
vector structure modes correctly.
Diff:
---
gcc/config/aarch64/aarch64.cc | 2 ++
1 file changed, 2 insertions(+)
diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc
index 4556b8dd5045..872393a82312 100644
--- a/gcc/config/aarch64/aarch64.cc
+++ b/gcc/config/aarch64/aarch64.cc
@@ -12961,6 +12961,8 @@ aarch64_class_max_nregs (reg_class_t regclass, machine_mode mode)
&& constant_multiple_p (GET_MODE_SIZE (mode),
aarch64_vl_bytes (mode, vec_flags), &nregs))
return nregs;
+ if (vec_flags == (VEC_ADVSIMD | VEC_STRUCT | VEC_PARTIAL))
+ return GET_MODE_SIZE (mode).to_constant () / 8;
return (vec_flags & VEC_ADVSIMD
? CEIL (lowest_size, UNITS_PER_VREG)
: CEIL (lowest_size, UNITS_PER_WORD));
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2024-02-06 10:40 [gcc r14-8821] AArch64: aarch64_class_max_nregs mishandles 64-bit structure modes [PR112577] Tejas Belagod
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