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* [gcc r14-8887] arm: testsuite: fix issues relating to fp16 alternative testing
@ 2024-02-08 15:21 Richard Earnshaw
0 siblings, 0 replies; only message in thread
From: Richard Earnshaw @ 2024-02-08 15:21 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:d9459129ea8f8c3cbd6150b90e842decba7952a3
commit r14-8887-gd9459129ea8f8c3cbd6150b90e842decba7952a3
Author: Richard Earnshaw <rearnsha@arm.com>
Date: Mon Feb 5 17:16:45 2024 +0000
arm: testsuite: fix issues relating to fp16 alternative testing
The v*_fp16_xN_1.c tests on Arm have been unstable since they were
added. This is not a problem with the tests themselves, or even the
patches that were added, but with the testsuite infrastructure. It
turned out that another set of dg- tests for fp16 were corrupting the
cached set of options used by the new tests, leading to running the
tests with incorrect flags.
So the primary goal of this patch is to fix the incorrect internal
caching of the options needed to enable fp16 alternative format on
Arm: the code was storing the result in the same variable that was
being used for neon_fp16 and this was leading to testsuite instability
for tests that were checking for neon with fp16.
But in cleaning this up I also noted that we weren't then applying the
flags correctly having detected what they were, so we also address
that.
I suspect there are still some further issues to address here, since
the framework does not correctly test that the multilibs and startup
code enable alternative format; but this is still an improvement over
what we had before.
gcc/testsuite/ChangeLog:
* lib/target-supports.exp
(check_effective_target_arm_fp16_alternative_ok_nocache): Use
et_arm_fp16_alternative_flags to cache the result. Improve test
for FP16 availability.
(add_options_for_arm_fp16_alternative): Use
et_arm_fp16_alternative_flags.
* g++.dg/ext/arm-fp16/arm-fp16-ops-3.C: Update dg-* flags.
* g++.dg/ext/arm-fp16/arm-fp16-ops-4.C: Likewise.
* gcc.dg/torture/arm-fp16-int-convert-alt.c: Likewise.
* gcc.dg/torture/arm-fp16-ops-3.c: Likewise.
* gcc.dg/torture/arm-fp16-ops-4.c: Likewise.
* gcc.target/arm/fp16-aapcs-3.c: Likewise.
* gcc.target/arm/fp16-aapcs-4.c: Likewise.
* gcc.target/arm/fp16-compile-alt-1.c: Likewise.
* gcc.target/arm/fp16-compile-alt-10.c: Likewise.
* gcc.target/arm/fp16-compile-alt-11.c: Likewise.
* gcc.target/arm/fp16-compile-alt-12.c: Likewise.
* gcc.target/arm/fp16-compile-alt-2.c: Likewise.
* gcc.target/arm/fp16-compile-alt-3.c: Likewise.
* gcc.target/arm/fp16-compile-alt-4.c: Likewise.
* gcc.target/arm/fp16-compile-alt-5.c: Likewise.
* gcc.target/arm/fp16-compile-alt-6.c: Likewise.
* gcc.target/arm/fp16-compile-alt-7.c: Likewise.
* gcc.target/arm/fp16-compile-alt-8.c: Likewise.
* gcc.target/arm/fp16-compile-alt-9.c: Likewise.
* gcc.target/arm/fp16-rounding-alt-1.c: Likewise.
Diff:
---
gcc/testsuite/g++.dg/ext/arm-fp16/arm-fp16-ops-3.C | 2 +-
gcc/testsuite/g++.dg/ext/arm-fp16/arm-fp16-ops-4.C | 3 ++-
gcc/testsuite/gcc.dg/torture/arm-fp16-int-convert-alt.c | 2 +-
gcc/testsuite/gcc.dg/torture/arm-fp16-ops-3.c | 2 +-
gcc/testsuite/gcc.dg/torture/arm-fp16-ops-4.c | 3 ++-
gcc/testsuite/gcc.target/arm/fp16-aapcs-3.c | 3 ++-
gcc/testsuite/gcc.target/arm/fp16-aapcs-4.c | 3 ++-
gcc/testsuite/gcc.target/arm/fp16-compile-alt-1.c | 2 +-
gcc/testsuite/gcc.target/arm/fp16-compile-alt-10.c | 3 ++-
gcc/testsuite/gcc.target/arm/fp16-compile-alt-11.c | 3 ++-
gcc/testsuite/gcc.target/arm/fp16-compile-alt-12.c | 2 +-
gcc/testsuite/gcc.target/arm/fp16-compile-alt-2.c | 2 +-
gcc/testsuite/gcc.target/arm/fp16-compile-alt-3.c | 2 +-
gcc/testsuite/gcc.target/arm/fp16-compile-alt-4.c | 2 +-
gcc/testsuite/gcc.target/arm/fp16-compile-alt-5.c | 2 +-
gcc/testsuite/gcc.target/arm/fp16-compile-alt-6.c | 2 +-
gcc/testsuite/gcc.target/arm/fp16-compile-alt-7.c | 3 ++-
gcc/testsuite/gcc.target/arm/fp16-compile-alt-8.c | 2 +-
gcc/testsuite/gcc.target/arm/fp16-compile-alt-9.c | 2 +-
gcc/testsuite/gcc.target/arm/fp16-rounding-alt-1.c | 4 +++-
gcc/testsuite/lib/target-supports.exp | 16 ++++++++--------
21 files changed, 37 insertions(+), 28 deletions(-)
diff --git a/gcc/testsuite/g++.dg/ext/arm-fp16/arm-fp16-ops-3.C b/gcc/testsuite/g++.dg/ext/arm-fp16/arm-fp16-ops-3.C
index 29080c7514f4..5eceb3074dfd 100644
--- a/gcc/testsuite/g++.dg/ext/arm-fp16/arm-fp16-ops-3.C
+++ b/gcc/testsuite/g++.dg/ext/arm-fp16/arm-fp16-ops-3.C
@@ -1,6 +1,6 @@
/* Test various operators on __fp16 and mixed __fp16/float operands. */
/* { dg-do run { target arm*-*-* } } */
/* { dg-require-effective-target arm_fp16_alternative_ok } */
-/* { dg-options "-mfp16-format=alternative" } */
+/* { dg-add-options arm_fp16_alternative } */
#include "arm-fp16-ops.h"
diff --git a/gcc/testsuite/g++.dg/ext/arm-fp16/arm-fp16-ops-4.C b/gcc/testsuite/g++.dg/ext/arm-fp16/arm-fp16-ops-4.C
index 4be8883faad2..d86019f14699 100644
--- a/gcc/testsuite/g++.dg/ext/arm-fp16/arm-fp16-ops-4.C
+++ b/gcc/testsuite/g++.dg/ext/arm-fp16/arm-fp16-ops-4.C
@@ -1,6 +1,7 @@
/* Test various operators on __fp16 and mixed __fp16/float operands. */
/* { dg-do run { target arm*-*-* } } */
/* { dg-require-effective-target arm_fp16_alternative_ok } */
-/* { dg-options "-mfp16-format=alternative -ffast-math" } */
+/* { dg-options "-ffast-math" } */
+/* { dg-add-options arm_fp16_alternative } */
#include "arm-fp16-ops.h"
diff --git a/gcc/testsuite/gcc.dg/torture/arm-fp16-int-convert-alt.c b/gcc/testsuite/gcc.dg/torture/arm-fp16-int-convert-alt.c
index f013b59ddde0..42171d4e83e2 100644
--- a/gcc/testsuite/gcc.dg/torture/arm-fp16-int-convert-alt.c
+++ b/gcc/testsuite/gcc.dg/torture/arm-fp16-int-convert-alt.c
@@ -1,7 +1,7 @@
/* Test floating-point conversions. Standard types and __fp16. */
/* { dg-do run { target arm*-*-* } } */
/* { dg-require-effective-target arm_fp16_alternative_ok }
-/* { dg-options "-mfp16-format=alternative" } */
+/* { dg-add-options arm_fp16_alternative } */
#include "fp-int-convert.h"
#define FP16_MANT_DIG 11
diff --git a/gcc/testsuite/gcc.dg/torture/arm-fp16-ops-3.c b/gcc/testsuite/gcc.dg/torture/arm-fp16-ops-3.c
index 7716baf818ec..3f0aecf357b4 100644
--- a/gcc/testsuite/gcc.dg/torture/arm-fp16-ops-3.c
+++ b/gcc/testsuite/gcc.dg/torture/arm-fp16-ops-3.c
@@ -1,6 +1,6 @@
/* Test various operators on __fp16 and mixed __fp16/float operands. */
/* { dg-do run { target arm*-*-* } } */
/* { dg-require-effective-target arm_fp16_alternative_ok }
-/* { dg-options "-mfp16-format=alternative" } */
+/* { dg-add-options arm_fp16_alternative } */
#include "arm-fp16-ops.h"
diff --git a/gcc/testsuite/gcc.dg/torture/arm-fp16-ops-4.c b/gcc/testsuite/gcc.dg/torture/arm-fp16-ops-4.c
index 1940f4320d0c..846515b5eabc 100644
--- a/gcc/testsuite/gcc.dg/torture/arm-fp16-ops-4.c
+++ b/gcc/testsuite/gcc.dg/torture/arm-fp16-ops-4.c
@@ -1,6 +1,7 @@
/* Test various operators on __fp16 and mixed __fp16/float operands. */
/* { dg-do run { target arm*-*-* } } */
/* { dg-require-effective-target arm_fp16_alternative_ok }
-/* { dg-options "-mfp16-format=alternative -ffast-math" } */
+/* { dg-options "-ffast-math" } */
+/* { dg-add-options arm_fp16_alternative } */
#include "arm-fp16-ops.h"
diff --git a/gcc/testsuite/gcc.target/arm/fp16-aapcs-3.c b/gcc/testsuite/gcc.target/arm/fp16-aapcs-3.c
index 858181cdd856..56a3ae261843 100644
--- a/gcc/testsuite/gcc.target/arm/fp16-aapcs-3.c
+++ b/gcc/testsuite/gcc.target/arm/fp16-aapcs-3.c
@@ -1,7 +1,8 @@
/* { dg-do compile } */
/* { dg-require-effective-target arm_hard_vfp_ok } */
/* { dg-require-effective-target arm_fp16_alternative_ok } */
-/* { dg-options "-O2 -mfp16-format=alternative" } */
+/* { dg-options "-O2" } */
+/* { dg-add-options arm_fp16_alternative } */
/* Test __fp16 arguments and return value in registers (hard-float). */
diff --git a/gcc/testsuite/gcc.target/arm/fp16-aapcs-4.c b/gcc/testsuite/gcc.target/arm/fp16-aapcs-4.c
index ae65fb86184e..daac29137aeb 100644
--- a/gcc/testsuite/gcc.target/arm/fp16-aapcs-4.c
+++ b/gcc/testsuite/gcc.target/arm/fp16-aapcs-4.c
@@ -1,6 +1,7 @@
/* { dg-do compile } */
/* { dg-require-effective-target arm_fp16_alternative_ok } */
-/* { dg-options "-mfloat-abi=softfp -O2 -mfp16-format=alternative" } */
+/* { dg-options "-mfloat-abi=softfp -O2" } */
+/* { dg-add-options arm_fp16_alternative } */
/* { dg-skip-if "incompatible float-abi" { arm*-*-* } { "-mfloat-abi=hard" } } */
/* Test __fp16 arguments and return value in registers (softfp). */
diff --git a/gcc/testsuite/gcc.target/arm/fp16-compile-alt-1.c b/gcc/testsuite/gcc.target/arm/fp16-compile-alt-1.c
index 0845e886a835..ab5e1d5f4308 100644
--- a/gcc/testsuite/gcc.target/arm/fp16-compile-alt-1.c
+++ b/gcc/testsuite/gcc.target/arm/fp16-compile-alt-1.c
@@ -1,6 +1,6 @@
/* { dg-do compile } */
/* { dg-require-effective-target arm_fp16_alternative_ok } */
-/* { dg-options "-mfp16-format=alternative" } */
+/* { dg-add-options arm_fp16_alternative } */
__fp16 xx = 0.0;
diff --git a/gcc/testsuite/gcc.target/arm/fp16-compile-alt-10.c b/gcc/testsuite/gcc.target/arm/fp16-compile-alt-10.c
index a8772a19ae00..985299d26458 100644
--- a/gcc/testsuite/gcc.target/arm/fp16-compile-alt-10.c
+++ b/gcc/testsuite/gcc.target/arm/fp16-compile-alt-10.c
@@ -1,6 +1,7 @@
/* { dg-do compile } */
/* { dg-require-effective-target arm_fp16_alternative_ok } */
-/* { dg-options "-mfp16-format=alternative -pedantic -std=gnu99" } */
+/* { dg-options "-pedantic -std=gnu99" } */
+/* { dg-add-options arm_fp16_alternative } */
#include <math.h>
diff --git a/gcc/testsuite/gcc.target/arm/fp16-compile-alt-11.c b/gcc/testsuite/gcc.target/arm/fp16-compile-alt-11.c
index 1cb3d2c4963f..7c506e9a8845 100644
--- a/gcc/testsuite/gcc.target/arm/fp16-compile-alt-11.c
+++ b/gcc/testsuite/gcc.target/arm/fp16-compile-alt-11.c
@@ -1,6 +1,7 @@
/* { dg-do compile } */
/* { dg-require-effective-target arm_fp16_alternative_ok } */
-/* { dg-options "-mfp16-format=alternative -pedantic -std=gnu99" } */
+/* { dg-options "-pedantic -std=gnu99" } */
+/* { dg-add-options arm_fp16_alternative } */
#include <math.h>
diff --git a/gcc/testsuite/gcc.target/arm/fp16-compile-alt-12.c b/gcc/testsuite/gcc.target/arm/fp16-compile-alt-12.c
index 3c3bd2f02f6f..f7cb3f045587 100644
--- a/gcc/testsuite/gcc.target/arm/fp16-compile-alt-12.c
+++ b/gcc/testsuite/gcc.target/arm/fp16-compile-alt-12.c
@@ -1,6 +1,6 @@
/* { dg-do compile } */
/* { dg-require-effective-target arm_fp16_alternative_ok } */
-/* { dg-options "-mfp16-format=alternative" } */
+/* { dg-add-options arm_fp16_alternative } */
float xx __attribute__((mode(HF))) = 0.0;
diff --git a/gcc/testsuite/gcc.target/arm/fp16-compile-alt-2.c b/gcc/testsuite/gcc.target/arm/fp16-compile-alt-2.c
index 8a45f1f4ae10..a3eebfee1895 100644
--- a/gcc/testsuite/gcc.target/arm/fp16-compile-alt-2.c
+++ b/gcc/testsuite/gcc.target/arm/fp16-compile-alt-2.c
@@ -1,6 +1,6 @@
/* { dg-do compile } */
/* { dg-require-effective-target arm_fp16_alternative_ok } */
-/* { dg-options "-mfp16-format=alternative" } */
+/* { dg-add-options arm_fp16_alternative } */
/* Encoding taken from: http://en.wikipedia.org/wiki/Half_precision */
/* 0x3c00 = 15360 */
diff --git a/gcc/testsuite/gcc.target/arm/fp16-compile-alt-3.c b/gcc/testsuite/gcc.target/arm/fp16-compile-alt-3.c
index 7221766284eb..c1ae6de7c118 100644
--- a/gcc/testsuite/gcc.target/arm/fp16-compile-alt-3.c
+++ b/gcc/testsuite/gcc.target/arm/fp16-compile-alt-3.c
@@ -1,6 +1,6 @@
/* { dg-do compile } */
/* { dg-require-effective-target arm_fp16_alternative_ok } */
-/* { dg-options "-mfp16-format=alternative" } */
+/* { dg-add-options arm_fp16_alternative } */
/* Encoding taken from: http://en.wikipedia.org/wiki/Half_precision */
/* 0xc000 = 49152 */
diff --git a/gcc/testsuite/gcc.target/arm/fp16-compile-alt-4.c b/gcc/testsuite/gcc.target/arm/fp16-compile-alt-4.c
index cfeb61aaea74..e244bd1745e8 100644
--- a/gcc/testsuite/gcc.target/arm/fp16-compile-alt-4.c
+++ b/gcc/testsuite/gcc.target/arm/fp16-compile-alt-4.c
@@ -1,6 +1,6 @@
/* { dg-do compile } */
/* { dg-require-effective-target arm_fp16_alternative_ok } */
-/* { dg-options "-mfp16-format=alternative" } */
+/* { dg-add-options arm_fp16_alternative } */
/* Encoding taken from: http://en.wikipedia.org/wiki/Half_precision */
/* 0x7bff = 31743 */
diff --git a/gcc/testsuite/gcc.target/arm/fp16-compile-alt-5.c b/gcc/testsuite/gcc.target/arm/fp16-compile-alt-5.c
index 3b741ae62dcd..373a59a4fb64 100644
--- a/gcc/testsuite/gcc.target/arm/fp16-compile-alt-5.c
+++ b/gcc/testsuite/gcc.target/arm/fp16-compile-alt-5.c
@@ -1,6 +1,6 @@
/* { dg-do compile } */
/* { dg-require-effective-target arm_fp16_alternative_ok } */
-/* { dg-options "-mfp16-format=alternative" } */
+/* { dg-add-options arm_fp16_alternative } */
/* Encoding taken from: http://en.wikipedia.org/wiki/Half_precision */
/* 0x3555 = 13653 */
diff --git a/gcc/testsuite/gcc.target/arm/fp16-compile-alt-6.c b/gcc/testsuite/gcc.target/arm/fp16-compile-alt-6.c
index abffff5fa60b..a8503ddb51f0 100644
--- a/gcc/testsuite/gcc.target/arm/fp16-compile-alt-6.c
+++ b/gcc/testsuite/gcc.target/arm/fp16-compile-alt-6.c
@@ -1,6 +1,6 @@
/* { dg-do compile } */
/* { dg-require-effective-target arm_fp16_alternative_ok } */
-/* { dg-options "-mfp16-format=alternative" } */
+/* { dg-add-options arm_fp16_alternative } */
/* This number is the maximum value representable in the alternative
encoding. */
diff --git a/gcc/testsuite/gcc.target/arm/fp16-compile-alt-7.c b/gcc/testsuite/gcc.target/arm/fp16-compile-alt-7.c
index c339f197cd77..0e59234cfd48 100644
--- a/gcc/testsuite/gcc.target/arm/fp16-compile-alt-7.c
+++ b/gcc/testsuite/gcc.target/arm/fp16-compile-alt-7.c
@@ -1,6 +1,7 @@
/* { dg-do compile } */
/* { dg-require-effective-target arm_fp16_alternative_ok } */
-/* { dg-options "-mfp16-format=alternative -pedantic" } */
+/* { dg-options "-pedantic" } */
+/* { dg-add-options arm_fp16_alternative } */
/* This number overflows the range of the alternative encoding. Since this
encoding doesn't have infinities, we should get a pedantic warning,
diff --git a/gcc/testsuite/gcc.target/arm/fp16-compile-alt-8.c b/gcc/testsuite/gcc.target/arm/fp16-compile-alt-8.c
index deeb5cd55742..36e71c36d4ed 100644
--- a/gcc/testsuite/gcc.target/arm/fp16-compile-alt-8.c
+++ b/gcc/testsuite/gcc.target/arm/fp16-compile-alt-8.c
@@ -1,6 +1,6 @@
/* { dg-do compile } */
/* { dg-require-effective-target arm_fp16_alternative_ok } */
-/* { dg-options "-mfp16-format=alternative" } */
+/* { dg-add-options arm_fp16_alternative } */
/* Encoding taken from: http://en.wikipedia.org/wiki/Half_precision */
/* This is the minimum normalized value. */
diff --git a/gcc/testsuite/gcc.target/arm/fp16-compile-alt-9.c b/gcc/testsuite/gcc.target/arm/fp16-compile-alt-9.c
index f9f565453e70..5a2eef7df2f0 100644
--- a/gcc/testsuite/gcc.target/arm/fp16-compile-alt-9.c
+++ b/gcc/testsuite/gcc.target/arm/fp16-compile-alt-9.c
@@ -1,6 +1,6 @@
/* { dg-do compile } */
/* { dg-require-effective-target arm_fp16_alternative_ok } */
-/* { dg-options "-mfp16-format=alternative" } */
+/* { dg-add-options arm_fp16_alternative } */
/* Encoding taken from: http://en.wikipedia.org/wiki/Half_precision */
/* This is the minimum denormalized value. */
diff --git a/gcc/testsuite/gcc.target/arm/fp16-rounding-alt-1.c b/gcc/testsuite/gcc.target/arm/fp16-rounding-alt-1.c
index 27bb40dcfee8..2ad03afbcd1e 100644
--- a/gcc/testsuite/gcc.target/arm/fp16-rounding-alt-1.c
+++ b/gcc/testsuite/gcc.target/arm/fp16-rounding-alt-1.c
@@ -3,8 +3,10 @@
__fp16 via float. */
/* { dg-do run } */
+/* { dg-require-effective-target arm_fp16_hw } */
/* { dg-require-effective-target arm_fp16_alternative_ok } */
-/* { dg-options "-mfp16-format=alternative" } */
+/* { dg-options "-std=c99" } */
+/* { dg-add-options arm_fp16_alternative } */
#include <stdlib.h>
diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp
index b1faaf4aa955..6ce8557c9a9d 100644
--- a/gcc/testsuite/lib/target-supports.exp
+++ b/gcc/testsuite/lib/target-supports.exp
@@ -5247,25 +5247,25 @@ proc add_options_for_aarch64_sve { flags } {
# Return 1 if this is an ARM target supporting the FP16 alternative
# format. Some multilibs may be incompatible with the options needed. Also
-# set et_arm_neon_fp16_flags to the best options to add.
+# set et_arm_fp16_alternative_flags to the best options to add.
proc check_effective_target_arm_fp16_alternative_ok_nocache { } {
if { [istarget *-*-vxworks7*] } {
# Not supported by the target system.
return 0
}
- global et_arm_neon_fp16_flags
- set et_arm_neon_fp16_flags ""
+ global et_arm_fp16_alternative_flags
+ set et_arm_fp16_alternative_flags ""
if { [check_effective_target_arm32] } {
foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp16"
"-mfpu=neon-fp16 -mfloat-abi=softfp"} {
if { [check_no_compiler_messages_nocache \
arm_fp16_alternative_ok object {
- #if !defined (__ARM_FP16_FORMAT_ALTERNATIVE)
+ #if !defined (__ARM_FP16_FORMAT_ALTERNATIVE) || ! (__ARM_FP & 2)
#error __ARM_FP16_FORMAT_ALTERNATIVE not defined
#endif
} "$flags -mfp16-format=alternative"] } {
- set et_arm_neon_fp16_flags "$flags -mfp16-format=alternative"
+ set et_arm_fp16_alternative_flags "$flags -mfp16-format=alternative"
return 1
}
}
@@ -5404,11 +5404,11 @@ proc add_options_for_arm_fp16_ieee { flags } {
# half-precision support. This is valid for ARM targets.
proc add_options_for_arm_fp16_alternative { flags } {
- if { ! [check_effective_target_arm_fp16_ok] } {
+ if { ! [check_effective_target_arm_fp16_alternative_ok] } {
return "$flags"
}
- global et_arm_fp16_flags
- return "$flags $et_arm_fp16_flags -mfp16-format=alternative"
+ global et_arm_fp16_alternative_flags
+ return "$flags $et_arm_fp16_alternative_flags"
}
# Return 1 if this is an ARM target that can support a VFP fp16 variant.
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