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* [gcc(refs/vendors/ARM/heads/gcs)] aarch64: Add __builtin_aarch64_chkfeat tests
@ 2024-02-14 15:26 Szabolcs Nagy
0 siblings, 0 replies; 2+ messages in thread
From: Szabolcs Nagy @ 2024-02-14 15:26 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:f0908f340e23544db38dc5bfff102542784f9900
commit f0908f340e23544db38dc5bfff102542784f9900
Author: Szabolcs Nagy <szabolcs.nagy@arm.com>
Date: Fri Jun 2 16:15:25 2023 +0100
aarch64: Add __builtin_aarch64_chkfeat tests
gcc/testsuite/ChangeLog:
* gcc.target/aarch64/chkfeat-1.c: New test.
* gcc.target/aarch64/chkfeat-2.c: New test.
Diff:
---
gcc/testsuite/gcc.target/aarch64/chkfeat-1.c | 75 ++++++++++++++++++++++++++++
gcc/testsuite/gcc.target/aarch64/chkfeat-2.c | 15 ++++++
2 files changed, 90 insertions(+)
diff --git a/gcc/testsuite/gcc.target/aarch64/chkfeat-1.c b/gcc/testsuite/gcc.target/aarch64/chkfeat-1.c
new file mode 100644
index 000000000000..2fae81e740fa
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/chkfeat-1.c
@@ -0,0 +1,75 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mbranch-protection=none" } */
+/* { dg-final { check-function-bodies "**" "" "" } } */
+
+/*
+**foo1:
+** mov x16, 1
+** hint 40 // chkfeat x16
+** mov x0, x16
+** ret
+*/
+unsigned long long
+foo1 (void)
+{
+ return __builtin_aarch64_chkfeat (1);
+}
+
+/*
+**foo2:
+** mov x16, 1
+** movk x16, 0x5678, lsl 32
+** movk x16, 0x1234, lsl 48
+** hint 40 // chkfeat x16
+** mov x0, x16
+** ret
+*/
+unsigned long long
+foo2 (void)
+{
+ return __builtin_aarch64_chkfeat (0x1234567800000001);
+}
+
+/*
+**foo3:
+** mov x16, x0
+** hint 40 // chkfeat x16
+** mov x0, x16
+** ret
+*/
+unsigned long long
+foo3 (unsigned long long x)
+{
+ return __builtin_aarch64_chkfeat (x);
+}
+
+/*
+**foo4:
+** ldr x16, \[x0\]
+** hint 40 // chkfeat x16
+** str x16, \[x0\]
+** ret
+*/
+void
+foo4 (unsigned long long *p)
+{
+ *p = __builtin_aarch64_chkfeat (*p);
+}
+
+/*
+**foo5:
+** mov x16, 1
+** hint 40 // chkfeat x16
+** cmp x16, 0
+**(
+** csel w0, w1, w0, eq
+**|
+** csel w0, w0, w1, ne
+**)
+** ret
+*/
+int
+foo5 (int x, int y)
+{
+ return __builtin_aarch64_chkfeat (1) ? x : y;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/chkfeat-2.c b/gcc/testsuite/gcc.target/aarch64/chkfeat-2.c
new file mode 100644
index 000000000000..682524e244fc
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/chkfeat-2.c
@@ -0,0 +1,15 @@
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+/* { dg-final { scan-assembler-times {hint\t40 // chkfeat x16} 2 } } */
+
+void bar (void);
+
+/* Extern call may change enabled HW features. */
+unsigned long long
+foo (void)
+{
+ unsigned long long a = __builtin_aarch64_chkfeat (1);
+ bar ();
+ unsigned long long b = __builtin_aarch64_chkfeat (1);
+ return a + b;
+}
^ permalink raw reply [flat|nested] 2+ messages in thread
* [gcc(refs/vendors/ARM/heads/gcs)] aarch64: Add __builtin_aarch64_chkfeat tests
@ 2024-04-10 10:48 Szabolcs Nagy
0 siblings, 0 replies; 2+ messages in thread
From: Szabolcs Nagy @ 2024-04-10 10:48 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:0c0ee07e8b10e071c5b88fbae6f109778a4e578c
commit 0c0ee07e8b10e071c5b88fbae6f109778a4e578c
Author: Szabolcs Nagy <szabolcs.nagy@arm.com>
Date: Fri Jun 2 16:15:25 2023 +0100
aarch64: Add __builtin_aarch64_chkfeat tests
gcc/testsuite/ChangeLog:
* gcc.target/aarch64/chkfeat-1.c: New test.
* gcc.target/aarch64/chkfeat-2.c: New test.
Diff:
---
gcc/testsuite/gcc.target/aarch64/chkfeat-1.c | 75 ++++++++++++++++++++++++++++
gcc/testsuite/gcc.target/aarch64/chkfeat-2.c | 15 ++++++
2 files changed, 90 insertions(+)
diff --git a/gcc/testsuite/gcc.target/aarch64/chkfeat-1.c b/gcc/testsuite/gcc.target/aarch64/chkfeat-1.c
new file mode 100644
index 00000000000..2fae81e740f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/chkfeat-1.c
@@ -0,0 +1,75 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mbranch-protection=none" } */
+/* { dg-final { check-function-bodies "**" "" "" } } */
+
+/*
+**foo1:
+** mov x16, 1
+** hint 40 // chkfeat x16
+** mov x0, x16
+** ret
+*/
+unsigned long long
+foo1 (void)
+{
+ return __builtin_aarch64_chkfeat (1);
+}
+
+/*
+**foo2:
+** mov x16, 1
+** movk x16, 0x5678, lsl 32
+** movk x16, 0x1234, lsl 48
+** hint 40 // chkfeat x16
+** mov x0, x16
+** ret
+*/
+unsigned long long
+foo2 (void)
+{
+ return __builtin_aarch64_chkfeat (0x1234567800000001);
+}
+
+/*
+**foo3:
+** mov x16, x0
+** hint 40 // chkfeat x16
+** mov x0, x16
+** ret
+*/
+unsigned long long
+foo3 (unsigned long long x)
+{
+ return __builtin_aarch64_chkfeat (x);
+}
+
+/*
+**foo4:
+** ldr x16, \[x0\]
+** hint 40 // chkfeat x16
+** str x16, \[x0\]
+** ret
+*/
+void
+foo4 (unsigned long long *p)
+{
+ *p = __builtin_aarch64_chkfeat (*p);
+}
+
+/*
+**foo5:
+** mov x16, 1
+** hint 40 // chkfeat x16
+** cmp x16, 0
+**(
+** csel w0, w1, w0, eq
+**|
+** csel w0, w0, w1, ne
+**)
+** ret
+*/
+int
+foo5 (int x, int y)
+{
+ return __builtin_aarch64_chkfeat (1) ? x : y;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/chkfeat-2.c b/gcc/testsuite/gcc.target/aarch64/chkfeat-2.c
new file mode 100644
index 00000000000..682524e244f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/chkfeat-2.c
@@ -0,0 +1,15 @@
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+/* { dg-final { scan-assembler-times {hint\t40 // chkfeat x16} 2 } } */
+
+void bar (void);
+
+/* Extern call may change enabled HW features. */
+unsigned long long
+foo (void)
+{
+ unsigned long long a = __builtin_aarch64_chkfeat (1);
+ bar ();
+ unsigned long long b = __builtin_aarch64_chkfeat (1);
+ return a + b;
+}
^ permalink raw reply [flat|nested] 2+ messages in thread
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2024-02-14 15:26 [gcc(refs/vendors/ARM/heads/gcs)] aarch64: Add __builtin_aarch64_chkfeat tests Szabolcs Nagy
2024-04-10 10:48 Szabolcs Nagy
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