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* [gcc(refs/users/meissner/heads/work158-future)] Revert changes
@ 2024-02-15 19:25 Michael Meissner
0 siblings, 0 replies; only message in thread
From: Michael Meissner @ 2024-02-15 19:25 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:af099cf12ced1c502f4e27ad590d676a5473baeb
commit af099cf12ced1c502f4e27ad590d676a5473baeb
Author: Michael Meissner <meissner@linux.ibm.com>
Date: Thu Feb 15 14:25:50 2024 -0500
Revert changes
Diff:
---
gcc/config/rs6000/rs6000-c.cc | 2 --
gcc/config/rs6000/rs6000-cpus.def | 8 --------
gcc/config/rs6000/rs6000-opts.h | 1 -
gcc/config/rs6000/rs6000-tables.opt | 3 ---
gcc/config/rs6000/rs6000.cc | 31 ++-----------------------------
gcc/config/rs6000/rs6000.h | 1 -
gcc/config/rs6000/rs6000.md | 2 +-
gcc/config/rs6000/rs6000.opt | 4 ----
gcc/doc/invoke.texi | 2 +-
9 files changed, 4 insertions(+), 50 deletions(-)
diff --git a/gcc/config/rs6000/rs6000-c.cc b/gcc/config/rs6000/rs6000-c.cc
index f2fb5bef678c..ce0b14a8d373 100644
--- a/gcc/config/rs6000/rs6000-c.cc
+++ b/gcc/config/rs6000/rs6000-c.cc
@@ -447,8 +447,6 @@ rs6000_target_modify_macros (bool define_p, HOST_WIDE_INT flags)
rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR9");
if ((flags & OPTION_MASK_POWER10) != 0)
rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR10");
- if ((flags & OPTION_MASK_FUTURE) != 0)
- rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR_FUTURE");
if ((flags & OPTION_MASK_SOFT_FLOAT) != 0)
rs6000_define_or_undefine_macro (define_p, "_SOFT_FLOAT");
if ((flags & OPTION_MASK_RECIP_PRECISION) != 0)
diff --git a/gcc/config/rs6000/rs6000-cpus.def b/gcc/config/rs6000/rs6000-cpus.def
index ed934e0213e5..d28cc87eb2a1 100644
--- a/gcc/config/rs6000/rs6000-cpus.def
+++ b/gcc/config/rs6000/rs6000-cpus.def
@@ -88,11 +88,6 @@
| OPTION_MASK_POWER10 \
| OTHER_POWER10_MASKS)
-/* Flags for a potential future processor that may or may not be delivered. */
-#define ISA_FUTURE_MASKS_SERVER (ISA_3_1_MASKS_SERVER \
- | OPTION_MASK_BLOCK_OPS_VECTOR_PAIR \
- | OPTION_MASK_FUTURE)
-
/* Flags that need to be turned off if -mno-power9-vector. */
#define OTHER_P9_VECTOR_MASKS (OPTION_MASK_FLOAT128_HW \
| OPTION_MASK_P9_MINMAX)
@@ -128,7 +123,6 @@
/* Mask of all options to set the default isa flags based on -mcpu=<xxx>. */
#define POWERPC_MASKS (OPTION_MASK_ALTIVEC \
- | OPTION_MASK_BLOCK_OPS_VECTOR_PAIR \
| OPTION_MASK_CMPB \
| OPTION_MASK_CRYPTO \
| OPTION_MASK_DFP \
@@ -141,7 +135,6 @@
| OPTION_MASK_LOAD_VECTOR_PAIR \
| OPTION_MASK_POWER10 \
| OPTION_MASK_P10_FUSION \
- | OPTION_MASK_FUTURE \
| OPTION_MASK_HTM \
| OPTION_MASK_ISEL \
| OPTION_MASK_MFCRF \
@@ -274,4 +267,3 @@ RS6000_CPU ("powerpc64", PROCESSOR_POWERPC64, OPTION_MASK_PPC_GFXOPT
RS6000_CPU ("powerpc64le", PROCESSOR_POWER8, MASK_POWERPC64
| ISA_2_7_MASKS_SERVER | OPTION_MASK_HTM)
RS6000_CPU ("rs64", PROCESSOR_RS64A, OPTION_MASK_PPC_GFXOPT | MASK_POWERPC64)
-RS6000_CPU ("future", PROCESSOR_FUTURE, MASK_POWERPC64 | ISA_FUTURE_MASKS_SERVER)
diff --git a/gcc/config/rs6000/rs6000-opts.h b/gcc/config/rs6000/rs6000-opts.h
index b2ae180c0f05..33fd0efc936f 100644
--- a/gcc/config/rs6000/rs6000-opts.h
+++ b/gcc/config/rs6000/rs6000-opts.h
@@ -62,7 +62,6 @@ enum processor_type
PROCESSOR_POWER8,
PROCESSOR_POWER9,
PROCESSOR_POWER10,
- PROCESSOR_FUTURE,
PROCESSOR_RS64A,
PROCESSOR_MPCCORE,
diff --git a/gcc/config/rs6000/rs6000-tables.opt b/gcc/config/rs6000/rs6000-tables.opt
index 97fa98a2e65e..65f46709716f 100644
--- a/gcc/config/rs6000/rs6000-tables.opt
+++ b/gcc/config/rs6000/rs6000-tables.opt
@@ -197,6 +197,3 @@ Enum(rs6000_cpu_opt_value) String(powerpc64le) Value(55)
EnumValue
Enum(rs6000_cpu_opt_value) String(rs64) Value(56)
-EnumValue
-Enum(rs6000_cpu_opt_value) String(future) Value(57)
-
diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc
index 6bd537836d1b..68a14c6f88a3 100644
--- a/gcc/config/rs6000/rs6000.cc
+++ b/gcc/config/rs6000/rs6000.cc
@@ -3756,40 +3756,16 @@ rs6000_option_override_internal (bool global_init_p)
rs6000_isa_flags &= ~OPTION_MASK_POWERPC64;
#endif
- /* At the moment, we don't have explicit -mtune=future support. If the user
- explicitly uses -mtune=future, give a warning. If not, use the power10
- tuning until future tuning is added. */
if (rs6000_tune_index >= 0)
- {
- enum processor_type cur_proc
- = processor_target_table[rs6000_tune_index].processor;
-
- if (cur_proc == PROCESSOR_FUTURE)
- {
- warning (0, "%qs is not currently supported", "-mtune=future");
- rs6000_tune_index = rs6000_cpu_name_lookup ("power10");
- }
- tune_index = rs6000_tune_index;
- }
+ tune_index = rs6000_tune_index;
else if (cpu_index >= 0)
- {
- enum processor_type cur_cpu
- = processor_target_table[cpu_index].processor;
-
- rs6000_tune_index = tune_index
- = (cur_cpu == PROCESSOR_FUTURE
- ? rs6000_cpu_name_lookup ("power10")
- : cpu_index);
- }
+ rs6000_tune_index = tune_index = cpu_index;
else
{
size_t i;
enum processor_type tune_proc
= (TARGET_POWERPC64 ? PROCESSOR_DEFAULT64 : PROCESSOR_DEFAULT);
- if (tune_proc == PROCESSOR_FUTURE)
- tune_proc = PROCESSOR_POWER10;
-
tune_index = -1;
for (i = 0; i < ARRAY_SIZE (processor_target_table); i++)
if (processor_target_table[i].processor == tune_proc)
@@ -5968,8 +5944,6 @@ rs6000_machine_from_flags (void)
/* Disable the flags that should never influence the .machine selection. */
flags &= ~(OPTION_MASK_PPC_GFXOPT | OPTION_MASK_PPC_GPOPT | OPTION_MASK_ISEL);
- if ((flags & (ISA_FUTURE_MASKS_SERVER & ~ISA_3_1_MASKS_SERVER)) != 0)
- return "future";
if ((flags & (ISA_3_1_MASKS_SERVER & ~ISA_3_0_MASKS_SERVER)) != 0)
return "power10";
if ((flags & (ISA_3_0_MASKS_SERVER & ~ISA_2_7_MASKS_SERVER)) != 0)
@@ -24531,7 +24505,6 @@ static struct rs6000_opt_mask const rs6000_opt_masks[] =
{ "float128-hardware", OPTION_MASK_FLOAT128_HW, false, true },
{ "fprnd", OPTION_MASK_FPRND, false, true },
{ "power10", OPTION_MASK_POWER10, false, true },
- { "future", OPTION_MASK_FUTURE, false, true },
{ "hard-dfp", OPTION_MASK_DFP, false, true },
{ "htm", OPTION_MASK_HTM, false, true },
{ "isel", OPTION_MASK_ISEL, false, true },
diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h
index 43209f9a6e72..2291fe8d3a34 100644
--- a/gcc/config/rs6000/rs6000.h
+++ b/gcc/config/rs6000/rs6000.h
@@ -163,7 +163,6 @@
mcpu=e5500: -me5500; \
mcpu=e6500: -me6500; \
mcpu=titan: -mtitan; \
- mcpu=future: -mfuture; \
!mcpu*: %{mpower9-vector: -mpower9; \
mpower8-vector|mcrypto|mdirect-move|mhtm: -mpower8; \
mvsx: -mpower7; \
diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index bd0ecdd90070..4acb4031ae08 100644
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -350,7 +350,7 @@
ppc750,ppc7400,ppc7450,
ppc403,ppc405,ppc440,ppc476,
ppc8540,ppc8548,ppce300c2,ppce300c3,ppce500mc,ppce500mc64,ppce5500,ppce6500,
- power4,power5,power6,power7,power8,power9,power10,future,
+ power4,power5,power6,power7,power8,power9,power10,
rs64a,mpccore,cell,ppca2,titan"
(const (symbol_ref "(enum attr_cpu) rs6000_tune")))
diff --git a/gcc/config/rs6000/rs6000.opt b/gcc/config/rs6000/rs6000.opt
index 4ad1d8e302c0..60b923f5e4b3 100644
--- a/gcc/config/rs6000/rs6000.opt
+++ b/gcc/config/rs6000/rs6000.opt
@@ -612,10 +612,6 @@ mrop-protect
Target Var(rs6000_rop_protect) Init(0)
Enable instructions that guard against return-oriented programming attacks.
-mfuture
-Target Undocumented Mask(FUTURE) Var(rs6000_isa_flags) Warn(Do not use %<-mfuture>)
-Generate (do not generate) store vector pair instructions.
-
mprivileged
Target Var(rs6000_privileged) Init(0)
Generate code that will run in privileged state.
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index dcc9f82171c8..71339b8b30fa 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -31091,7 +31091,7 @@ Supported values for @var{cpu_type} are @samp{401}, @samp{403},
@samp{titan}, @samp{power3}, @samp{power4}, @samp{power5}, @samp{power5+},
@samp{power6}, @samp{power6x}, @samp{power7}, @samp{power8},
@samp{power9}, @samp{power10}, @samp{powerpc}, @samp{powerpc64},
-@samp{powerpc64le}, @samp{rs64}, @samp{future}, and @samp{native}.
+@samp{powerpc64le}, @samp{rs64}, and @samp{native}.
@option{-mcpu=powerpc}, @option{-mcpu=powerpc64}, and
@option{-mcpu=powerpc64le} specify pure 32-bit PowerPC (either
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