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* [gcc(refs/users/meissner/heads/work158-pnext)] Import patches #111-116 from work158-future
@ 2024-02-15 22:45 Michael Meissner
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From: Michael Meissner @ 2024-02-15 22:45 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:944760387ab9b831a7cd5ed97caad23c4eac3152
commit 944760387ab9b831a7cd5ed97caad23c4eac3152
Author: Michael Meissner <meissner@linux.ibm.com>
Date: Thu Feb 15 17:45:41 2024 -0500
Import patches #111-116 from work158-future
Diff:
---
gcc/ChangeLog.pnext | 101 ++++++++++++++++++++++++++++++++++++
gcc/config.gcc | 4 +-
gcc/config/rs6000/rs6000-c.cc | 2 +
gcc/config/rs6000/rs6000-cpus.def | 8 +++
gcc/config/rs6000/rs6000-opts.h | 3 ++
gcc/config/rs6000/rs6000-tables.opt | 3 ++
gcc/config/rs6000/rs6000.cc | 3 ++
gcc/config/rs6000/rs6000.h | 1 +
gcc/config/rs6000/rs6000.opt | 3 ++
gcc/doc/invoke.texi | 2 +-
10 files changed, 127 insertions(+), 3 deletions(-)
diff --git a/gcc/ChangeLog.pnext b/gcc/ChangeLog.pnext
index 9d9fb36de8b4..35c9601b022b 100644
--- a/gcc/ChangeLog.pnext
+++ b/gcc/ChangeLog.pnext
@@ -1,3 +1,104 @@
+==================== Branch work158-pnext, patch #116 from work158-future branch ====================
+
+Add configure support for PowerPC future.
+
+2024-02-15 Michael Meissner <meissner@linux.ibm.com>
+
+gcc/
+
+ * config.gcc (powerpc*-*-*, rs6000-*-*): Add support for
+ --with-cpu=future.
+
+==================== Branch work158-pnext, patch #115 from work158-future branch ====================
+
+Enable using vector pair load/store for -mcpu=future
+
+Late in the development of power10, we discovered that there were some issues
+in using load vector pair and store vector pair instructions to do memory
+copies, so the defaults were modified to not use these instructions. This
+patch re-enables using load and store vector pair instructions.
+
+Previously the -mblock-ops-vector-pair switch was not set in POWERPC_MASKS.
+This means the option was not reset if the cpu was changed via target
+attributes or targt pragmas. I added this mask to POWERPC_MASKS since the
+option is set via -mcpu=future.
+
+2024-02-15 Michael Meissner <meissner@linux.ibm.com>
+
+gcc/
+
+ * config/rs6000/rs6000-cpus.def (ISA_FUTURE_MASKS_SERVER): Turn on
+ -mblock-ops-vector-pair for -mcpu=future.
+ (POWERPC_MASKS): Add -mblock-ops-vector-pair.
+
+==================== Branch work158-pnext, patch #114 from work158-future branch ====================
+
+Set future machine type in assembler if -mcpu=future
+
+This patch uses the .machine directive to tell the assembler to use any
+possible future instructions.
+
+2024-02-15 Michael Meissner <meissner@linux.ibm.com>
+
+gcc/
+
+ * config/rs6000/rs6000.cc (rs6000_machine_from_flags): Output .machine
+ future if -mcpu=future.
+
+==================== Branch work158-pnext, patch #113 from work158-future branch ====================
+
+Pass -mfuture to assembler if -mcpu=future.
+
+This patch passes -mfuture to the assembler if the user used -mcpu=future.
+
+2024-02-15 Michael Meissner <meissner@linux.ibm.com>
+
+gcc/
+
+ * config/rs6000/rs6000.h (ASM_CPU_SPEC): If -mcpu=future, pass -mfuture
+ to the assembler.
+
+==================== Branch work158-pnext, patch #112 from work158-future branch ====================
+
+Define _ARCH_PWR_FUTURE if -mcpu=future.
+
+This patch defines _ARCH_PWR_FUTURE if -mcpu=future was used.
+
+2024-02-15 Michael Meissner <meissner@linux.ibm.com>
+
+gcc/
+
+ * config/rs6000/rs6000-c.cc (rs6000_target_modify_macros): Define
+ _ARCH_PWR_FUTURE if -mcpu=future.
+
+==================== Branch work158-pnext, patch #111 from work158-future branch ====================
+
+Add initial -mcpu=future support.
+
+This patch adds the basic support for -mcpu=future, which is a framework to add
+support for possible future PowerPCs. Until there are changes for a possible
+future PowerPC, -mcpu=future and -mtune=future default to power10. An ISA bit
+is set to denote possible future instructions are enabled.
+
+2024-02-15 Michael Meissner <meissner@linux.ibm.com>
+
+gcc/
+
+ * config/rs6000/rs6000-cpus.def (ISA_FUTURE_MASKS_SERVER): New option
+ bits for -mcpu=future.
+ (POWERPC_MASKS): Add -mfuture mask.
+ (future cpu): Add -mcpu=future.
+ * config/rs6000/rs6000-opts.h (PROCESSOR_FUTURE): Map PROCESSOR_FUTURE
+ into PROCESSOR_POWER10 until there are differences that necessate a new
+ processor enumeration.
+ * config/rs6000/rs6000-tables.opt (rs6000_cpu_opt_value): Add future
+ variant.
+ * config/rs6000/rs6000.cc (rs6000_opt_masks): Add printing -mfuture if
+ -mdebug=reg is used. Do not allow it to be set with a target attribute
+ or pragma.
+ * config/rs6000/rs6000.opt (-mfuture): New ISA bit for -mcpu=future.
+ * doc/invoke.texi (PowerPC options): Document -mcpu=future.
+
==================== Branch work158-pnext, patch #107 was reverted from work158-future branch ====================
==================== Branch work158-pnext, patch #106 was reverted from work158-future branch ====================
diff --git a/gcc/config.gcc b/gcc/config.gcc
index a0f9c6723083..8dac5931e7f0 100644
--- a/gcc/config.gcc
+++ b/gcc/config.gcc
@@ -530,7 +530,7 @@ powerpc*-*-*)
extra_headers="${extra_headers} ppu_intrinsics.h spu2vmx.h vec_types.h si2vmx.h"
extra_headers="${extra_headers} amo.h"
case x$with_cpu in
- xpowerpc64|xdefault64|x6[23]0|x970|xG5|xpower[3456789]|xpower10|xpower6x|xrs64a|xcell|xa2|xe500mc64|xe5500|xe6500)
+ xpowerpc64|xdefault64|x6[23]0|x970|xG5|xpower[3456789]|xpower10|xpower6x|xrs64a|xcell|xa2|xe500mc64|xe5500|xe6500|future)
cpu_is_64bit=yes
;;
esac
@@ -5555,7 +5555,7 @@ case "${target}" in
;;
"" | common | native \
| power[3456789] | power10 | power5+ | power6x \
- | powerpc | powerpc64 | powerpc64le \
+ | powerpc | powerpc64 | powerpc64le | future \
| rs64 \
| 401 | 403 | 405 | 405fp | 440 | 440fp | 464 | 464fp \
| 476 | 476fp | 505 | 601 | 602 | 603 | 603e | ec603e \
diff --git a/gcc/config/rs6000/rs6000-c.cc b/gcc/config/rs6000/rs6000-c.cc
index ce0b14a8d373..f2fb5bef678c 100644
--- a/gcc/config/rs6000/rs6000-c.cc
+++ b/gcc/config/rs6000/rs6000-c.cc
@@ -447,6 +447,8 @@ rs6000_target_modify_macros (bool define_p, HOST_WIDE_INT flags)
rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR9");
if ((flags & OPTION_MASK_POWER10) != 0)
rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR10");
+ if ((flags & OPTION_MASK_FUTURE) != 0)
+ rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR_FUTURE");
if ((flags & OPTION_MASK_SOFT_FLOAT) != 0)
rs6000_define_or_undefine_macro (define_p, "_SOFT_FLOAT");
if ((flags & OPTION_MASK_RECIP_PRECISION) != 0)
diff --git a/gcc/config/rs6000/rs6000-cpus.def b/gcc/config/rs6000/rs6000-cpus.def
index d28cc87eb2a1..ed934e0213e5 100644
--- a/gcc/config/rs6000/rs6000-cpus.def
+++ b/gcc/config/rs6000/rs6000-cpus.def
@@ -88,6 +88,11 @@
| OPTION_MASK_POWER10 \
| OTHER_POWER10_MASKS)
+/* Flags for a potential future processor that may or may not be delivered. */
+#define ISA_FUTURE_MASKS_SERVER (ISA_3_1_MASKS_SERVER \
+ | OPTION_MASK_BLOCK_OPS_VECTOR_PAIR \
+ | OPTION_MASK_FUTURE)
+
/* Flags that need to be turned off if -mno-power9-vector. */
#define OTHER_P9_VECTOR_MASKS (OPTION_MASK_FLOAT128_HW \
| OPTION_MASK_P9_MINMAX)
@@ -123,6 +128,7 @@
/* Mask of all options to set the default isa flags based on -mcpu=<xxx>. */
#define POWERPC_MASKS (OPTION_MASK_ALTIVEC \
+ | OPTION_MASK_BLOCK_OPS_VECTOR_PAIR \
| OPTION_MASK_CMPB \
| OPTION_MASK_CRYPTO \
| OPTION_MASK_DFP \
@@ -135,6 +141,7 @@
| OPTION_MASK_LOAD_VECTOR_PAIR \
| OPTION_MASK_POWER10 \
| OPTION_MASK_P10_FUSION \
+ | OPTION_MASK_FUTURE \
| OPTION_MASK_HTM \
| OPTION_MASK_ISEL \
| OPTION_MASK_MFCRF \
@@ -267,3 +274,4 @@ RS6000_CPU ("powerpc64", PROCESSOR_POWERPC64, OPTION_MASK_PPC_GFXOPT
RS6000_CPU ("powerpc64le", PROCESSOR_POWER8, MASK_POWERPC64
| ISA_2_7_MASKS_SERVER | OPTION_MASK_HTM)
RS6000_CPU ("rs64", PROCESSOR_RS64A, OPTION_MASK_PPC_GFXOPT | MASK_POWERPC64)
+RS6000_CPU ("future", PROCESSOR_FUTURE, MASK_POWERPC64 | ISA_FUTURE_MASKS_SERVER)
diff --git a/gcc/config/rs6000/rs6000-opts.h b/gcc/config/rs6000/rs6000-opts.h
index 33fd0efc936f..e4e90a1603d6 100644
--- a/gcc/config/rs6000/rs6000-opts.h
+++ b/gcc/config/rs6000/rs6000-opts.h
@@ -70,6 +70,9 @@ enum processor_type
PROCESSOR_TITAN
};
+/* Until there are changes for -mcpu=future, treat -mcpu=future to be like
+ -mcpu=power10. */
+#define PROCESSOR_FUTURE PROCESSOR_POWER10
/* Types of costly dependences. */
enum rs6000_dependence_cost
diff --git a/gcc/config/rs6000/rs6000-tables.opt b/gcc/config/rs6000/rs6000-tables.opt
index 65f46709716f..97fa98a2e65e 100644
--- a/gcc/config/rs6000/rs6000-tables.opt
+++ b/gcc/config/rs6000/rs6000-tables.opt
@@ -197,3 +197,6 @@ Enum(rs6000_cpu_opt_value) String(powerpc64le) Value(55)
EnumValue
Enum(rs6000_cpu_opt_value) String(rs64) Value(56)
+EnumValue
+Enum(rs6000_cpu_opt_value) String(future) Value(57)
+
diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc
index 68a14c6f88a3..83ae71e165dd 100644
--- a/gcc/config/rs6000/rs6000.cc
+++ b/gcc/config/rs6000/rs6000.cc
@@ -5944,6 +5944,8 @@ rs6000_machine_from_flags (void)
/* Disable the flags that should never influence the .machine selection. */
flags &= ~(OPTION_MASK_PPC_GFXOPT | OPTION_MASK_PPC_GPOPT | OPTION_MASK_ISEL);
+ if ((flags & OPTION_MASK_FUTURE) != 0)
+ return "future";
if ((flags & (ISA_3_1_MASKS_SERVER & ~ISA_3_0_MASKS_SERVER)) != 0)
return "power10";
if ((flags & (ISA_3_0_MASKS_SERVER & ~ISA_2_7_MASKS_SERVER)) != 0)
@@ -24504,6 +24506,7 @@ static struct rs6000_opt_mask const rs6000_opt_masks[] =
{ "float128", OPTION_MASK_FLOAT128_KEYWORD, false, true },
{ "float128-hardware", OPTION_MASK_FLOAT128_HW, false, true },
{ "fprnd", OPTION_MASK_FPRND, false, true },
+ { "future", OPTION_MASK_FUTURE, false, false },
{ "power10", OPTION_MASK_POWER10, false, true },
{ "hard-dfp", OPTION_MASK_DFP, false, true },
{ "htm", OPTION_MASK_HTM, false, true },
diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h
index 2291fe8d3a34..43209f9a6e72 100644
--- a/gcc/config/rs6000/rs6000.h
+++ b/gcc/config/rs6000/rs6000.h
@@ -163,6 +163,7 @@
mcpu=e5500: -me5500; \
mcpu=e6500: -me6500; \
mcpu=titan: -mtitan; \
+ mcpu=future: -mfuture; \
!mcpu*: %{mpower9-vector: -mpower9; \
mpower8-vector|mcrypto|mdirect-move|mhtm: -mpower8; \
mvsx: -mpower7; \
diff --git a/gcc/config/rs6000/rs6000.opt b/gcc/config/rs6000/rs6000.opt
index 60b923f5e4b3..059337c50d70 100644
--- a/gcc/config/rs6000/rs6000.opt
+++ b/gcc/config/rs6000/rs6000.opt
@@ -612,6 +612,9 @@ mrop-protect
Target Var(rs6000_rop_protect) Init(0)
Enable instructions that guard against return-oriented programming attacks.
+mfuture
+Target Undocumented Mask(FUTURE) Var(rs6000_isa_flags) Warn(Do not use %<-mfuture>)
+
mprivileged
Target Var(rs6000_privileged) Init(0)
Generate code that will run in privileged state.
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index 71339b8b30fa..dcc9f82171c8 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -31091,7 +31091,7 @@ Supported values for @var{cpu_type} are @samp{401}, @samp{403},
@samp{titan}, @samp{power3}, @samp{power4}, @samp{power5}, @samp{power5+},
@samp{power6}, @samp{power6x}, @samp{power7}, @samp{power8},
@samp{power9}, @samp{power10}, @samp{powerpc}, @samp{powerpc64},
-@samp{powerpc64le}, @samp{rs64}, and @samp{native}.
+@samp{powerpc64le}, @samp{rs64}, @samp{future}, and @samp{native}.
@option{-mcpu=powerpc}, @option{-mcpu=powerpc64}, and
@option{-mcpu=powerpc64le} specify pure 32-bit PowerPC (either
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2024-02-15 22:45 [gcc(refs/users/meissner/heads/work158-pnext)] Import patches #111-116 from work158-future Michael Meissner
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