[gcc r13-8360] Daily bump.

[gcc r13-8360] Daily bump.

[GCC Administrator]

https://gcc.gnu.org/g:acafe0f9824e77f1259de1e833886003bf8a6864

commit r13-8360-gacafe0f9824e77f1259de1e833886003bf8a6864
Author: GCC Administrator <gccadmin@gcc.gnu.org>
Date:   Sat Feb 24 00:24:34 2024 +0000

    Daily bump.

Diff:
---
 gcc/ChangeLog           | 21 +++++++++++++++++++++
 gcc/DATESTAMP           |  2 +-
 gcc/testsuite/ChangeLog | 15 +++++++++++++++
 3 files changed, 37 insertions(+), 1 deletion(-)

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 3d9730364cd1..186dd743c434 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,24 @@
+2024-02-23  Richard Earnshaw  <rearnsha@arm.com>
+
+	Backported from master:
+	2024-02-23  Richard Earnshaw  <rearnsha@arm.com>
+
+	PR target/108120
+	* config/arm/neon.md (div<VCVTF:mode>3): Rename from div<mode>3.
+	Gate with ARM_HAVE_NEON_<MODE>_ARITH.
+
+2024-02-23  Xi Ruoyao  <xry111@xry111.site>
+
+	* config/loongarch/genopts/loongarch.opt.in
+	(TARGET_EXPLICIT_RELOCS): Init to M_OPTION_NOT_SEEN.
+	* config/loongarch/loongarch.opt: Regenerate.
+	* config/loongarch/loongarch.cc
+	(loongarch_option_override_internal): Set the default of
+	TARGET_EXPLICIT_RELOCS to HAVE_AS_EXPLICIT_RELOCS
+	&& !loongarch_mrelax.
+	* doc/invoke.texi (-m[no-]explicit-relocs): Update for
+	LoongArch.
+
 2024-02-22  Andrew Pinski  <quic_apinski@quicinc.com>
 
 	Backported from master:
diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP
index bb29f6e6b704..4e5d4ad243a9 100644
--- a/gcc/DATESTAMP
+++ b/gcc/DATESTAMP
@@ -1 +1 @@
-20240223
+20240224
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 472fd14ea0fe..4283a49491e6 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,18 @@
+2024-02-23  Richard Earnshaw  <rearnsha@arm.com>
+
+	Backported from master:
+	2024-02-23  Richard Earnshaw  <rearnsha@arm.com>
+
+	PR target/108120
+	* gcc.target/arm/neon-recip-div-1.c: New file.
+
+2024-02-23  Kito Cheng  <kito.cheng@sifive.com>
+
+	Backported from master:
+	2023-04-20  Kito Cheng  <kito.cheng@sifive.com>
+
+	* gcc.target/riscv/arch-19.c: Add -misa-spec.
+
 2024-02-23  Marek Polacek  <polacek@redhat.com>
 
 	Backported from master: