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* [gcc(refs/users/meissner/heads/work161-dmf)] Use vector pair load/store for memcpy with -mcpu=future
@ 2024-02-29 19:28 Michael Meissner
0 siblings, 0 replies; 8+ messages in thread
From: Michael Meissner @ 2024-02-29 19:28 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:67b3087ce53266cf8bca245ea3616a4c11360291
commit 67b3087ce53266cf8bca245ea3616a4c11360291
Author: Michael Meissner <meissner@linux.ibm.com>
Date: Thu Feb 29 14:22:40 2024 -0500
Use vector pair load/store for memcpy with -mcpu=future
In the development for the power10 processor, GCC did not enable using the load
vector pair and store vector pair instructions when optimizing things like
memory copy. This patch enables using those instructions if -mcpu=future is
used.
2024-02-29 Michael Meissner <meissner@linux.ibm.com>
gcc/
* config/rs6000/rs6000-cpus.def (ISA_FUTURE_MASKS_SERVER): Enable using
load vector pair and store vector pair instructions for memory copy
operations.
(POWERPC_MASKS): Make the bit for enabling using load vector pair and
store vector pair operations set and reset when the PowerPC processor is
changed.
Diff:
---
gcc/config/rs6000/rs6000-cpus.def | 2 ++
1 file changed, 2 insertions(+)
diff --git a/gcc/config/rs6000/rs6000-cpus.def b/gcc/config/rs6000/rs6000-cpus.def
index 77170915615..8da1d560e49 100644
--- a/gcc/config/rs6000/rs6000-cpus.def
+++ b/gcc/config/rs6000/rs6000-cpus.def
@@ -92,6 +92,7 @@
/* Flags for a potential future processor that may or may not be made. */
#define ISA_FUTURE_MASKS_SERVER (ISA_POWER11_MASKS_SERVER \
+ | OPTION_MASK_BLOCK_OPS_VECTOR_PAIR \
| OPTION_MASK_FUTURE)
/* Flags that need to be turned off if -mno-vsx. */
@@ -123,6 +124,7 @@
/* Mask of all options to set the default isa flags based on -mcpu=<xxx>. */
#define POWERPC_MASKS (OPTION_MASK_ALTIVEC \
+ | OPTION_MASK_BLOCK_OPS_VECTOR_PAIR \
| OPTION_MASK_CMPB \
| OPTION_MASK_CRYPTO \
| OPTION_MASK_DFP \
^ permalink raw reply [flat|nested] 8+ messages in thread
* [gcc(refs/users/meissner/heads/work161-dmf)] Use vector pair load/store for memcpy with -mcpu=future
@ 2024-03-05 18:40 Michael Meissner
0 siblings, 0 replies; 8+ messages in thread
From: Michael Meissner @ 2024-03-05 18:40 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:f44d4fce9ef7486129fddb9a1278d8f103c986a2
commit f44d4fce9ef7486129fddb9a1278d8f103c986a2
Author: Michael Meissner <meissner@linux.ibm.com>
Date: Tue Mar 5 13:39:46 2024 -0500
Use vector pair load/store for memcpy with -mcpu=future
In the development for the power10 processor, GCC did not enable using the load
vector pair and store vector pair instructions when optimizing things like
memory copy. This patch enables using those instructions if -mcpu=future is
used.
2024-03-05 Michael Meissner <meissner@linux.ibm.com>
gcc/
* config/rs6000/rs6000-cpus.def (ISA_FUTURE_MASKS_SERVER): Enable using
load vector pair and store vector pair instructions for memory copy
operations.
(POWERPC_MASKS): Make the bit for enabling using load vector pair and
store vector pair operations set and reset when the PowerPC processor is
changed.
Diff:
---
gcc/config/rs6000/rs6000-cpus.def | 2 ++
1 file changed, 2 insertions(+)
diff --git a/gcc/config/rs6000/rs6000-cpus.def b/gcc/config/rs6000/rs6000-cpus.def
index 77170915615..8da1d560e49 100644
--- a/gcc/config/rs6000/rs6000-cpus.def
+++ b/gcc/config/rs6000/rs6000-cpus.def
@@ -92,6 +92,7 @@
/* Flags for a potential future processor that may or may not be made. */
#define ISA_FUTURE_MASKS_SERVER (ISA_POWER11_MASKS_SERVER \
+ | OPTION_MASK_BLOCK_OPS_VECTOR_PAIR \
| OPTION_MASK_FUTURE)
/* Flags that need to be turned off if -mno-vsx. */
@@ -123,6 +124,7 @@
/* Mask of all options to set the default isa flags based on -mcpu=<xxx>. */
#define POWERPC_MASKS (OPTION_MASK_ALTIVEC \
+ | OPTION_MASK_BLOCK_OPS_VECTOR_PAIR \
| OPTION_MASK_CMPB \
| OPTION_MASK_CRYPTO \
| OPTION_MASK_DFP \
^ permalink raw reply [flat|nested] 8+ messages in thread
* [gcc(refs/users/meissner/heads/work161-dmf)] Use vector pair load/store for memcpy with -mcpu=future
@ 2024-03-05 4:54 Michael Meissner
0 siblings, 0 replies; 8+ messages in thread
From: Michael Meissner @ 2024-03-05 4:54 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:0e4e5e62987bd34a283cbecf6bba7db04d277a5e
commit 0e4e5e62987bd34a283cbecf6bba7db04d277a5e
Author: Michael Meissner <meissner@linux.ibm.com>
Date: Mon Mar 4 23:53:27 2024 -0500
Use vector pair load/store for memcpy with -mcpu=future
In the development for the power10 processor, GCC did not enable using the load
vector pair and store vector pair instructions when optimizing things like
memory copy. This patch enables using those instructions if -mcpu=future is
used.
2024-03-04 Michael Meissner <meissner@linux.ibm.com>
gcc/
* config/rs6000/rs6000-cpus.def (ISA_FUTURE_MASKS_SERVER): Enable using
load vector pair and store vector pair instructions for memory copy
operations.
(POWERPC_MASKS): Make the bit for enabling using load vector pair and
store vector pair operations set and reset when the PowerPC processor is
changed.
Diff:
---
gcc/config/rs6000/rs6000-cpus.def | 2 ++
1 file changed, 2 insertions(+)
diff --git a/gcc/config/rs6000/rs6000-cpus.def b/gcc/config/rs6000/rs6000-cpus.def
index 77170915615..8da1d560e49 100644
--- a/gcc/config/rs6000/rs6000-cpus.def
+++ b/gcc/config/rs6000/rs6000-cpus.def
@@ -92,6 +92,7 @@
/* Flags for a potential future processor that may or may not be made. */
#define ISA_FUTURE_MASKS_SERVER (ISA_POWER11_MASKS_SERVER \
+ | OPTION_MASK_BLOCK_OPS_VECTOR_PAIR \
| OPTION_MASK_FUTURE)
/* Flags that need to be turned off if -mno-vsx. */
@@ -123,6 +124,7 @@
/* Mask of all options to set the default isa flags based on -mcpu=<xxx>. */
#define POWERPC_MASKS (OPTION_MASK_ALTIVEC \
+ | OPTION_MASK_BLOCK_OPS_VECTOR_PAIR \
| OPTION_MASK_CMPB \
| OPTION_MASK_CRYPTO \
| OPTION_MASK_DFP \
^ permalink raw reply [flat|nested] 8+ messages in thread
* [gcc(refs/users/meissner/heads/work161-dmf)] Use vector pair load/store for memcpy with -mcpu=future
@ 2024-03-04 23:41 Michael Meissner
0 siblings, 0 replies; 8+ messages in thread
From: Michael Meissner @ 2024-03-04 23:41 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:23a6bda12e8690dfb52a8a4a41bc422ab2c2b1d2
commit 23a6bda12e8690dfb52a8a4a41bc422ab2c2b1d2
Author: Michael Meissner <meissner@linux.ibm.com>
Date: Mon Mar 4 14:53:19 2024 -0500
Use vector pair load/store for memcpy with -mcpu=future
In the development for the power10 processor, GCC did not enable using the load
vector pair and store vector pair instructions when optimizing things like
memory copy. This patch enables using those instructions if -mcpu=future is
used.
2024-03-04 Michael Meissner <meissner@linux.ibm.com>
gcc/
* config/rs6000/rs6000-cpus.def (ISA_FUTURE_MASKS_SERVER): Enable using
load vector pair and store vector pair instructions for memory copy
operations.
(POWERPC_MASKS): Make the bit for enabling using load vector pair and
store vector pair operations set and reset when the PowerPC processor is
changed.
Diff:
---
gcc/config/rs6000/rs6000-cpus.def | 2 ++
1 file changed, 2 insertions(+)
diff --git a/gcc/config/rs6000/rs6000-cpus.def b/gcc/config/rs6000/rs6000-cpus.def
index 77170915615..8da1d560e49 100644
--- a/gcc/config/rs6000/rs6000-cpus.def
+++ b/gcc/config/rs6000/rs6000-cpus.def
@@ -92,6 +92,7 @@
/* Flags for a potential future processor that may or may not be made. */
#define ISA_FUTURE_MASKS_SERVER (ISA_POWER11_MASKS_SERVER \
+ | OPTION_MASK_BLOCK_OPS_VECTOR_PAIR \
| OPTION_MASK_FUTURE)
/* Flags that need to be turned off if -mno-vsx. */
@@ -123,6 +124,7 @@
/* Mask of all options to set the default isa flags based on -mcpu=<xxx>. */
#define POWERPC_MASKS (OPTION_MASK_ALTIVEC \
+ | OPTION_MASK_BLOCK_OPS_VECTOR_PAIR \
| OPTION_MASK_CMPB \
| OPTION_MASK_CRYPTO \
| OPTION_MASK_DFP \
^ permalink raw reply [flat|nested] 8+ messages in thread
* [gcc(refs/users/meissner/heads/work161-dmf)] Use vector pair load/store for memcpy with -mcpu=future
@ 2024-03-01 23:34 Michael Meissner
0 siblings, 0 replies; 8+ messages in thread
From: Michael Meissner @ 2024-03-01 23:34 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:a1e127935fe9e7135bf3cc55dcf8c0bcc352e065
commit a1e127935fe9e7135bf3cc55dcf8c0bcc352e065
Author: Michael Meissner <meissner@linux.ibm.com>
Date: Fri Mar 1 16:56:11 2024 -0500
Use vector pair load/store for memcpy with -mcpu=future
In the development for the power10 processor, GCC did not enable using the load
vector pair and store vector pair instructions when optimizing things like
memory copy. This patch enables using those instructions if -mcpu=future is
used.
2024-03-01 Michael Meissner <meissner@linux.ibm.com>
gcc/
* config/rs6000/rs6000-cpus.def (ISA_FUTURE_MASKS_SERVER): Enable using
load vector pair and store vector pair instructions for memory copy
operations.
(POWERPC_MASKS): Make the bit for enabling using load vector pair and
store vector pair operations set and reset when the PowerPC processor is
changed.
Diff:
---
gcc/config/rs6000/rs6000-cpus.def | 2 ++
1 file changed, 2 insertions(+)
diff --git a/gcc/config/rs6000/rs6000-cpus.def b/gcc/config/rs6000/rs6000-cpus.def
index 77170915615..8da1d560e49 100644
--- a/gcc/config/rs6000/rs6000-cpus.def
+++ b/gcc/config/rs6000/rs6000-cpus.def
@@ -92,6 +92,7 @@
/* Flags for a potential future processor that may or may not be made. */
#define ISA_FUTURE_MASKS_SERVER (ISA_POWER11_MASKS_SERVER \
+ | OPTION_MASK_BLOCK_OPS_VECTOR_PAIR \
| OPTION_MASK_FUTURE)
/* Flags that need to be turned off if -mno-vsx. */
@@ -123,6 +124,7 @@
/* Mask of all options to set the default isa flags based on -mcpu=<xxx>. */
#define POWERPC_MASKS (OPTION_MASK_ALTIVEC \
+ | OPTION_MASK_BLOCK_OPS_VECTOR_PAIR \
| OPTION_MASK_CMPB \
| OPTION_MASK_CRYPTO \
| OPTION_MASK_DFP \
^ permalink raw reply [flat|nested] 8+ messages in thread
* [gcc(refs/users/meissner/heads/work161-dmf)] Use vector pair load/store for memcpy with -mcpu=future
@ 2024-03-01 21:46 Michael Meissner
0 siblings, 0 replies; 8+ messages in thread
From: Michael Meissner @ 2024-03-01 21:46 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:b3a29badca7205d180694f4ab77f2737b161aed4
commit b3a29badca7205d180694f4ab77f2737b161aed4
Author: Michael Meissner <meissner@linux.ibm.com>
Date: Fri Mar 1 15:40:02 2024 -0500
Use vector pair load/store for memcpy with -mcpu=future
In the development for the power10 processor, GCC did not enable using the load
vector pair and store vector pair instructions when optimizing things like
memory copy. This patch enables using those instructions if -mcpu=future is
used.
2024-03-01 Michael Meissner <meissner@linux.ibm.com>
gcc/
* config/rs6000/rs6000-cpus.def (ISA_FUTURE_MASKS_SERVER): Enable using
load vector pair and store vector pair instructions for memory copy
operations.
(POWERPC_MASKS): Make the bit for enabling using load vector pair and
store vector pair operations set and reset when the PowerPC processor is
changed.
Diff:
---
gcc/config/rs6000/rs6000-cpus.def | 2 ++
1 file changed, 2 insertions(+)
diff --git a/gcc/config/rs6000/rs6000-cpus.def b/gcc/config/rs6000/rs6000-cpus.def
index 77170915615..8da1d560e49 100644
--- a/gcc/config/rs6000/rs6000-cpus.def
+++ b/gcc/config/rs6000/rs6000-cpus.def
@@ -92,6 +92,7 @@
/* Flags for a potential future processor that may or may not be made. */
#define ISA_FUTURE_MASKS_SERVER (ISA_POWER11_MASKS_SERVER \
+ | OPTION_MASK_BLOCK_OPS_VECTOR_PAIR \
| OPTION_MASK_FUTURE)
/* Flags that need to be turned off if -mno-vsx. */
@@ -123,6 +124,7 @@
/* Mask of all options to set the default isa flags based on -mcpu=<xxx>. */
#define POWERPC_MASKS (OPTION_MASK_ALTIVEC \
+ | OPTION_MASK_BLOCK_OPS_VECTOR_PAIR \
| OPTION_MASK_CMPB \
| OPTION_MASK_CRYPTO \
| OPTION_MASK_DFP \
^ permalink raw reply [flat|nested] 8+ messages in thread
* [gcc(refs/users/meissner/heads/work161-dmf)] Use vector pair load/store for memcpy with -mcpu=future
@ 2024-02-29 18:25 Michael Meissner
0 siblings, 0 replies; 8+ messages in thread
From: Michael Meissner @ 2024-02-29 18:25 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:b6b2c54082d928eb1bed7cadb8c2959a848940d2
commit b6b2c54082d928eb1bed7cadb8c2959a848940d2
Author: Michael Meissner <meissner@linux.ibm.com>
Date: Thu Feb 29 13:16:35 2024 -0500
Use vector pair load/store for memcpy with -mcpu=future
In the development for the power10 processor, GCC did not enable using the load
vector pair and store vector pair instructions when optimizing things like
memory copy. This patch enables using those instructions if -mcpu=future is
used.
2024-02-29 Michael Meissner <meissner@linux.ibm.com>
gcc/
* config/rs6000/rs6000-cpus.def (ISA_FUTURE_MASKS_SERVER): Enable using
load vector pair and store vector pair instructions for memory copy
operations.
(POWERPC_MASKS): Make the bit for enabling using load vector pair and
store vector pair operations set and reset when the PowerPC processor is
changed.
Diff:
---
gcc/config/rs6000/rs6000-cpus.def | 2 ++
1 file changed, 2 insertions(+)
diff --git a/gcc/config/rs6000/rs6000-cpus.def b/gcc/config/rs6000/rs6000-cpus.def
index 77170915615..8da1d560e49 100644
--- a/gcc/config/rs6000/rs6000-cpus.def
+++ b/gcc/config/rs6000/rs6000-cpus.def
@@ -92,6 +92,7 @@
/* Flags for a potential future processor that may or may not be made. */
#define ISA_FUTURE_MASKS_SERVER (ISA_POWER11_MASKS_SERVER \
+ | OPTION_MASK_BLOCK_OPS_VECTOR_PAIR \
| OPTION_MASK_FUTURE)
/* Flags that need to be turned off if -mno-vsx. */
@@ -123,6 +124,7 @@
/* Mask of all options to set the default isa flags based on -mcpu=<xxx>. */
#define POWERPC_MASKS (OPTION_MASK_ALTIVEC \
+ | OPTION_MASK_BLOCK_OPS_VECTOR_PAIR \
| OPTION_MASK_CMPB \
| OPTION_MASK_CRYPTO \
| OPTION_MASK_DFP \
^ permalink raw reply [flat|nested] 8+ messages in thread
* [gcc(refs/users/meissner/heads/work161-dmf)] Use vector pair load/store for memcpy with -mcpu=future
@ 2024-02-29 18:20 Michael Meissner
0 siblings, 0 replies; 8+ messages in thread
From: Michael Meissner @ 2024-02-29 18:20 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:958eeaa435a9e11a275f9331237b22a714562000
commit 958eeaa435a9e11a275f9331237b22a714562000
Author: Michael Meissner <meissner@linux.ibm.com>
Date: Thu Feb 29 13:16:35 2024 -0500
Use vector pair load/store for memcpy with -mcpu=future
In the development for the power10 processor, GCC did not enable using the load
vector pair and store vector pair instructions when optimizing things like
memory copy. This patch enables using those instructions if -mcpu=future is
used.
2024-02-29 Michael Meissner <meissner@linux.ibm.com>
gcc/
* config/rs6000/rs6000-cpus.def (ISA_FUTURE_MASKS_SERVER): Enable using
load vector pair and store vector pair instructions for memory copy
operations.
(POWERPC_MASKS): Make the bit for enabling using load vector pair and
store vector pair operations set and reset when the PowerPC processor is
changed.
Diff:
---
gcc/config/rs6000/rs6000-cpus.def | 2 ++
1 file changed, 2 insertions(+)
diff --git a/gcc/config/rs6000/rs6000-cpus.def b/gcc/config/rs6000/rs6000-cpus.def
index 77170915615..8da1d560e49 100644
--- a/gcc/config/rs6000/rs6000-cpus.def
+++ b/gcc/config/rs6000/rs6000-cpus.def
@@ -92,6 +92,7 @@
/* Flags for a potential future processor that may or may not be made. */
#define ISA_FUTURE_MASKS_SERVER (ISA_POWER11_MASKS_SERVER \
+ | OPTION_MASK_BLOCK_OPS_VECTOR_PAIR \
| OPTION_MASK_FUTURE)
/* Flags that need to be turned off if -mno-vsx. */
@@ -123,6 +124,7 @@
/* Mask of all options to set the default isa flags based on -mcpu=<xxx>. */
#define POWERPC_MASKS (OPTION_MASK_ALTIVEC \
+ | OPTION_MASK_BLOCK_OPS_VECTOR_PAIR \
| OPTION_MASK_CMPB \
| OPTION_MASK_CRYPTO \
| OPTION_MASK_DFP \
^ permalink raw reply [flat|nested] 8+ messages in thread
end of thread, other threads:[~2024-03-05 18:40 UTC | newest]
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