[gcc r14-10047] i386: Fix up *avx2_eq<mode>3 constraints [PR114783]

[gcc r14-10047] i386: Fix up *avx2_eq<mode>3 constraints [PR114783]

[Jakub Jelinek]

https://gcc.gnu.org/g:c23db3ebb65ba357155be85ef56d037403eaee36

commit r14-10047-gc23db3ebb65ba357155be85ef56d037403eaee36
Author: Jakub Jelinek <jakub@redhat.com>
Date:   Sat Apr 20 00:13:49 2024 +0200

    i386: Fix up *avx2_eq<mode>3 constraints [PR114783]
    
    The r14-4456 change (part of APX EGPR support) seems to have mistakenly
    changed in the
    @@ -16831,7 +16831,7 @@ (define_insn "*avx2_eq<mode>3"
       [(set (match_operand:VI_256 0 "register_operand" "=x")
            (eq:VI_256
              (match_operand:VI_256 1 "nonimmediate_operand" "%x")
    -         (match_operand:VI_256 2 "nonimmediate_operand" "xm")))]
    +         (match_operand:VI_256 2 "nonimmediate_operand" "jm")))]
       "TARGET_AVX2 && !(MEM_P (operands[1]) && MEM_P (operands[2]))"
       "vpcmpeq<ssemodesuffix>\t{%2, %1, %0|%0, %1, %2}"
       [(set_attr "type" "ssecmp")
    hunk the xm constraint to jm, while in many other spots it changed correctly
    xm to xjm.  The instruction doesn't require the last operand to be in
    memory, it can handle 3 256-bit registers just fine, just it is a VEX only
    encoded instruction and so can't allow APX EGPR regs in the memory operand.
    
    The following patch fixes it, so that we don't force one of the == operands
    into memory all the time.
    
    2024-04-20  Jakub Jelinek  <jakub@redhat.com>
    
            PR target/114783
            * config/i386/sse.md (*avx2_eq<mode>3): Change last operand's
            constraint from "jm" to "xjm".
    
            * gcc.target/i386/avx2-pr114783.c: New test.

Diff:
---
 gcc/config/i386/sse.md                        |  2 +-
 gcc/testsuite/gcc.target/i386/avx2-pr114783.c | 12 ++++++++++++
 2 files changed, 13 insertions(+), 1 deletion(-)

diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
index 5bb49823f9a..1bf50726e83 100644
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -17029,7 +17029,7 @@
   [(set (match_operand:VI_256 0 "register_operand" "=x")
 	(eq:VI_256
 	  (match_operand:VI_256 1 "nonimmediate_operand" "%x")
-	  (match_operand:VI_256 2 "nonimmediate_operand" "jm")))]
+	  (match_operand:VI_256 2 "nonimmediate_operand" "xjm")))]
   "TARGET_AVX2 && !(MEM_P (operands[1]) && MEM_P (operands[2]))"
   "vpcmpeq<ssemodesuffix>\t{%2, %1, %0|%0, %1, %2}"
   [(set_attr "type" "ssecmp")
diff --git a/gcc/testsuite/gcc.target/i386/avx2-pr114783.c b/gcc/testsuite/gcc.target/i386/avx2-pr114783.c
new file mode 100644
index 00000000000..bc4dc3005fc
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx2-pr114783.c
@@ -0,0 +1,12 @@
+/* PR target/114783 */
+/* { dg-do compile } */
+/* { dg-options "-O2 -mavx2 -mno-avx512f -masm=att" } */
+/* { dg-final { scan-assembler "vpcmpeqd\[ \\t\]+%ymm\[01\], %ymm\[01\], %ymm0" } } */
+
+typedef int V __attribute__((vector_size (32)));
+
+V
+foo (V x, V y)
+{
+  return x == y;
+}