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From: Michael Meissner <meissner@gcc.gnu.org>
To: gcc-cvs@gcc.gnu.org
Subject: [gcc(refs/users/meissner/heads/work164-test)] Make moves from SPRs higher in cost.
Date: Thu, 25 Apr 2024 23:39:09 +0000 (GMT)	[thread overview]
Message-ID: <20240425233909.5A9FE3858D20@sourceware.org> (raw)

https://gcc.gnu.org/g:eebc665799dc3cacf8c57f62863b489e07d6066d

commit eebc665799dc3cacf8c57f62863b489e07d6066d
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Thu Apr 25 19:38:52 2024 -0400

    Make moves from SPRs higher in cost.
    
    2024-04-25  Michael Meissner  <meissner@linux.ibm.com>
    
    gcc/
    
            * config/rs6000/rs6000.cc (rs6000_register_move_cost): Make moves from
            SPRs more expensive.

Diff:
---
 gcc/config/rs6000/rs6000.cc | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc
index 908ad5dcb58..e5ebbd58cc0 100644
--- a/gcc/config/rs6000/rs6000.cc
+++ b/gcc/config/rs6000/rs6000.cc
@@ -22813,6 +22813,16 @@ rs6000_register_move_cost (machine_mode mode,
       ret = 2 * hard_regno_nregs (reg, mode);
     }
 
+  /* Make moves from SPR registers (LR, CTR, TAR) more expensive so that the
+     register allocator does not think of these registers are useful for saving
+     results.  */
+  else if (reg_classes_intersect_p (from, SPECIAL_REGS)
+	   && reg_classes_intersect_p (to, GENERAL_REGS))
+    {
+      rclass = from;
+      ret = (hard_regno_nregs (LR_REGNO, mode) > 1) ? 32768 : 32;
+    }
+
   /*  Moves from/to GENERAL_REGS.  */
   else if ((rclass = from, reg_classes_intersect_p (to, GENERAL_REGS))
 	   || (rclass = to, reg_classes_intersect_p (from, GENERAL_REGS)))

             reply	other threads:[~2024-04-25 23:39 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-04-25 23:39 Michael Meissner [this message]
  -- strict thread matches above, loose matches on Subject: below --
2024-04-25 22:10 Michael Meissner

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