[gcc r13-8654] aarch64: Fix SCHEDULER_IDENT for Cortex-A510

[gcc r13-8654] aarch64: Fix SCHEDULER_IDENT for Cortex-A510

[Richard Ball]

https://gcc.gnu.org/g:28b3b8a2fe55521a43f3710cf6ced1ab63f1ea03

commit r13-8654-g28b3b8a2fe55521a43f3710cf6ced1ab63f1ea03
Author: Richard Ball <richard.ball@arm.com>
Date:   Fri Apr 26 18:15:23 2024 +0100

    aarch64: Fix SCHEDULER_IDENT for Cortex-A510
    
    The SCHEDULER_IDENT for this CPU was incorrectly
    set to cortexa55. This can cause
    sub-optimal asm to be generated.
    
    gcc/ChangeLog:
            PR target/114272
            * config/aarch64/aarch64-cores.def (AARCH64_CORE):
            Change SCHEDULER_IDENT from cortexa55 to cortexa53
            for Cortex-A510.

Diff:
---
 gcc/config/aarch64/aarch64-cores.def | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/gcc/config/aarch64/aarch64-cores.def b/gcc/config/aarch64/aarch64-cores.def
index 8d9eb817d6d..fdda0697b88 100644
--- a/gcc/config/aarch64/aarch64-cores.def
+++ b/gcc/config/aarch64/aarch64-cores.def
@@ -168,7 +168,7 @@ AARCH64_CORE("cortex-r82", cortexr82, cortexa53, V8R, (), cortexa53, 0x41, 0xd15
 /* Armv9.0-A Architecture Processors.  */
 
 /* Arm ('A') cores. */
-AARCH64_CORE("cortex-a510",  cortexa510, cortexa55, V9A,  (SVE2_BITPERM, MEMTAG, I8MM, BF16), cortexa53, 0x41, 0xd46, -1)
+AARCH64_CORE("cortex-a510",  cortexa510, cortexa53, V9A,  (SVE2_BITPERM, MEMTAG, I8MM, BF16), cortexa53, 0x41, 0xd46, -1)
 
 AARCH64_CORE("cortex-a710",  cortexa710, cortexa57, V9A,  (SVE2_BITPERM, MEMTAG, I8MM, BF16), neoversen2, 0x41, 0xd47, -1)