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[gcc(refs/vendors/riscv/heads/gcc-13-with-riscv-opts)] RISC-V: Support VLS floating-point FMA/FNMA/FMS auto-vectorization
2023-09-26 15:09 UTC
[gcc(refs/vendors/riscv/heads/gcc-13-with-riscv-opts)] RISC-V: Support integer FMA/FNMA VLS modes autovectorization
2023-09-26 15:09 UTC
[gcc(refs/vendors/riscv/heads/gcc-13-with-riscv-opts)] RISC-V: Refactor and cleanup fma patterns
2023-09-26 15:09 UTC
[gcc(refs/vendors/riscv/heads/gcc-13-with-riscv-opts)] RISC-V: Fix typos on comments (SVE -> RVV)
2023-09-26 15:09 UTC
[gcc(refs/vendors/riscv/heads/gcc-13-with-riscv-opts)] RISC-V: Add builtin .def file dependencies
2023-09-26 15:09 UTC
[gcc(refs/vendors/riscv/heads/gcc-13-with-riscv-opts)] RISC-V: Support VLS mode for vec_set
2023-09-26 15:09 UTC
[gcc(refs/vendors/riscv/heads/gcc-13-with-riscv-opts)] RISC-V: Bugfix for scalar move with merged operand
2023-09-26 15:09 UTC
[gcc r14-4280] MATCH: Simplify `(A ==/!= B) &/| (((cast)A) CMP C)`
2023-09-26 15:01 UTC
[gcc r14-4279] PHIOPT: Fix minmax_replacement for three way
2023-09-26 14:55 UTC
[gcc r14-4278] MATCH: Optimize COND_ADD reduction pattern
2023-09-26 12:21 UTC
[gcc r14-4277] MATCH: Optimize COND_ADD_LEN reduction pattern
2023-09-26 12:20 UTC
[gcc r14-4276] ada: Fix missing call to Finalize_Protection for simple protected objects
2023-09-26 11:46 UTC
[gcc r14-4275] ada: Fix deferred constant wrongly rejected
2023-09-26 11:46 UTC
[gcc r14-4274] ada: Fix unnesting generated loops with nested finalization procedure
2023-09-26 11:46 UTC
[gcc r14-4273] ada: Crash processing the accessibility level of an actual parameter
2023-09-26 11:46 UTC
[gcc r14-4272] ada: Fix missing finalization of extended return object on abnormal completion
2023-09-26 11:46 UTC
[gcc r14-4271] ada: Update personality function for CHERI purecap
2023-09-26 11:45 UTC
[gcc r14-4270] ada: Fix conversions between addresses and integers
2023-09-26 11:45 UTC
[gcc r14-4269] ada: Add CHERI variant of System.Stream_Attributes
2023-09-26 11:45 UTC
[gcc r14-4268] ada: Define CHERI exception types
2023-09-26 11:45 UTC
[gcc r14-4267] ada: Make minor corrections to CUDA-related comments
2023-09-26 11:45 UTC
[gcc r14-4266] ada: Dimensional analysis when used with elementary functions
2023-09-26 11:45 UTC
[gcc r14-4265] ada: Clarify RM references that justify a constraint check
2023-09-26 11:45 UTC
[gcc r14-4264] RISC-V: Support FP round auto-vectorization
2023-09-26 11:38 UTC
[gcc r14-4263] RISC-V/testsuite: Fix ILP32 RVV failures from missing <gnu/stubs-ilp32d.h>
2023-09-26 9:22 UTC
[gcc r14-4262] Darwin: Handle -dynamiclib on cc1 lines
2023-09-26 8:51 UTC
[gcc r14-4261] invoke.texi: Update -fopenmp and -fopenmp-simd for omp::decl and loop semantic
2023-09-26 8:08 UTC
[gcc r14-4260] RISC-V: Support FP rint auto-vectorization
2023-09-26 7:33 UTC
[gcc r14-4259] RISC-V: Support FP nearbyint auto-vectorization
2023-09-26 7:24 UTC
[gcc(refs/vendors/ix86/heads/apx)] [APX EGPR] Handle vex insns that only support GPR16 (5/5)
2023-09-26 5:03 UTC
[gcc(refs/vendors/ix86/heads/apx)] [APX_EGPR] Handle legacy insns that only support GPR16 (4/5)
2023-09-26 5:03 UTC
[gcc(refs/vendors/ix86/heads/apx)] [APX EGPR] Handle legacy insns that only support GPR16 (3/5)
2023-09-26 5:03 UTC
[gcc(refs/vendors/ix86/heads/apx)] [APX EGPR] Handle legacy insns that only support GPR16 (2/5)
2023-09-26 5:03 UTC
[gcc(refs/vendors/ix86/heads/apx)] [APX EGPR] Handle legacy insn that only support GPR16 (1/5)
2023-09-26 5:02 UTC
[gcc(refs/vendors/ix86/heads/apx)] [APX EGPR] Handle GPR16 only vector move insns
2023-09-26 5:02 UTC
[gcc(refs/vendors/ix86/heads/apx)] [APX EGPR] Map reg/mem constraints in inline asm to non-EGPR constraint
2023-09-26 5:02 UTC
[gcc(refs/vendors/ix86/heads/apx)] [APX EGPR] Add backend hook for base_reg_class/index_reg_class
2023-09-26 5:02 UTC
[gcc(refs/vendors/ix86/heads/apx)] [APX EGPR] Add register and memory constraints that disallow EGPR
2023-09-26 5:02 UTC
[gcc(refs/vendors/ix86/heads/apx)] [APX EGPR] Add 16 new integer general purpose registers
2023-09-26 5:02 UTC
[gcc(refs/vendors/ix86/heads/apx)] [APX_EGPR] Initial support for APX_F
2023-09-26 5:02 UTC
[gcc(refs/vendors/ix86/heads/apx)] [APX EGPR] middle-end: Add index_reg_class with insn argument
2023-09-26 5:02 UTC
[gcc(refs/vendors/ix86/heads/apx)] [APX EGPR] middle-end: Add insn argument to base_reg_class
2023-09-26 5:02 UTC
[gcc/ix86/heads/apx] (13 commits) [APX EGPR] Handle vex insns that only support GPR16 (5/5)
2023-09-26 5:02 UTC
[gcc(refs/vendors/ix86/heads/apx)] Fix constraint mapping
2023-09-26 3:32 UTC
[gcc r14-4258] RISC-V: Rename rounding const fp function for refactor
2023-09-26 3:23 UTC
[gcc r13-7839] Daily bump
2023-09-26 0:22 UTC
[gcc r12-9892] Daily bump
2023-09-26 0:20 UTC
[gcc r11-11020] Daily bump
2023-09-26 0:20 UTC
[gcc r14-4257] Daily bump
2023-09-26 0:18 UTC
[gcc r14-4256] [PR111497][LRA]: Copy substituted equivalence
2023-09-25 20:20 UTC
[gcc r14-4255] Add missing return in gori_compute::logical_combine
2023-09-25 18:51 UTC
[gcc r14-4254] libstdc++: Shorten integer std::to/from_chars symbol names
2023-09-25 18:50 UTC
[gcc(refs/users/meissner/heads/work134-vsize)] Update ChangeLog.vsize
2023-09-25 17:05 UTC
[gcc(refs/users/meissner/heads/work134-vsize)] Adjust vector pair split functions
2023-09-25 17:03 UTC
[gcc(refs/users/meissner/heads/work134-vpair)] Update ChangeLog.vpair
2023-09-25 16:57 UTC
[gcc(refs/users/meissner/heads/work134-vpair)] Adjust vector pair split functions
2023-09-25 16:55 UTC
[gcc(refs/users/meissner/heads/work134-vsubreg)] Update ChangeLog.vsubreg
2023-09-25 16:45 UTC
[gcc(refs/users/meissner/heads/work134-vsubreg)] Add support for -mvector-pair
2023-09-25 16:43 UTC
[gcc r14-4253] Update baseline symbols for hppa-linux
2023-09-25 15:17 UTC
[gcc r14-4252] libstdc++: Prevent unwanted ADL in std::to_array [PR111512]
2023-09-25 8:53 UTC
[gcc r14-4251] libstdc++: Define C++23 std::forward_like (P2445R1)
2023-09-25 8:53 UTC
[gcc r14-4250] LoongArch: doc: Update -m[no-]explicit-relocs for r14-4160
2023-09-25 8:29 UTC
[gcc r14-4249] Fix PR 110386: backprop vs ABSU_EXPR
2023-09-25 7:08 UTC
[gcc r14-4248] RISC-V: Fix AVL/VL bug of VSETVL PASS[PR111548]
2023-09-25 6:12 UTC
[gcc r14-4247] rs6000: Skip empty inline asm in rs6000_update_ipa_fn_target_info [PR111366]
2023-09-25 5:31 UTC
[gcc r14-4246] rs6000: Use default target option node for callee by default [PR111380]
2023-09-25 5:31 UTC
[gcc r14-4245] LoongArch: Optimizations of vector construction
2023-09-25 2:41 UTC
[gcc(refs/vendors/ix86/heads/apx)] Handle vex insns that only support GPR16 (5/5)
2023-09-25 1:58 UTC
[gcc(refs/vendors/ix86/heads/apx)] Handle legacy insns that only support GPR16 (4/5)
2023-09-25 1:58 UTC
[gcc(refs/vendors/ix86/heads/apx)] Handle legacy insns that only support GPR16 (3/5)
2023-09-25 1:58 UTC
[gcc(refs/vendors/ix86/heads/apx)] Handle legacy insns that only support GPR16 (2/5)
2023-09-25 1:58 UTC
[gcc(refs/vendors/ix86/heads/apx)] Handle legacy insn that only support GPR16 (1/5)
2023-09-25 1:57 UTC
[gcc(refs/vendors/ix86/heads/apx)] Handle GPR16 only vector move insns
2023-09-25 1:57 UTC
[gcc(refs/vendors/ix86/heads/apx)] Map reg/mem constraints in inline asm to non-EGPR constraint
2023-09-25 1:57 UTC
[gcc(refs/vendors/ix86/heads/apx)] Add backend hook for base_reg_class/index_reg_class
2023-09-25 1:57 UTC
[gcc(refs/vendors/ix86/heads/apx)] Add register and memory constraints that disallow EGPR
2023-09-25 1:57 UTC
[gcc(refs/vendors/ix86/heads/apx)] Add 16 new integer general purpose registers
2023-09-25 1:57 UTC
[gcc(refs/vendors/ix86/heads/apx)] Initial support for APX_F
2023-09-25 1:57 UTC
[gcc(refs/vendors/ix86/heads/apx)] middle-end: Add index_reg_class with insn argument
2023-09-25 1:57 UTC
[gcc(refs/vendors/ix86/heads/apx)] middle-end: Add insn argument to base_reg_class
2023-09-25 1:57 UTC
[gcc] Created branch 'ix86/heads/apx' in namespace 'refs/vendors'
2023-09-25 1:54 UTC
[gcc r13-7838] Daily bump
2023-09-25 0:21 UTC
[gcc r12-9891] Daily bump
2023-09-25 0:20 UTC
[gcc r11-11019] Daily bump
2023-09-25 0:19 UTC
[gcc r14-4244] Daily bump
2023-09-25 0:17 UTC
[gcc r13-7837] c++: missing SFINAE in grok_array_decl [PR111493]
2023-09-24 18:42 UTC
[gcc r13-7836] c++: constraint rewriting during ttp coercion [PR111485]
2023-09-24 18:42 UTC
[gcc r13-7835] c++: constness of decltype of NTTP object [PR99631]
2023-09-24 18:42 UTC
[gcc r13-7834] Fortran: Supply a missing dereference [PR92586]
2023-09-24 14:35 UTC
[gcc r13-7833] Fortran: Pad mismatched charlens in component initializers [PR68155]
2023-09-24 14:26 UTC
[gcc r14-4243] RISC-V: Fix fortran ICE/PR111546 when RV32 vec_init
2023-09-24 9:10 UTC
[gcc r14-4242] Fortran: Pad mismatched charlens in component initializers [PR68155]
2023-09-24 8:01 UTC
[gcc r14-4241] MATCH: Add `(X & ~Y) & Y` and `(X | ~Y) | Y`
2023-09-24 6:48 UTC
[gcc r13-7832] Daily bump
2023-09-24 0:22 UTC
[gcc r12-9890] Daily bump
2023-09-24 0:20 UTC
[gcc r11-11018] Daily bump
2023-09-24 0:19 UTC
[gcc r14-4240] Daily bump
2023-09-24 0:17 UTC
[gcc r14-4239] RISC-V: Support full coverage VLS combine support
2023-09-24 0:12 UTC
[gcc r14-4238] fortran: error recovery on duplicate declaration of class variable [PR95710]
2023-09-23 17:21 UTC
[gcc r14-4237] d: Merge upstream dmd, druntime 4574d1728d, phobos d7e79f024
2023-09-23 11:01 UTC
[gcc r14-4236] testsuite: Add new test for already fixed PR111455
2023-09-23 7:40 UTC
[gcc(refs/users/aoliva/heads/testme)] Introduce -finline-stringops
2023-09-23 5:23 UTC
[gcc/aoliva/heads/testme] Introduce -finline-stringops
2023-09-23 5:23 UTC
[gcc r14-4235] RISC-V: Add VLS unary combine patterns
2023-09-23 1:47 UTC
[gcc r14-4234] RISC-V: Suport FP floor auto-vectorization
2023-09-23 1:44 UTC
[gcc r14-4233] RISC-V: Remove FP run test for ceil
2023-09-23 1:09 UTC
[gcc r13-7831] Daily bump
2023-09-23 0:22 UTC
[gcc r12-9889] Daily bump
2023-09-23 0:21 UTC
[gcc r11-11017] Daily bump
2023-09-23 0:20 UTC
[gcc r14-4232] Daily bump
2023-09-23 0:18 UTC
[gcc(refs/users/meissner/heads/work134-vsubreg)] Update ChangeLog.vsubreg
2023-09-22 19:50 UTC
[gcc(refs/users/meissner/heads/work134-vsubreg)] Fix typos
2023-09-22 19:49 UTC
[gcc r14-4231] c++ __integer_pack conversion again [PR111357]
2023-09-22 14:36 UTC
[gcc r14-4230] c++: constexpr and designated initializer
2023-09-22 13:23 UTC
[gcc r14-4229] c++: unroll pragma in templates [PR111529]
2023-09-22 13:01 UTC
[gcc r14-4228] RISC-V: Refine the code gen for ceil auto vectorization
2023-09-22 12:29 UTC
[gcc r14-4227] RISC-V: Add VLS mode widen ternary tests
2023-09-22 12:10 UTC
[gcc r14-4226] RISC-V: Add VLS widen binary combine patterns
2023-09-22 11:16 UTC
[gcc r13-7830] c++: improve class NTTP object pretty printing [PR111471]
2023-09-22 10:32 UTC
[gcc r14-4225] c++: missing SFINAE in grok_array_decl [PR111493]
2023-09-22 10:31 UTC
[gcc r14-4224] c++: constraint rewriting during ttp coercion [PR111485]
2023-09-22 10:26 UTC
[gcc r14-4223] RISC-V: Move ceil test cases to unop folder
2023-09-22 9:22 UTC
[gcc r14-4222] RISC-V: Remove @ of vec_duplicate pattern
2023-09-22 8:33 UTC
[gcc r14-4221] RISC-V: Add VLS conditional patterns support
2023-09-22 7:54 UTC
[gcc(refs/users/aoliva/heads/testme)] Introduce -finline-stringops
2023-09-22 5:46 UTC
[gcc/aoliva/heads/testme] Introduce -finline-stringops
2023-09-22 5:46 UTC
[gcc r14-4220] RISC-V: Rename the test macro for math autovec test
2023-09-22 4:27 UTC
[gcc r14-4219] RISC-V: Optimization of vrgather.vv into vrgatherei16.vv[PR111451]
2023-09-22 4:20 UTC
[gcc r14-4218] RISC-V: Remove arch and abi option for run test case
2023-09-22 3:49 UTC
[gcc(refs/users/meissner/heads/work134-vsubreg)] Update ChangeLog.vsubreg
2023-09-22 3:23 UTC
[gcc(refs/users/meissner/heads/work134-vsubreg)] Use simplify_gen_subreg instead of generating direct register number
2023-09-22 3:22 UTC
[gcc(refs/vendors/ix86/heads/evex512)] Allow -mno-evex512 usage
2023-09-22 3:20 UTC
[gcc(refs/vendors/ix86/heads/evex512)] Support -mevex512 for AVX512FP16 intrins
2023-09-22 3:20 UTC
[gcc(refs/vendors/ix86/heads/evex512)] Support -mevex512 for AVX512{IFMA, VBMI, VNNI, BF16, VPOPCNTDQ, VBMI2, BITALG, VP2INTERSECT}, VAES, GFNI, VPCL
2023-09-22 3:20 UTC
[gcc(refs/vendors/ix86/heads/evex512)] Support -mevex512 for AVX512BW intrins
2023-09-22 3:20 UTC
[gcc(refs/vendors/ix86/heads/evex512)] Support -mevex512 for AVX512DQ intrins
2023-09-22 3:20 UTC
[gcc(refs/vendors/ix86/heads/evex512)] Support -mevex512 for AVX512F intrins
2023-09-22 3:20 UTC
[gcc(refs/vendors/ix86/heads/evex512)] Disable zmm register and 512 bit libmvec call when !TARGET_EVEX512
2023-09-22 3:20 UTC
[gcc(refs/vendors/ix86/heads/evex512)] Add OPTION_MASK_ISA2_EVEX512 for 512 bit builtins
2023-09-22 3:19 UTC
[gcc(refs/vendors/ix86/heads/evex512)] Add OPTION_MASK_ISA2_EVEX512 for 512 bit builtins
2023-09-22 3:19 UTC
[gcc(refs/vendors/ix86/heads/evex512)] Add OPTION_MASK_ISA2_EVEX512 for 512 bit builtins
2023-09-22 3:19 UTC
[gcc(refs/vendors/ix86/heads/evex512)] Add OPTION_MASK_ISA2_EVEX512 for 512 bit builtins
2023-09-22 3:19 UTC
[gcc(refs/vendors/ix86/heads/evex512)] Add OPTION_MASK_ISA2_EVEX512 for 512 bit builtins
2023-09-22 3:19 UTC
[gcc(refs/vendors/ix86/heads/evex512)] Push evex512 target for 512 bit intrins
2023-09-22 3:19 UTC
[gcc(refs/vendors/ix86/heads/evex512)] Push evex512 target for 512 bit intrins
2023-09-22 3:19 UTC
[gcc(refs/vendors/ix86/heads/evex512)] Push evex512 target for 512 bit intrins
2023-09-22 3:19 UTC
[gcc(refs/vendors/ix86/heads/evex512)] Push evex512 target for 512 bit intrins
2023-09-22 3:19 UTC
[gcc(refs/vendors/ix86/heads/evex512)] Push evex512 target for 512 bit intrins
2023-09-22 3:19 UTC
[gcc(refs/vendors/ix86/heads/evex512)] Initial support for -mevex512
2023-09-22 3:19 UTC
[gcc] Created branch 'ix86/heads/evex512' in namespace 'refs/vendors'
2023-09-22 3:09 UTC
[gcc r14-4217] RISC-V: Support combine cond extend and reduce sum to widen reduce sum
2023-09-22 3:01 UTC
[gcc r14-4216] RISC-V: Split VLS avl_type from NONVLMAX avl_type
2023-09-22 3:01 UTC
[gcc/devel/ix86/evex512] Allow -mno-evex512 usage
2023-09-22 2:41 UTC
[gcc/devel/ix86/evex512] Support -mevex512 for AVX512FP16 intrins
2023-09-22 2:41 UTC
[gcc/devel/ix86/evex512] Support -mevex512 for AVX512{IFMA, VBMI, VNNI, BF16, VPOPCNTDQ, VBMI2, BITALG, VP2INTERSECT}, VAES, GFNI, VPCL
2023-09-22 2:41 UTC
[gcc/devel/ix86/evex512] Support -mevex512 for AVX512BW intrins
2023-09-22 2:41 UTC
[gcc/devel/ix86/evex512] Support -mevex512 for AVX512DQ intrins
2023-09-22 2:41 UTC
[gcc/devel/ix86/evex512] Support -mevex512 for AVX512F intrins
2023-09-22 2:41 UTC
[gcc/devel/ix86/evex512] Disable zmm register and 512 bit libmvec call when !TARGET_EVEX512
2023-09-22 2:41 UTC
[gcc/devel/ix86/evex512] Add OPTION_MASK_ISA2_EVEX512 for 512 bit builtins
2023-09-22 2:41 UTC
[gcc/devel/ix86/evex512] Add OPTION_MASK_ISA2_EVEX512 for 512 bit builtins
2023-09-22 2:40 UTC
[gcc/devel/ix86/evex512] Add OPTION_MASK_ISA2_EVEX512 for 512 bit builtins
2023-09-22 2:40 UTC
[gcc/devel/ix86/evex512] Add OPTION_MASK_ISA2_EVEX512 for 512 bit builtins
2023-09-22 2:40 UTC
[gcc/devel/ix86/evex512] Add OPTION_MASK_ISA2_EVEX512 for 512 bit builtins
2023-09-22 2:40 UTC
[gcc/devel/ix86/evex512] Push evex512 target for 512 bit intrins
2023-09-22 2:40 UTC
[gcc/devel/ix86/evex512] Push evex512 target for 512 bit intrins
2023-09-22 2:40 UTC
[gcc/devel/ix86/evex512] Push evex512 target for 512 bit intrins
2023-09-22 2:40 UTC
[gcc/devel/ix86/evex512] Push evex512 target for 512 bit intrins
2023-09-22 2:40 UTC
[gcc/devel/ix86/evex512] Push evex512 target for 512 bit intrins
2023-09-22 2:40 UTC
[gcc/devel/ix86/evex512] Initial support for -mevex512
2023-09-22 2:40 UTC
[gcc] Created branch 'devel/ix86/evex512'
2023-09-22 2:40 UTC
[gcc r14-4215] RISC-V: Leverage __builtin_xx instead of math.h for test
2023-09-22 1:26 UTC
[gcc r14-4214] RISC-V: Support ceil and ceilf auto-vectorization
2023-09-22 0:49 UTC
[gcc r13-7829] Daily bump
2023-09-22 0:21 UTC
[gcc r12-9888] Daily bump
2023-09-22 0:19 UTC
[gcc r11-11016] Daily bump
2023-09-22 0:19 UTC
[gcc r14-4213] Daily bump
2023-09-22 0:18 UTC
[gcc r14-4212] RISC-V: Add VLS integer ABS support
2023-09-21 22:58 UTC
[gcc(refs/users/meissner/heads/work134-vsubreg)] Update ChangeLog.vsubreg
2023-09-21 20:15 UTC
[gcc(refs/users/meissner/heads/work134-vsubreg)] Peter's patch for updating tieable support
2023-09-21 20:14 UTC
[gcc(refs/users/meissner/heads/work134-vsubreg)] Revert patches
2023-09-21 20:03 UTC
[gcc(refs/users/meissner/heads/work134-vsubreg)] Update ChangeLog.vsubreg
2023-09-21 20:02 UTC
[gcc(refs/users/meissner/heads/work134-vsubreg)] Add support for vector pair built-in functions
2023-09-21 20:00 UTC
[gcc(refs/users/meissner/heads/work134-vsubreg)] Update ChangeLog.vsubreg
2023-09-21 19:11 UTC
[gcc(refs/users/meissner/heads/work134-vsubreg)] Allow OOmode to tie with 128-bit vector modes
2023-09-21 19:09 UTC
[gcc(refs/users/meissner/heads/work134-vsize)] Update ChangeLog.vsize
2023-09-21 18:57 UTC
[gcc(refs/users/meissner/heads/work134-vsize)] Add support for -mvector-pair
2023-09-21 18:55 UTC
[gcc(refs/users/meissner/heads/work134-vsize)] Merge commit 'refs/users/meissner/heads/work134-vsize' of git+ssh://gcc.gnu.org/git/gcc into me/work
2023-09-21 18:54 UTC
[gcc(refs/users/meissner/heads/work134-vsize)] Add ChangeLog.vsize and update REVISION
2023-09-21 18:54 UTC
[gcc/meissner/heads/work134-vsize] (4 commits) Add support for -mvector-pair
2023-09-21 18:54 UTC
[gcc(refs/users/meissner/heads/work134-vpair)] Update ChangeLog.vpair
2023-09-21 18:45 UTC
[gcc(refs/users/meissner/heads/work134-vpair)] Add support for vector pair built-in functions
2023-09-21 18:43 UTC
[gcc r14-4211] RISC-V: Add more VLS unary tests
2023-09-21 12:42 UTC
[gcc r14-4210] RISC-V: Support VLS mult high
2023-09-21 11:56 UTC
[gcc r14-4209] RISC-V: Adjusting the comments of the emit_vlmax_insn/emit_vlmax_insn_lra/emit_nonvlmax_insn functio
2023-09-21 10:12 UTC
[gcc r14-4208] rust: Implement TARGET_RUST_OS_INFO for *-*-*linux*
2023-09-21 9:16 UTC
[gcc r14-4207] rust: Implement TARGET_RUST_OS_INFO for i[34567]86-*-mingw* and x86_64-*-mingw*
2023-09-21 9:16 UTC
[gcc r14-4206] rust: Implement TARGET_RUST_OS_INFO for *-*-fuchsia*
2023-09-21 9:15 UTC
[gcc r14-4205] rust: Implement TARGET_RUST_OS_INFO for *-*-vxworks*
2023-09-21 9:15 UTC
[gcc r14-4204] rust: Implement TARGET_RUST_OS_INFO for *-*-dragonfly*
2023-09-21 9:15 UTC
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