How to produce optimal output for H83052? (switches?)

How to produce optimal output for H83052? (switches?)

[ibrumm]

Hi!

"-relax" does not work fully in GNU ld version 2.12.1
It only reduces to 16bit instead of reducing to 8bit addresses

GNU CPP version 3.2 (cpplib) (Hitachi H8/300)
GNU C version 3.2 (h8300-hms)
    compiled by GNU C version 2.95.3 20010315 (release).

Could do much more optimizations!!! (see below)
How to instruct gcc to produce (allmost) optimal code?

How to declare 8 bit (tiny) and 16 bit (near) pointers (and sections)?

Best regards,
  Ingmar Brumm

Output from make:
h8300-hms-gcc -v -fverbose-asm -o2 -frename-registers -fforce-mem -fomit-frame-pointer -finline-functions -finline-limit=100 -g -mh -mrelax -malign-300  -c blink.c -o blink.o
Reading specs from C:\Hitachi\gcc1\lib\gcc-lib\h8300-hms\3.2\specs
Configured with: ../gcc-3.2/configure --target=h8300-hms --host=i586-mingw32 --build=i686-pc-linux-gnu --enable-languages=c,c++ --with-newlib
Thread model: single
gcc version 3.2
 C:\Hitachi\gcc1\lib\gcc-lib\h8300-hms\3.2\cc1.exe -lang-c -v -iprefix C:\Hitachi\gcc1\lib\gcc-lib\h8300-hms\3.2\ -D__GNUC__=3 -D__GNUC_MINOR__=2 -D__GNUC_PATCHLEVEL__=0 -D__GXX_ABI_VERSION=102 -D__LONG_MAX__=2147483647L -D__LONG_LONG_MAX__=2147483647L -D__LONG_MAX__=2147483647L -D__LONG_LONG_MAX__=2147483647L -D__NO_INLINE__ -D__STDC_HOSTED__=1 -D__H8300H__ -D__SIZE_TYPE__=unsigned long -D__PTRDIFF_TYPE__=long -Acpu=h8300h -Amachine=h8300h -D__INT_MAX__=32767 blink.c -quiet -dumpbase blink.c -mh -mrelax -malign-300 -g -version -fverbose-asm -frename-registers -fforce-mem -fomit-frame-pointer -finline-functions -finline-limit=100 -o G:\Temp/cc4qaaaa.s
GNU CPP version 3.2 (cpplib) (Hitachi H8/300)
GNU C version 3.2 (h8300-hms)
    compiled by GNU C version 2.95.3 20010315 (release).
#include "..." search starts here:
#include <...> search starts here:
 C:/HITACHI/GCC1/include
 C:/Hitachi/gcc1/lib/gcc-lib/h8300-hms/3.2/include
 C:/Hitachi/gcc1/h8300-hms/include
End of search list.
 C:\Hitachi\gcc1\lib\gcc-lib\h8300-hms\3.2\..\..\..\..\h8300-hms\bin\as.exe --traditional-format -o2 -o blink.o G:\Temp/cc4qaaaa.s
h8300-hms-objdump -D -S --no-show-raw-insn blink.o >blink.o.lst
h8300-hms-gcc -nostartfiles -v -fverbose-asm -o2 -frename-registers -fforce-mem -fomit-frame-pointer -finline-functions -finline-limit=100 -g -mh -mrelax -malign-300  -Tblink.lnk -Xlinker -verbose -Xlinker -relax -Xlinker -Map -Xlinker blink.map -o blink.out blink.o 
Reading specs from C:\Hitachi\gcc1\lib\gcc-lib\h8300-hms\3.2\specs
Configured with: ../gcc-3.2/configure --target=h8300-hms --host=i586-mingw32 --build=i686-pc-linux-gnu --enable-languages=c,c++ --with-newlib
Thread model: single
gcc version 3.2
 C:\Hitachi\gcc1\lib\gcc-lib\h8300-hms\3.2\..\..\..\..\h8300-hms\bin\ld.exe -m h8300h -o2 -o blink.out -LC:\Hitachi\gcc1\lib\gcc-lib\h8300-hms\3.2\h8300h -LC:\Hitachi\gcc1\lib\gcc-lib\h8300-hms\3.2 -LC:\Hitachi\gcc1\lib\gcc-lib -LC:\Hitachi\gcc1\lib\gcc-lib\h8300-hms\3.2\..\..\..\..\h8300-hms\lib\h8300h -LC:\Hitachi\gcc1\lib\gcc-lib\h8300-hms\3.2\..\..\..\..\h8300-hms\lib -L\usr\local\lib\gcc-lib\h8300-hms\3.2\..\..\..\..\h8300-hms\lib -LC:\Hitachi\gcc1\lib\gcc-lib\h8300-hms\3.2\..\..\.. -verbose -relax -Map blink.map blink.o -lgcc -relax -lg -lc -lgcc -Tblink.lnk
GNU ld version 2.12.1
  Supported emulations:
   h8300
   h8300h
   h8300s


Result:
//#define ICC_UNSIGN_CHAR         *(volatile unsigned char tiny *)
//#define ICC_UNSIGN_SHORT        *(volatile unsigned short tiny *)
//#define ICC_UNSIGN_LONG         *(volatile unsigned long tiny *)
#define ICC_UNSIGN_CHAR         *(volatile unsigned char  *)
#define ICC_UNSIGN_SHORT        *(volatile unsigned short *)
#define ICC_UNSIGN_LONG         *(volatile unsigned long  *)

#define DMAC_ETCR0AH  (ICC_UNSIGN_CHAR(  0xffffff24l))
#define DMAC_ETCR0AL  (ICC_UNSIGN_CHAR(  0xffffff25l))
#define DMAC_ETCR0A   (ICC_UNSIGN_SHORT( 0xffffff24l))
#define DMAC_DTCR0A   (ICC_UNSIGN_CHAR(  0xffffff27l))

int main(void)
{
 200:	7a 37 00 00 00 10 sub.l	#0x10,er7
  unsigned short w;
  unsigned char b;

  DMAC_DTCR0A |= 0x20;
 206:	6a 0a ff 27       mov.b	@0xff27:16,r2l      ; here a bitset instruction
 20a:	ca 20             or.b	#0x20,r2l           ; can be used instead:
 20c:	6a 8a ff 27       mov.b	r2l,@0xff27:16      ; bset.b #5,@0xff:8

  b = DMAC_ETCR0AH;
 210:	6a 0a ff 24       mov.b	@0xff24:16,r2l      ; here the linker should optimize!!!
 214:	6e fa 00 09       mov.b	r2l,@(0x9:16,er7)   ; local! no need to store! why not keeping in a register only?

  if( b)
 21c:	0c aa             mov.b	r2l,r2l             ; not neede, flags are already set!
 21e:	47 18             beq	.+24 (238)
  {
    w = DMAC_ETCR0AL | b << 8;          ; mov.b @0x25:8,r3l  mov.b r2l,r3h  keep w in r3, that's all!!!
 220:	6a 0a ff 25       mov.b	@0xff25:16,r2l      ; here the linker should optimize!!!
 224:	0c ab             mov.b	r2l,r3l             ; why not a direct move to r3l????
 226:	17 53             extu.w	r3          ; not needed
 228:	6e 7a 00 09       mov.b	@(0x9:16,er7),r2l   ; could have been taken from register
 22c:	17 52             extu.w	r2          ; totally unneccessary, will be obselete by next instruction
 22e:	0c a2             mov.b	r2l,r2h             ; this
 230:	18 aa             sub.b	r2l,r2l             ; is
 232:	64 32             or.w	r3,r2               ; quite ok, but see solution with the two instructions
 234:	6f f2 00 0a       mov.w	r2,@(0xa:16,er7)    ; no need to store

00000238 <.L2>:
  }
  DMAC_ETCR0A  = w;
 238:	6f 72 00 0a       mov.w	@(0xa:16,er7),r2    ;  could have been taken from register, if living in a register
 23c:	6b 82 ff 24       mov.w	r2,@0xff24:16       ; that is ok, can't be reduced to 8 bit

  return 0 ;
 240:	19 22             sub.w	r2,r2
 242:	0d 20             mov.w	r2,r0
 244:	7a 17 00 00 00 10 add.l	#0x10,er7
 24a:	54 70             rts	

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