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* Bare metal ARM Cross compiler - aeabi auto-generated functions for cortex-m0 use wrong instruction set
@ 2012-12-02 15:22 Jan K
  2012-12-03  0:00 ` Chris Johns
  2012-12-04  2:54 ` Maxim Kuvyrkov
  0 siblings, 2 replies; 4+ messages in thread
From: Jan K @ 2012-12-02 15:22 UTC (permalink / raw)
  To: gcc-help

Hi!
I'm trying to get the cross-toolchain for cortex-m0 working. The target is arm-none-eabi.
The gcc has no problem compiling my code using allowed instructions only. As long as I do not try to use / or % my code runs as expected.
When I try to divide, GCC uses and appends ARM runtime ABI functions (which is correct, since m0 has no hardware division op).
The problem is that included functions (in particular: __aeabi_idiv) use instructions that are _not_ part of the cortex-m0 instructions set (like lsleq, movne, rsbmi).
I compile and link the code with '-mcpu=cortex-m0 -mthumb' flags.
What I want to is to force gcc to include the ARM runtime ABI functions that work with cortex-m0.
How can I get it working? Am I missing something? Is it anyhow possible?
Regards,
Jan

(Tested with GCC 4.6.3 and 4.7.2, both built with gentoo crossdev tool, run on nxp lpc1114)

^ permalink raw reply	[flat|nested] 4+ messages in thread

* Re: Bare metal ARM Cross compiler - aeabi auto-generated functions for cortex-m0 use wrong instruction set
  2012-12-02 15:22 Bare metal ARM Cross compiler - aeabi auto-generated functions for cortex-m0 use wrong instruction set Jan K
@ 2012-12-03  0:00 ` Chris Johns
  2012-12-04  2:54 ` Maxim Kuvyrkov
  1 sibling, 0 replies; 4+ messages in thread
From: Chris Johns @ 2012-12-03  0:00 UTC (permalink / raw)
  To: Jan K; +Cc: gcc-help

Jan K wrote:
> Hi!
> I'm trying to get the cross-toolchain for cortex-m0 working. The target is arm-none-eabi.
> The gcc has no problem compiling my code using allowed instructions only. As long as I do not try to use / or % my code runs as expected.
> When I try to divide, GCC uses and appends ARM runtime ABI functions (which is correct, since m0 has no hardware division op).
> The problem is that included functions (in particular: __aeabi_idiv) use instructions that are _not_ part of the cortex-m0 instructions set (like lsleq, movne, rsbmi).
> I compile and link the code with '-mcpu=cortex-m0 -mthumb' flags.
> What I want to is to force gcc to include the ARM runtime ABI functions that work with cortex-m0.
> How can I get it working? Am I missing something? Is it anyhow possible?

As far as I can tell you are not missing anything. I raised the issue 
not long ago ...

  http://gcc.gnu.org/ml/gcc-help/2012-11/msg00105.html

Maybe this patch helps. It helped me with gcc 4.7.2 and the Cortex-3M I 
was using ...

http://git.rtems.org/chrisj/rtems-source-builder.git/tree/source-builder/patches/gcc-4.7.2-arm-eabi-multilib-20121014.diff

Chris

^ permalink raw reply	[flat|nested] 4+ messages in thread

* Re: Bare metal ARM Cross compiler - aeabi auto-generated functions for cortex-m0 use wrong instruction set
  2012-12-02 15:22 Bare metal ARM Cross compiler - aeabi auto-generated functions for cortex-m0 use wrong instruction set Jan K
  2012-12-03  0:00 ` Chris Johns
@ 2012-12-04  2:54 ` Maxim Kuvyrkov
  2012-12-04 15:26   ` jprofesorek
  1 sibling, 1 reply; 4+ messages in thread
From: Maxim Kuvyrkov @ 2012-12-04  2:54 UTC (permalink / raw)
  To: Jan K; +Cc: gcc-help

On 3/12/2012, at 4:22 AM, Jan K wrote:

> Hi!
> I'm trying to get the cross-toolchain for cortex-m0 working. The target is arm-none-eabi.
> The gcc has no problem compiling my code using allowed instructions only. As long as I do not try to use / or % my code runs as expected.
> When I try to divide, GCC uses and appends ARM runtime ABI functions (which is correct, since m0 has no hardware division op).
> The problem is that included functions (in particular: __aeabi_idiv) use instructions that are _not_ part of the cortex-m0 instructions set (like lsleq, movne, rsbmi).
> I compile and link the code with '-mcpu=cortex-m0 -mthumb' flags.
> What I want to is to force gcc to include the ARM runtime ABI functions that work with cortex-m0.
> How can I get it working? Am I missing something? Is it anyhow possible?

How libgcc (and other GCC libraries) are compiled is defined by multilib flags.  It appears that the default multilib for the compiler that you built is not "-mcpu=cortex-m0" (probably, it's something ARMv4-ish).

For a quick fix try adding --with-arch=cortex-m0 to GCC configure line.

--
Maxim Kuvyrkov
CodeSourcery / Mentor Graphics

^ permalink raw reply	[flat|nested] 4+ messages in thread

* Re: Bare metal ARM Cross compiler - aeabi auto-generated functions for cortex-m0 use wrong instruction set
  2012-12-04  2:54 ` Maxim Kuvyrkov
@ 2012-12-04 15:26   ` jprofesorek
  0 siblings, 0 replies; 4+ messages in thread
From: jprofesorek @ 2012-12-04 15:26 UTC (permalink / raw)
  To: gcc-help; +Cc: Maxim Kuvyrkov, Chris Johns

On 4/12/2012, at 3:54 Maxim Kuvyrkov wrote:
> > Hi!
> > I'm trying to get the cross-toolchain for cortex-m0 working. The target is arm-none-eabi.
> > The gcc has no problem compiling my code using allowed instructions only. As long as I do not try to use / or % my code runs as expected.
> > When I try to divide, GCC uses and appends ARM runtime ABI functions (which is correct, since m0 has no hardware division op).
> > The problem is that included functions (in particular: __aeabi_idiv) use instructions that are _not_ part of the cortex-m0 instructions set (like lsleq, movne, rsbmi).
> > I compile and link the code with '-mcpu=cortex-m0 -mthumb' flags.
> > What I want to is to force gcc to include the ARM runtime ABI functions that work with cortex-m0.
> > How can I get it working? Am I missing something? Is it anyhow possible?
> 
> How libgcc (and other GCC libraries) are compiled is defined by multilib flags. It appears that the default multilib for the compiler that you built is not "-mcpu=cortex-m0" (probably, it's something ARMv4-ish).
> 
> For a quick fix try adding --with-arch=cortex-m0 to GCC configure line.

I'm going to check if this would help. The workaround would however mean that to switch from Cortex-M0 to Cortex-M4 and vice-versa I'd either need two separate gcc builds or I could relay on the fact that m0 instruction set is subset of m4. Both nasty...

---------------------

On 3/12/2012, at 1:00 Chris Johns wrote:
> As far as I can tell you are not missing anything. I raised the issue not long ago ...
> http://gcc.gnu.org/ml/gcc-help/2012-11/msg00105.html
> Maybe this patch helps. It helped me with gcc 4.7.2 and the Cortex-3M I was using ...
> http://git.rtems.org/chrisj/rtems-source-builder.git/tree/source-builder/patches/gcc-4.7.2-arm-eabi-multilib-20121014.diff
> Chris

(Sorry no to respond in a separate mail with reference, but probably built-in spam filter discarded the massage :?)

Thanks for this post, now I know what the problem really is about. Sadly the patch you provide does not take under account cortex-m0. If I have time, I'll try to dig into it.

---------------------

Currently I'm linking my code with an external aeabi for cortex-m0 taken from:
https://github.com/bobbl/libaeabi-cortexm0
This works fine as a workaround and is at least portable (i.e. I can send the code to a friend using unpatched gcc).

btw, as Chris noticed, not only aeabi functions use wrong instruction set, all libs added by the linker are unmatched, e.g. stdlib.

Regards,
Jan

^ permalink raw reply	[flat|nested] 4+ messages in thread

end of thread, other threads:[~2012-12-04 15:26 UTC | newest]

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2012-12-02 15:22 Bare metal ARM Cross compiler - aeabi auto-generated functions for cortex-m0 use wrong instruction set Jan K
2012-12-03  0:00 ` Chris Johns
2012-12-04  2:54 ` Maxim Kuvyrkov
2012-12-04 15:26   ` jprofesorek

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