Inline asm - unexpected optimization

Inline asm - unexpected optimization

[Jeremy Hall]

Hi,
Looking at the assembler for this speculative code, I saw that without
asm volatile, the second call to rdrand was removed and the value
"low" used twice.
gcc 4.6.1 with any optimization turned on.  It looks to me like this
optimization will stop the code working.

My question is:  is this my ignorance of inline assembler (most
likely) or is it a bug in gcc which I should report?
I know its a new instruction.  The retry loop etc is removed to
simplify the test case.

#include <stdio.h>
typedef unsigned long long qword;
// #define asm __asm__ __volatile__

int
main( int argc, char *argv[] )
{
  qword result;

    /* for 32 bit mode call rdrand twice */
  unsigned int low, high;
  asm( "rdrand %0" : "=r" (low) );
  asm( "rdrand %0" : "=r" (high) );
  result = ((qword)high << 32U) | low;

  printf("64 bit random number: %llu\n", result );
}

// with asm volatile

#APP
# 17 "rand.c" 1
    rdrand edx  # low
# 0 "" 2
# 18 "rand.c" 1
    rdrand eax  # high
# 0 "" 2
#NO_APP
    mov DWORD PTR [esp+4], edx  #, low
    mov DWORD PTR [esp+8], eax  #, high
    mov DWORD PTR [esp], OFFSET FLAT:.LC0   #,
    call    printf  #

// without volatile

#APP
# 14 "rand.c" 1
    rdrand eax  # low
# 0 "" 2
#NO_APP
    mov ebp, esp    #,
    .cfi_def_cfa_register 5
    and esp, -16    #,
    sub esp, 16 #,
    mov DWORD PTR [esp+4], eax  #, low
    mov DWORD PTR [esp+8], eax  #, low
    mov DWORD PTR [esp], OFFSET FLAT:.LC0   #,
    call    printf  #

Re: Inline asm - unexpected optimization

[Georg-Johann Lay]

Jeremy Hall schrieb:
> Hi,
> Looking at the assembler for this speculative code, I saw that without
> asm volatile, the second call to rdrand was removed and the value
> "low" used twice.
> gcc 4.6.1 with any optimization turned on.  It looks to me like this
> optimization will stop the code working.
> 
> My question is:  is this my ignorance of inline assembler (most
> likely) or is it a bug in gcc which I should report?

It's not a bug in gcc.

The inlne asm has side effects you didn't report to gcc, so you need the 
volatile here.

> I know its a new instruction.  The retry loop etc is removed to
> simplify the test case.
> 
> #include <stdio.h>
> typedef unsigned long long qword;
> // #define asm __asm__ __volatile__
> 
> int
> main( int argc, char *argv[] )
> {
>   qword result;
> 
>     /* for 32 bit mode call rdrand twice */
>   unsigned int low, high;
>   asm( "rdrand %0" : "=r" (low) );
>   asm( "rdrand %0" : "=r" (high) );
>   result = ((qword)high << 32U) | low;
> 
>   printf("64 bit random number: %llu\n", result );
> }

Re: Inline asm - unexpected optimization

[Jeremy Hall]

On 24 August 2011 11:11, Georg-Johann Lay <avr@gjlay.de> wrote:
> It's not a bug in gcc.
>
> The inlne asm has side effects you didn't report to gcc, so you need the
> volatile here.
OK thanks.  I guess there is no way to report this kind of side
effect?  so you have to use volatile or call rdrand twice in the same
asm().
The only spanner in the works is that this problem does NOT occur with
the similar rdtsc instruction.  I wondered if rdtsc was flagged within
gcc in some way to say its output was volatile, and that perhaps this
had yet to be done with rdrand (as its a new instruction not available
for a few months until Ivy Bridge comes out).

>
>> I know its a new instruction.  The retry loop etc is removed to
>> simplify the test case.
>>
>> #include <stdio.h>
>> typedef unsigned long long qword;
>> // #define asm __asm__ __volatile__
>>
>> int
>> main( int argc, char *argv[] )
>> {
>>  qword result;
>>
>>    /* for 32 bit mode call rdrand twice */
>>  unsigned int low, high;
>>  asm( "rdrand %0" : "=r" (low) );
>>  asm( "rdrand %0" : "=r" (high) );
>>  result = ((qword)high << 32U) | low;
>>
>>  printf("64 bit random number: %llu\n", result );
>> }
>

Re: Inline asm - unexpected optimization

[Segher Boessenkool]

>> The inlne asm has side effects you didn't report to gcc, so you  
>> need the
>> volatile here.
> OK thanks.  I guess there is no way to report this kind of side
> effect?  so you have to use volatile

That's exactly what volatile means: "this asm has some unspecified
side effect".


Segher

Re: Inline asm - unexpected optimization

[Georg-Johann Lay]

Jeremy Hall wrote:
> On 24 August 2011 11:11, Georg-Johann Lay wrote:
>> It's not a bug in gcc.
>>
>> The inlne asm has side effects you didn't report to gcc, so you need the
>> volatile here.
> OK thanks.  I guess there is no way to report this kind of side
> effect?  so you have to use volatile or call rdrand twice in the same
> asm().

Putting rdrand twice in the same asm won't help because when you then use
that asm twice or more to get several 64-bit numbers you might face a
similar problem.

> The only spanner in the works is that this problem does NOT occur with
> the similar rdtsc instruction.  I wondered if rdtsc was flagged within

If the same sequence behaves different with just an other string dropped
in instead of "rdrand" that would be very strange and astonishing.

GCC does not scan the inline assembler string except for %-operands to
replace and maybe new lines to estimate the number of instructions.

Johann

> gcc in some way to say its output was volatile, and that perhaps this
> had yet to be done with rdrand (as its a new instruction not available
> for a few months until Ivy Bridge comes out).
> 
>>> I know its a new instruction.  The retry loop etc is removed to
>>> simplify the test case.
>>>
>>> #include <stdio.h>
>>> typedef unsigned long long qword;
>>> // #define asm __asm__ __volatile__
>>>
>>> int
>>> main( int argc, char *argv[] )
>>> {
>>>  qword result;
>>>
>>>    /* for 32 bit mode call rdrand twice */
>>>  unsigned int low, high;
>>>  asm( "rdrand %0" : "=r" (low) );
>>>  asm( "rdrand %0" : "=r" (high) );
>>>  result = ((qword)high << 32U) | low;
>>>
>>>  printf("64 bit random number: %llu\n", result );
>>> }

Re: Inline asm - unexpected optimization

[Ian Lance Taylor]

Jeremy Hall <gcc.hall@gmail.com> writes:

> The only spanner in the works is that this problem does NOT occur with
> the similar rdtsc instruction.  I wondered if rdtsc was flagged within
> gcc in some way to say its output was volatile, and that perhaps this
> had yet to be done with rdrand (as its a new instruction not available
> for a few months until Ivy Bridge comes out).

gcc doesn't know anything special about rdtsc.  We would have to see the
code to understand the difference.

For your example, the second rdrand instruction is removed by the
common-subexpression-elimination pass.  By default gcc assumes that an
asm instruction reads nothing other than its inputs and changes only its
outputs.  By that reasoning, your second rdrand instruction will produce
exactly the same result as your first one, so there is no need for it,
so gcc eliminates it.  The volatile qualifier tells gcc that the asm
instruction does something which is not explicitly expressed in the
inputs and outputs.

Ian

Re: Inline asm - unexpected optimization

[Jeremy Hall]

> gcc doesn't know anything special about rdtsc.  We would have to see the
> code to understand the difference.
My bad here, sorry.  My experiment was incorrect. I rechecked it and
rdtsc is indeed treated the same way as rdrand.

> For your example, the second rdrand instruction is removed by the
> common-subexpression-elimination pass.  By default gcc assumes that an
> asm instruction reads nothing other than its inputs and changes only its
> outputs.  By that reasoning, your second rdrand instruction will produce
> exactly the same result as your first one, so there is no need for it,
> so gcc eliminates it.  The volatile qualifier tells gcc that the asm
> instruction does something which is not explicitly expressed in the
> inputs and outputs.
Thank you Ian, Georg and Segher for the helpful explanations - its clear now.