* Why does GCC drop "+simd" for the assembler if compiling for Armv8-A or Armv8-R?
@ 2020-12-03 12:25 Sebastian Huber
2020-12-03 12:53 ` Sebastian Huber
2020-12-09 14:53 ` Richard Earnshaw
0 siblings, 2 replies; 6+ messages in thread
From: Sebastian Huber @ 2020-12-03 12:25 UTC (permalink / raw)
To: gcc-help
Hello,
I have a problem that assembler files assembled by GCC issue errors due
to incomplete architecture and FPU options which should be provided by
the assembler command line and not as directives in the file. For example:
arm-rtems6-gcc -save-temps -c test.c -mthumb -march=armv8-a+crc+simd
-mfloat-abi=hard -wrapper echo
/tmp/sh/rtems/6/lib/gcc/arm-rtems6/10.2.1/cc1 -E -quiet
-D__USES_INITFINI__ test.c -mthumb -mfloat-abi=hard
-march=armv8-a+crc+simd -fpch-preprocess -o test.i
/tmp/sh/rtems/6/lib/gcc/arm-rtems6/10.2.1/cc1 -fpreprocessed test.i
-quiet -dumpbase test.c -mthumb -mfloat-abi=hard -march=armv8-a+crc+simd
-auxbase test -o test.s
/tmp/sh/rtems/6/lib64/gcc/arm-rtems6/10.2.1/../../../../arm-rtems6/bin/as
-march=armv8-a+crc -mfloat-abi=hard -meabi=5 -o test.o test.s
arm-rtems6-gcc -save-temps -c test.c -mthumb -march=armv8-r+crc+simd
-mfloat-abi=hard -wrapper echo
/tmp/sh/rtems/6/lib/gcc/arm-rtems6/10.2.1/cc1 -E -quiet
-D__USES_INITFINI__ test.c -mthumb -mfloat-abi=hard
-march=armv8-r+crc+simd -fpch-preprocess -o test.i
/tmp/sh/rtems/6/lib/gcc/arm-rtems6/10.2.1/cc1 -fpreprocessed test.i
-quiet -dumpbase test.c -mthumb -mfloat-abi=hard -march=armv8-r+crc+simd
-auxbase test -o test.s
/tmp/sh/rtems/6/lib64/gcc/arm-rtems6/10.2.1/../../../../arm-rtems6/bin/as
-march=armv8-r+crc -mfloat-abi=hard -meabi=5 -o test.o test.s
The assembler is called without the "+simd". In Armv7-A and Armv7-R the
FPU was selected by -mfpu options.
--
embedded brains GmbH
Herr Sebastian HUBER
Dornierstr. 4
82178 Puchheim
Germany
email: sebastian.hubere@embedded-brains.de
phone: +49-89-18 94 741 - 16
fax: +49-89-18 94 741 - 08
Registergericht: Amtsgericht München
Registernummer: HRB 157899
Vertretungsberechtigte Geschäftsführer: Peter Rasmussen, Thomas Dörfler
Unsere Datenschutzerklärung finden Sie hier:
https://embedded-brains.de/datenschutzerklaerung/
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: Why does GCC drop "+simd" for the assembler if compiling for Armv8-A or Armv8-R?
2020-12-03 12:25 Why does GCC drop "+simd" for the assembler if compiling for Armv8-A or Armv8-R? Sebastian Huber
@ 2020-12-03 12:53 ` Sebastian Huber
2020-12-03 14:25 ` Sebastian Huber
2020-12-09 14:53 ` Richard Earnshaw
1 sibling, 1 reply; 6+ messages in thread
From: Sebastian Huber @ 2020-12-03 12:53 UTC (permalink / raw)
To: gcc-help
On 03/12/2020 13:25, Sebastian Huber wrote:
> Hello,
>
> I have a problem that assembler files assembled by GCC issue errors
> due to incomplete architecture and FPU options which should be
> provided by the assembler command line and not as directives in the
> file. For example:
>
> arm-rtems6-gcc -save-temps -c test.c -mthumb -march=armv8-a+crc+simd
> -mfloat-abi=hard -wrapper echo
> /tmp/sh/rtems/6/lib/gcc/arm-rtems6/10.2.1/cc1 -E -quiet
> -D__USES_INITFINI__ test.c -mthumb -mfloat-abi=hard
> -march=armv8-a+crc+simd -fpch-preprocess -o test.i
> /tmp/sh/rtems/6/lib/gcc/arm-rtems6/10.2.1/cc1 -fpreprocessed test.i
> -quiet -dumpbase test.c -mthumb -mfloat-abi=hard
> -march=armv8-a+crc+simd -auxbase test -o test.s
> /tmp/sh/rtems/6/lib64/gcc/arm-rtems6/10.2.1/../../../../arm-rtems6/bin/as
> -march=armv8-a+crc -mfloat-abi=hard -meabi=5 -o test.o test.s
>
> arm-rtems6-gcc -save-temps -c test.c -mthumb -march=armv8-r+crc+simd
> -mfloat-abi=hard -wrapper echo
> /tmp/sh/rtems/6/lib/gcc/arm-rtems6/10.2.1/cc1 -E -quiet
> -D__USES_INITFINI__ test.c -mthumb -mfloat-abi=hard
> -march=armv8-r+crc+simd -fpch-preprocess -o test.i
> /tmp/sh/rtems/6/lib/gcc/arm-rtems6/10.2.1/cc1 -fpreprocessed test.i
> -quiet -dumpbase test.c -mthumb -mfloat-abi=hard
> -march=armv8-r+crc+simd -auxbase test -o test.s
> /tmp/sh/rtems/6/lib64/gcc/arm-rtems6/10.2.1/../../../../arm-rtems6/bin/as
> -march=armv8-r+crc -mfloat-abi=hard -meabi=5 -o test.o test.s
>
> The assembler is called without the "+simd". In Armv7-A and Armv7-R
> the FPU was selected by -mfpu options.
It is discarded by arm_rewrite_selected_arch() probably because
(gdb) p *entry
$16 = {name = 0x4c1acc "simd", remove = false, alias = false, isa_bits =
{isa_bit_fp_d32, isa_bit_fp_dbl, isa_bit_fp16conv, isa_bit_fpv5,
isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, isa_nobit
<repeats 54 times>}}
and
#define ISA_ALL_FPU_INTERNAL \
isa_bit_fp16conv, \
isa_bit_crypto, \
isa_bit_vfpv2, \
isa_bit_vfpv3, \
isa_bit_vfpv4, \
isa_bit_fpv5, \
isa_bit_neon, \
isa_bit_fp_dbl, \
isa_bit_fp_d32
So
(gdb) p/x fpu_bits
$17 = {m_bitmap = 0x778e60}
(gdb) p/x opt_bits
$18 = {m_bitmap = 0x778e20}
if (!bitmap_subset_p (opt_bits, fpu_bits))
optlist.push_back (entry->name);
doesn't push back entry->name.
Is this a bug or a feature?
The assembler doesn't complain about a -march=armv8-r+crc+simd and it
makes the assembler error go away, for example:
../../../cpukit/score/cpu/arm/cpu_asm.S: Assembler messages:
../../../cpukit/score/cpu/arm/cpu_asm.S:64: Error: selected processor
does not support `vstm r5,{d8-d15}' in ARM mode
../../../cpukit/score/cpu/arm/cpu_asm.S:110: Error: selected processor
does not support `vldm r5,{d8-d15}' in ARM mode
--
embedded brains GmbH
Herr Sebastian HUBER
Dornierstr. 4
82178 Puchheim
Germany
email: sebastian.hubere@embedded-brains.de
phone: +49-89-18 94 741 - 16
fax: +49-89-18 94 741 - 08
Registergericht: Amtsgericht München
Registernummer: HRB 157899
Vertretungsberechtigte Geschäftsführer: Peter Rasmussen, Thomas Dörfler
Unsere Datenschutzerklärung finden Sie hier:
https://embedded-brains.de/datenschutzerklaerung/
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: Why does GCC drop "+simd" for the assembler if compiling for Armv8-A or Armv8-R?
2020-12-03 12:53 ` Sebastian Huber
@ 2020-12-03 14:25 ` Sebastian Huber
2020-12-04 8:15 ` Sebastian Huber
0 siblings, 1 reply; 6+ messages in thread
From: Sebastian Huber @ 2020-12-03 14:25 UTC (permalink / raw)
To: gcc-help
On 03/12/2020 13:53, Sebastian Huber wrote:
> On 03/12/2020 13:25, Sebastian Huber wrote:
>
>> Hello,
>>
>> I have a problem that assembler files assembled by GCC issue errors
>> due to incomplete architecture and FPU options which should be
>> provided by the assembler command line and not as directives in the
>> file. For example:
>>
>> arm-rtems6-gcc -save-temps -c test.c -mthumb -march=armv8-a+crc+simd
>> -mfloat-abi=hard -wrapper echo
>> /tmp/sh/rtems/6/lib/gcc/arm-rtems6/10.2.1/cc1 -E -quiet
>> -D__USES_INITFINI__ test.c -mthumb -mfloat-abi=hard
>> -march=armv8-a+crc+simd -fpch-preprocess -o test.i
>> /tmp/sh/rtems/6/lib/gcc/arm-rtems6/10.2.1/cc1 -fpreprocessed test.i
>> -quiet -dumpbase test.c -mthumb -mfloat-abi=hard
>> -march=armv8-a+crc+simd -auxbase test -o test.s
>> /tmp/sh/rtems/6/lib64/gcc/arm-rtems6/10.2.1/../../../../arm-rtems6/bin/as
>> -march=armv8-a+crc -mfloat-abi=hard -meabi=5 -o test.o test.s
>>
>> arm-rtems6-gcc -save-temps -c test.c -mthumb -march=armv8-r+crc+simd
>> -mfloat-abi=hard -wrapper echo
>> /tmp/sh/rtems/6/lib/gcc/arm-rtems6/10.2.1/cc1 -E -quiet
>> -D__USES_INITFINI__ test.c -mthumb -mfloat-abi=hard
>> -march=armv8-r+crc+simd -fpch-preprocess -o test.i
>> /tmp/sh/rtems/6/lib/gcc/arm-rtems6/10.2.1/cc1 -fpreprocessed test.i
>> -quiet -dumpbase test.c -mthumb -mfloat-abi=hard
>> -march=armv8-r+crc+simd -auxbase test -o test.s
>> /tmp/sh/rtems/6/lib64/gcc/arm-rtems6/10.2.1/../../../../arm-rtems6/bin/as
>> -march=armv8-r+crc -mfloat-abi=hard -meabi=5 -o test.o test.s
>>
>> The assembler is called without the "+simd". In Armv7-A and Armv7-R
>> the FPU was selected by -mfpu options.
>
> It is discarded by arm_rewrite_selected_arch() probably because
>
> (gdb) p *entry
> $16 = {name = 0x4c1acc "simd", remove = false, alias = false, isa_bits
> = {isa_bit_fp_d32, isa_bit_fp_dbl, isa_bit_fp16conv, isa_bit_fpv5,
> isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, isa_nobit
> <repeats 54 times>}}
>
> and
>
> #define ISA_ALL_FPU_INTERNAL \
> isa_bit_fp16conv, \
> isa_bit_crypto, \
> isa_bit_vfpv2, \
> isa_bit_vfpv3, \
> isa_bit_vfpv4, \
> isa_bit_fpv5, \
> isa_bit_neon, \
> isa_bit_fp_dbl, \
> isa_bit_fp_d32
>
> So
>
> (gdb) p/x fpu_bits
> $17 = {m_bitmap = 0x778e60}
> (gdb) p/x opt_bits
> $18 = {m_bitmap = 0x778e20}
>
> if (!bitmap_subset_p (opt_bits, fpu_bits))
> optlist.push_back (entry->name);
>
> doesn't push back entry->name.
>
> Is this a bug or a feature?
>
> The assembler doesn't complain about a -march=armv8-r+crc+simd and it
> makes the assembler error go away, for example:
>
> ../../../cpukit/score/cpu/arm/cpu_asm.S: Assembler messages:
> ../../../cpukit/score/cpu/arm/cpu_asm.S:64: Error: selected processor
> does not support `vstm r5,{d8-d15}' in ARM mode
> ../../../cpukit/score/cpu/arm/cpu_asm.S:110: Error: selected processor
> does not support `vldm r5,{d8-d15}' in ARM mode
What fixes the problem is adding the "-mfpu=auto" option. For example:
arm-rtems6-gcc -save-temps -c test.c -mthumb -march=armv8-a+crc+simd
-mfloat-abi=hard -mfpu=auto -wrapper echo
/tmp/sh/rtems/6/lib/gcc/arm-rtems6/10.2.1/cc1 -E -quiet
-D__USES_INITFINI__ test.c -mthumb -mfloat-abi=hard -mfpu=auto
-march=armv8-a+crc+simd -fpch-preprocess -o test.i
/tmp/sh/rtems/6/lib/gcc/arm-rtems6/10.2.1/cc1 -fpreprocessed test.i
-quiet -dumpbase test.c -mthumb -mfloat-abi=hard -mfpu=auto
-march=armv8-a+crc+simd -auxbase test -o test.s
/tmp/sh/rtems/6/lib64/gcc/arm-rtems6/10.2.1/../../../../arm-rtems6/bin/as
-mfpu=neon-fp-armv8 -march=armv8-a+crc -mfloat-abi=hard -meabi=5 -o
test.o test.s
This is not really nice since the -mfpu=auto option seems to have no
effect on the code generation (compiler):
arm-rtems6-gcc -save-temps -E -P -v -dD test.c -mthumb
-march=armv8-a+crc+simd -mfloat-abi=hard -mfpu=auto > auto.txt 2>&1
arm-rtems6-gcc -save-temps -E -P -v -dD test.c -mthumb
-march=armv8-a+crc+simd -mfloat-abi=hard > noauto.txt 2>&1
diff -u auto.txt noauto.txt
--- auto.txt 2020-12-03 15:18:46.466141382 +0100
+++ noauto.txt 2020-12-03 15:18:52.282185710 +0100
@@ -5,8 +5,8 @@
Thread model: rtems
Supported LTO compression algorithms: zlib
gcc version 10.2.1 20201203 [releases/gcc-10 revision
75a5af680a1:72d226ca97d:3444cb38a4d8df2c198ae5b4bdc747ff0c42a940] (GCC)
-COLLECT_GCC_OPTIONS='-save-temps' '-E' '-P' '-v' '-dD' '-mthumb'
'-mfloat-abi=hard' '-mfpu=auto' '-march=armv8-a+crc+simd'
- /tmp/sh/rtems/6/lib/gcc/arm-rtems6/10.2.1/cc1 -E -quiet -v -P
-D__USES_INITFINI__ test.c -mthumb -mfloat-abi=hard -mfpu=auto
-march=armv8-a+crc+simd -fpch-preprocess -dD
+COLLECT_GCC_OPTIONS='-save-temps' '-E' '-P' '-v' '-dD' '-mthumb'
'-mfloat-abi=hard' '-march=armv8-a+crc+simd'
+ /tmp/sh/rtems/6/lib/gcc/arm-rtems6/10.2.1/cc1 -E -quiet -v -P
-D__USES_INITFINI__ test.c -mthumb -mfloat-abi=hard
-march=armv8-a+crc+simd -fpch-preprocess -dD
ignoring nonexistent directory
"/tmp/sh/rtems/6/lib64/gcc/arm-rtems6/10.2.1/../../../../arm-rtems6/sys-include"
#include "..." search starts here:
#include <...> search starts here:
@@ -466,4 +466,4 @@
#define __USES_INITFINI__ 1
COMPILER_PATH=/tmp/sh/rtems/6/lib/gcc/arm-rtems6/10.2.1/:/tmp/sh/rtems/6/lib/gcc/arm-rtems6/10.2.1/:/tmp/sh/rtems/6/lib/gcc/arm-rtems6/:/tmp/sh/rtems/6/lib64/gcc/arm-rtems6/10.2.1/:/tmp/sh/rtems/6/lib64/gcc/arm-rtems6/:/tmp/sh/rtems/6/lib64/gcc/arm-rtems6/10.2.1/../../../../arm-rtems6/bin/
LIBRARY_PATH=/tmp/sh/rtems/6/lib64/gcc/arm-rtems6/10.2.1/:/tmp/sh/rtems/6/lib64/gcc/arm-rtems6/10.2.1/../../../../arm-rtems6/lib/
-COLLECT_GCC_OPTIONS='-save-temps' '-E' '-P' '-v' '-dD' '-mthumb'
'-mfloat-abi=hard' '-mfpu=auto' '-march=armv8-a+crc+simd'
+COLLECT_GCC_OPTIONS='-save-temps' '-E' '-P' '-v' '-dD' '-mthumb'
'-mfloat-abi=hard' '-march=armv8-a+crc+simd'
In the documentation
https://gcc.gnu.org/onlinedocs/gcc/ARM-Options.html
we have
"The setting ‘auto’ is the default and is special. It causes the
compiler to select the floating-point and Advanced SIMD instructions
based on the settings of -mcpu and -march."
What does "is the default" mean here? Does the mean that it is the
behaviour if -mfpu= is not given? If yes, then I think it doesn't work
properly.
--
embedded brains GmbH
Herr Sebastian HUBER
Dornierstr. 4
82178 Puchheim
Germany
email: sebastian.hubere@embedded-brains.de
phone: +49-89-18 94 741 - 16
fax: +49-89-18 94 741 - 08
Registergericht: Amtsgericht München
Registernummer: HRB 157899
Vertretungsberechtigte Geschäftsführer: Peter Rasmussen, Thomas Dörfler
Unsere Datenschutzerklärung finden Sie hier:
https://embedded-brains.de/datenschutzerklaerung/
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: Why does GCC drop "+simd" for the assembler if compiling for Armv8-A or Armv8-R?
2020-12-03 14:25 ` Sebastian Huber
@ 2020-12-04 8:15 ` Sebastian Huber
0 siblings, 0 replies; 6+ messages in thread
From: Sebastian Huber @ 2020-12-04 8:15 UTC (permalink / raw)
To: gcc-help
Hello,
just for reference, I added a bug report:
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98135
--
embedded brains GmbH
Herr Sebastian HUBER
Dornierstr. 4
82178 Puchheim
Germany
email: sebastian.huber@embedded-brains.de
phone: +49-89-18 94 741 - 16
fax: +49-89-18 94 741 - 08
Registergericht: Amtsgericht München
Registernummer: HRB 157899
Vertretungsberechtigte Geschäftsführer: Peter Rasmussen, Thomas Dörfler
Unsere Datenschutzerklärung finden Sie hier:
https://embedded-brains.de/datenschutzerklaerung/
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: Why does GCC drop "+simd" for the assembler if compiling for Armv8-A or Armv8-R?
2020-12-03 12:25 Why does GCC drop "+simd" for the assembler if compiling for Armv8-A or Armv8-R? Sebastian Huber
2020-12-03 12:53 ` Sebastian Huber
@ 2020-12-09 14:53 ` Richard Earnshaw
2020-12-09 15:07 ` Sebastian Huber
1 sibling, 1 reply; 6+ messages in thread
From: Richard Earnshaw @ 2020-12-09 14:53 UTC (permalink / raw)
To: Sebastian Huber, gcc-help
On 03/12/2020 12:25, Sebastian Huber wrote:
> Hello,
>
> I have a problem that assembler files assembled by GCC issue errors due
> to incomplete architecture and FPU options which should be provided by
> the assembler command line and not as directives in the file. For example:
>
> arm-rtems6-gcc -save-temps -c test.c -mthumb -march=armv8-a+crc+simd
> -mfloat-abi=hard -wrapper echo
> /tmp/sh/rtems/6/lib/gcc/arm-rtems6/10.2.1/cc1 -E -quiet
> -D__USES_INITFINI__ test.c -mthumb -mfloat-abi=hard
> -march=armv8-a+crc+simd -fpch-preprocess -o test.i
> /tmp/sh/rtems/6/lib/gcc/arm-rtems6/10.2.1/cc1 -fpreprocessed test.i
> -quiet -dumpbase test.c -mthumb -mfloat-abi=hard -march=armv8-a+crc+simd
> -auxbase test -o test.s
> /tmp/sh/rtems/6/lib64/gcc/arm-rtems6/10.2.1/../../../../arm-rtems6/bin/as -march=armv8-a+crc
> -mfloat-abi=hard -meabi=5 -o test.o test.s
>
> arm-rtems6-gcc -save-temps -c test.c -mthumb -march=armv8-r+crc+simd
> -mfloat-abi=hard -wrapper echo
> /tmp/sh/rtems/6/lib/gcc/arm-rtems6/10.2.1/cc1 -E -quiet
> -D__USES_INITFINI__ test.c -mthumb -mfloat-abi=hard
> -march=armv8-r+crc+simd -fpch-preprocess -o test.i
> /tmp/sh/rtems/6/lib/gcc/arm-rtems6/10.2.1/cc1 -fpreprocessed test.i
> -quiet -dumpbase test.c -mthumb -mfloat-abi=hard -march=armv8-r+crc+simd
> -auxbase test -o test.s
> /tmp/sh/rtems/6/lib64/gcc/arm-rtems6/10.2.1/../../../../arm-rtems6/bin/as -march=armv8-r+crc
> -mfloat-abi=hard -meabi=5 -o test.o test.s
>
> The assembler is called without the "+simd". In Armv7-A and Armv7-R the
> FPU was selected by -mfpu options.
>
How is your compiler configured (output of gcc -v)?
R.
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: Why does GCC drop "+simd" for the assembler if compiling for Armv8-A or Armv8-R?
2020-12-09 14:53 ` Richard Earnshaw
@ 2020-12-09 15:07 ` Sebastian Huber
0 siblings, 0 replies; 6+ messages in thread
From: Sebastian Huber @ 2020-12-09 15:07 UTC (permalink / raw)
To: Richard Earnshaw, gcc-help
On 09/12/2020 15:53, Richard Earnshaw wrote:
> On 03/12/2020 12:25, Sebastian Huber wrote:
>> Hello,
>>
>> I have a problem that assembler files assembled by GCC issue errors due
>> to incomplete architecture and FPU options which should be provided by
>> the assembler command line and not as directives in the file. For example:
>>
>> arm-rtems6-gcc -save-temps -c test.c -mthumb -march=armv8-a+crc+simd
>> -mfloat-abi=hard -wrapper echo
>> /tmp/sh/rtems/6/lib/gcc/arm-rtems6/10.2.1/cc1 -E -quiet
>> -D__USES_INITFINI__ test.c -mthumb -mfloat-abi=hard
>> -march=armv8-a+crc+simd -fpch-preprocess -o test.i
>> /tmp/sh/rtems/6/lib/gcc/arm-rtems6/10.2.1/cc1 -fpreprocessed test.i
>> -quiet -dumpbase test.c -mthumb -mfloat-abi=hard -march=armv8-a+crc+simd
>> -auxbase test -o test.s
>> /tmp/sh/rtems/6/lib64/gcc/arm-rtems6/10.2.1/../../../../arm-rtems6/bin/as -march=armv8-a+crc
>> -mfloat-abi=hard -meabi=5 -o test.o test.s
>>
>> arm-rtems6-gcc -save-temps -c test.c -mthumb -march=armv8-r+crc+simd
>> -mfloat-abi=hard -wrapper echo
>> /tmp/sh/rtems/6/lib/gcc/arm-rtems6/10.2.1/cc1 -E -quiet
>> -D__USES_INITFINI__ test.c -mthumb -mfloat-abi=hard
>> -march=armv8-r+crc+simd -fpch-preprocess -o test.i
>> /tmp/sh/rtems/6/lib/gcc/arm-rtems6/10.2.1/cc1 -fpreprocessed test.i
>> -quiet -dumpbase test.c -mthumb -mfloat-abi=hard -march=armv8-r+crc+simd
>> -auxbase test -o test.s
>> /tmp/sh/rtems/6/lib64/gcc/arm-rtems6/10.2.1/../../../../arm-rtems6/bin/as -march=armv8-r+crc
>> -mfloat-abi=hard -meabi=5 -o test.o test.s
>>
>> The assembler is called without the "+simd". In Armv7-A and Armv7-R the
>> FPU was selected by -mfpu options.
>>
> How is your compiler configured (output of gcc -v)?
arm-rtems6-gcc -v
Using built-in specs.
COLLECT_GCC=arm-rtems6-gcc
COLLECT_LTO_WRAPPER=/opt/rtems/6/libexec/gcc/arm-rtems6/10.2.1/lto-wrapper
Target: arm-rtems6
Configured with: ../gnu-mirror-gcc-4fa2ab6/configure
--prefix=/opt/rtems/6 --bindir=/opt/rtems/6/bin
--exec_prefix=/opt/rtems/6 --includedir=/opt/rtems/6/include
--libdir=/opt/rtems/6/lib --libexecdir=/opt/rtems/6/libexec
--mandir=/opt/rtems/6/share/man --infodir=/opt/rtems/6/share/info
--datadir=/opt/rtems/6/share --build=x86_64-linux-gnu
--host=x86_64-linux-gnu --target=arm-rtems6 --disable-libstdcxx-pch
--with-gnu-as --with-gnu-ld --verbose --with-newlib --disable-nls
--without-included-gettext --disable-win32-registry
--enable-version-specific-runtime-libs --disable-lto
--enable-newlib-io-c99-formats --enable-newlib-iconv
--enable-newlib-iconv-encodings=big5,cp775,cp850,cp852,cp855,cp866,euc_jp,euc_kr,euc_tw,iso_8859_1,iso_8859_10,iso_8859_11,iso_8859_13,iso_8859_14,iso_8859_15,iso_8859_2,iso_8859_3,iso_8859_4,iso_8859_5,iso_8859_6,iso_8859_7,iso_8859_8,iso_8859_9,iso_ir_111,koi8_r,koi8_ru,koi8_u,koi8_uni,ucs_2,ucs_2_internal,ucs_2be,ucs_2le,ucs_4,ucs_4_internal,ucs_4be,ucs_4le,us_ascii,utf_16,utf_16be,utf_16le,utf_8,win_1250,win_1251,win_1252,win_1253,win_1254,win_1255,win_1256,win_1257,win_1258
--enable-threads --disable-plugin --enable-libgomp
--enable-languages=c,c++,ada
Thread model: rtems
Supported LTO compression algorithms: zlib
gcc version 10.2.1 20201203 (RTEMS 6, RSB
9ef9956f600dcce0ec9cf06820adf47203e22dc3, Newlib 7fa8405) (GCC)
The only relevant option is probably " --target=arm-rtems6".
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2020-12-03 12:25 Why does GCC drop "+simd" for the assembler if compiling for Armv8-A or Armv8-R? Sebastian Huber
2020-12-03 12:53 ` Sebastian Huber
2020-12-03 14:25 ` Sebastian Huber
2020-12-04 8:15 ` Sebastian Huber
2020-12-09 14:53 ` Richard Earnshaw
2020-12-09 15:07 ` Sebastian Huber
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