* [PATCH] rs6000: Update instruction counts to match vec_* calls [PR111228]
@ 2023-08-30 22:42 Peter Bergner
2023-08-31 6:28 ` Kewen.Lin
0 siblings, 1 reply; 2+ messages in thread
From: Peter Bergner @ 2023-08-30 22:42 UTC (permalink / raw)
To: Segher Boessenkool, Kewen.Lin, David Edelsohn; +Cc: GCC Patches, Bill Seurer
Commit r14-3258-ge7a36e4715c716 increased the amount of folding we perform,
leading to better code. Update the expected instruction counts to match the
the number of associated vec_* built-in calls.
Tested on powerpc64le-linux with no regressions. Ok for mainline?
Peter
gcc/testsuite/
PR testsuite/111228
* gcc.target/powerpc/fold-vec-logical-ors-char.c: Update instruction
counts to match the number of associated vec_* built-in calls.
* gcc.target/powerpc/fold-vec-logical-ors-int.c: Likewise.
* gcc.target/powerpc/fold-vec-logical-ors-longlong.c: Likewise.
* gcc.target/powerpc/fold-vec-logical-ors-short.c: Likewise.
* gcc.target/powerpc/fold-vec-logical-other-char.c: Likewise.
* gcc.target/powerpc/fold-vec-logical-other-int.c: Likewise.
* gcc.target/powerpc/fold-vec-logical-other-longlong.c: Likewise.
* gcc.target/powerpc/fold-vec-logical-other-short.c: Likewise.
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ors-char.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ors-char.c
index 713fed7824a..7406039d054 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ors-char.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ors-char.c
@@ -120,6 +120,6 @@ test6_nor (vector unsigned char x, vector unsigned char y)
return *foo;
}
-/* { dg-final { scan-assembler-times {\mxxlor\M} 7 } } */
+/* { dg-final { scan-assembler-times {\mxxlor\M} 6 } } */
/* { dg-final { scan-assembler-times {\mxxlxor\M} 6 } } */
-/* { dg-final { scan-assembler-times {\mxxlnor\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mxxlnor\M} 2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ors-int.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ors-int.c
index 4d1c78f40ec..a7c6366b938 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ors-int.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ors-int.c
@@ -119,6 +119,6 @@ test6_nor (vector unsigned int x, vector unsigned int y)
return *foo;
}
-/* { dg-final { scan-assembler-times {\mxxlor\M} 7 } } */
+/* { dg-final { scan-assembler-times {\mxxlor\M} 6 } } */
/* { dg-final { scan-assembler-times {\mxxlxor\M} 6 } } */
-/* { dg-final { scan-assembler-times {\mxxlnor\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mxxlnor\M} 2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ors-longlong.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ors-longlong.c
index 27ef09ada80..10c69d3d87b 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ors-longlong.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ors-longlong.c
@@ -156,6 +156,6 @@ test6_nor (vector unsigned long long x, vector unsigned long long y)
// For simplicity, this test now only targets "powerpc_p8vector_ok" environments
// where the answer is expected to be 6.
-/* { dg-final { scan-assembler-times {\mxxlor\M} 9 } } */
+/* { dg-final { scan-assembler-times {\mxxlor\M} 6 } } */
/* { dg-final { scan-assembler-times {\mxxlxor\M} 6 } } */
-/* { dg-final { scan-assembler-times {\mxxlnor\M} 3 } } */
+/* { dg-final { scan-assembler-times {\mxxlnor\M} 6 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ors-short.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ors-short.c
index f796c5b33a9..8352a7f4dc5 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ors-short.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ors-short.c
@@ -119,6 +119,6 @@ test6_nor (vector unsigned short x, vector unsigned short y)
return *foo;
}
-/* { dg-final { scan-assembler-times {\mxxlor\M} 7 } } */
+/* { dg-final { scan-assembler-times {\mxxlor\M} 6 } } */
/* { dg-final { scan-assembler-times {\mxxlxor\M} 6 } } */
-/* { dg-final { scan-assembler-times {\mxxlnor\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mxxlnor\M} 2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-other-char.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-other-char.c
index e74308ccda2..7fe3e0b8e0e 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-other-char.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-other-char.c
@@ -104,5 +104,5 @@ test6_nand (vector unsigned char x, vector unsigned char y)
return *foo;
}
-/* { dg-final { scan-assembler-times {\mxxlnand\M} 3 } } */
+/* { dg-final { scan-assembler-times {\mxxlnand\M} 6 } } */
/* { dg-final { scan-assembler-times {\mxxlorc\M} 6 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-other-int.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-other-int.c
index 57edaad52a8..61d34059b67 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-other-int.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-other-int.c
@@ -104,5 +104,5 @@ test6_nand (vector unsigned int x, vector unsigned int y)
return *foo;
}
-/* { dg-final { scan-assembler-times {\mxxlnand\M} 3 } } */
+/* { dg-final { scan-assembler-times {\mxxlnand\M} 6 } } */
/* { dg-final { scan-assembler-times {\mxxlorc\M} 6 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-other-longlong.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-other-longlong.c
index d4b85796406..d33006c17e0 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-other-longlong.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-other-longlong.c
@@ -102,5 +102,5 @@ test6_nand (vector unsigned long long x, vector unsigned long long y)
return *foo;
}
-/* { dg-final { scan-assembler-times {\mxxlnand\M} 3 } } */
+/* { dg-final { scan-assembler-times {\mxxlnand\M} 6 } } */
/* { dg-final { scan-assembler-times {\mxxlorc\M} 6 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-other-short.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-other-short.c
index bf98652750c..cc354b935dc 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-other-short.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-other-short.c
@@ -104,5 +104,5 @@ test6_nand (vector unsigned short x, vector unsigned short y)
return *foo;
}
-/* { dg-final { scan-assembler-times {\mxxlnand\M} 3 } } */
+/* { dg-final { scan-assembler-times {\mxxlnand\M} 6 } } */
/* { dg-final { scan-assembler-times {\mxxlorc\M} 6 } } */
^ permalink raw reply [flat|nested] 2+ messages in thread
* Re: [PATCH] rs6000: Update instruction counts to match vec_* calls [PR111228]
2023-08-30 22:42 [PATCH] rs6000: Update instruction counts to match vec_* calls [PR111228] Peter Bergner
@ 2023-08-31 6:28 ` Kewen.Lin
0 siblings, 0 replies; 2+ messages in thread
From: Kewen.Lin @ 2023-08-31 6:28 UTC (permalink / raw)
To: Peter Bergner
Cc: GCC Patches, Bill Seurer, Segher Boessenkool, David Edelsohn
Hi Peter,
on 2023/8/31 06:42, Peter Bergner wrote:
> Commit r14-3258-ge7a36e4715c716 increased the amount of folding we perform,
> leading to better code. Update the expected instruction counts to match the
> the number of associated vec_* built-in calls.
>
> Tested on powerpc64le-linux with no regressions. Ok for mainline?
OK for trunk, thanks!
>
> Peter
>
> gcc/testsuite/
> PR testsuite/111228
> * gcc.target/powerpc/fold-vec-logical-ors-char.c: Update instruction
> counts to match the number of associated vec_* built-in calls.
> * gcc.target/powerpc/fold-vec-logical-ors-int.c: Likewise.
> * gcc.target/powerpc/fold-vec-logical-ors-longlong.c: Likewise.
> * gcc.target/powerpc/fold-vec-logical-ors-short.c: Likewise.
> * gcc.target/powerpc/fold-vec-logical-other-char.c: Likewise.
> * gcc.target/powerpc/fold-vec-logical-other-int.c: Likewise.
> * gcc.target/powerpc/fold-vec-logical-other-longlong.c: Likewise.
> * gcc.target/powerpc/fold-vec-logical-other-short.c: Likewise.
>
> diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ors-char.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ors-char.c
> index 713fed7824a..7406039d054 100644
> --- a/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ors-char.c
> +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ors-char.c
> @@ -120,6 +120,6 @@ test6_nor (vector unsigned char x, vector unsigned char y)
> return *foo;
> }
>
> -/* { dg-final { scan-assembler-times {\mxxlor\M} 7 } } */
> +/* { dg-final { scan-assembler-times {\mxxlor\M} 6 } } */
> /* { dg-final { scan-assembler-times {\mxxlxor\M} 6 } } */
> -/* { dg-final { scan-assembler-times {\mxxlnor\M} 1 } } */
> +/* { dg-final { scan-assembler-times {\mxxlnor\M} 2 } } */
> diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ors-int.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ors-int.c
> index 4d1c78f40ec..a7c6366b938 100644
> --- a/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ors-int.c
> +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ors-int.c
> @@ -119,6 +119,6 @@ test6_nor (vector unsigned int x, vector unsigned int y)
> return *foo;
> }
>
> -/* { dg-final { scan-assembler-times {\mxxlor\M} 7 } } */
> +/* { dg-final { scan-assembler-times {\mxxlor\M} 6 } } */
> /* { dg-final { scan-assembler-times {\mxxlxor\M} 6 } } */
> -/* { dg-final { scan-assembler-times {\mxxlnor\M} 1 } } */
> +/* { dg-final { scan-assembler-times {\mxxlnor\M} 2 } } */
> diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ors-longlong.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ors-longlong.c
> index 27ef09ada80..10c69d3d87b 100644
> --- a/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ors-longlong.c
> +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ors-longlong.c
> @@ -156,6 +156,6 @@ test6_nor (vector unsigned long long x, vector unsigned long long y)
> // For simplicity, this test now only targets "powerpc_p8vector_ok" environments
> // where the answer is expected to be 6.
>
> -/* { dg-final { scan-assembler-times {\mxxlor\M} 9 } } */
> +/* { dg-final { scan-assembler-times {\mxxlor\M} 6 } } */
> /* { dg-final { scan-assembler-times {\mxxlxor\M} 6 } } */
> -/* { dg-final { scan-assembler-times {\mxxlnor\M} 3 } } */
> +/* { dg-final { scan-assembler-times {\mxxlnor\M} 6 } } */
> diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ors-short.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ors-short.c
> index f796c5b33a9..8352a7f4dc5 100644
> --- a/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ors-short.c
> +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ors-short.c
> @@ -119,6 +119,6 @@ test6_nor (vector unsigned short x, vector unsigned short y)
> return *foo;
> }
>
> -/* { dg-final { scan-assembler-times {\mxxlor\M} 7 } } */
> +/* { dg-final { scan-assembler-times {\mxxlor\M} 6 } } */
> /* { dg-final { scan-assembler-times {\mxxlxor\M} 6 } } */
> -/* { dg-final { scan-assembler-times {\mxxlnor\M} 1 } } */
> +/* { dg-final { scan-assembler-times {\mxxlnor\M} 2 } } */
> diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-other-char.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-other-char.c
> index e74308ccda2..7fe3e0b8e0e 100644
> --- a/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-other-char.c
> +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-other-char.c
> @@ -104,5 +104,5 @@ test6_nand (vector unsigned char x, vector unsigned char y)
> return *foo;
> }
>
> -/* { dg-final { scan-assembler-times {\mxxlnand\M} 3 } } */
> +/* { dg-final { scan-assembler-times {\mxxlnand\M} 6 } } */
At the first glance, this seems to become worse, but looking into the
generated asm, I found it used to have xxland which isn't scanned and
counted, and also similar sub and splat, so it's actually improved
similar to the above xxlnor. :)
BR,
Kewen
> /* { dg-final { scan-assembler-times {\mxxlorc\M} 6 } } */
> diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-other-int.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-other-int.c
> index 57edaad52a8..61d34059b67 100644
> --- a/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-other-int.c
> +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-other-int.c
> @@ -104,5 +104,5 @@ test6_nand (vector unsigned int x, vector unsigned int y)
> return *foo;
> }
>
> -/* { dg-final { scan-assembler-times {\mxxlnand\M} 3 } } */
> +/* { dg-final { scan-assembler-times {\mxxlnand\M} 6 } } */
> /* { dg-final { scan-assembler-times {\mxxlorc\M} 6 } } */
> diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-other-longlong.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-other-longlong.c
> index d4b85796406..d33006c17e0 100644
> --- a/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-other-longlong.c
> +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-other-longlong.c
> @@ -102,5 +102,5 @@ test6_nand (vector unsigned long long x, vector unsigned long long y)
> return *foo;
> }
>
> -/* { dg-final { scan-assembler-times {\mxxlnand\M} 3 } } */
> +/* { dg-final { scan-assembler-times {\mxxlnand\M} 6 } } */
> /* { dg-final { scan-assembler-times {\mxxlorc\M} 6 } } */
> diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-other-short.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-other-short.c
> index bf98652750c..cc354b935dc 100644
> --- a/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-other-short.c
> +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-other-short.c
> @@ -104,5 +104,5 @@ test6_nand (vector unsigned short x, vector unsigned short y)
> return *foo;
> }
>
> -/* { dg-final { scan-assembler-times {\mxxlnand\M} 3 } } */
> +/* { dg-final { scan-assembler-times {\mxxlnand\M} 6 } } */
> /* { dg-final { scan-assembler-times {\mxxlorc\M} 6 } } */
^ permalink raw reply [flat|nested] 2+ messages in thread
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2023-08-30 22:42 [PATCH] rs6000: Update instruction counts to match vec_* calls [PR111228] Peter Bergner
2023-08-31 6:28 ` Kewen.Lin
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