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From: "Kewen.Lin" <linkw@linux.ibm.com>
To: Michael Meissner <meissner@linux.ibm.com>
Cc: Richard Biener <richard.guenther@gmail.com>,
	gcc-patches@gcc.gnu.org,
	Segher Boessenkool <segher@kernel.crashing.org>,
	David Edelsohn <dje.gcc@gmail.com>,
	Peter Bergner <bergner@linux.ibm.com>
Subject: Re: [PATCH 0/4] Add vector pair support to PowerPC attribute((vector_size(32)))
Date: Fri, 24 Nov 2023 17:41:02 +0800	[thread overview]
Message-ID: <03ee6809-d7b3-34a8-7149-28c9b92c71f1@linux.ibm.com> (raw)
In-Reply-To: <ZVsfRFlfoRQL9XRc@cowardly-lion.the-meissners.org>

on 2023/11/20 16:56, Michael Meissner wrote:
> On Mon, Nov 20, 2023 at 08:24:35AM +0100, Richard Biener wrote:
>> I wouldn't expose the "fake" larger modes to the vectorizer but rather
>> adjust m_suggested_unroll_factor (which you already do to some extent).
> 
> Thanks.  I figure I first need to fix the shuffle byes issue first and get a
> clean test run (with the flag enabled by default), before delving into the
> vectorization issues.
> 
> But testing has shown that at least in the loop I was looking at, that using
> vector pair instructions (either through the built-ins I had previously posted
> or with these patches), that even if I turn off unrolling completely for the
> vector pair case, it still is faster than unrolling the loop 4 times for using
> vector types (or auto vectorization).  Note, of course the margin is much
> smaller in this case.
> 
> vector double:           (a * b) + c, unroll 4         loop time: 0.55483
> vector double:           (a * b) + c, unroll default   loop time: 0.55638
> vector double:           (a * b) + c, unroll 0         loop time: 0.55686
> vector double:           (a * b) + c, unroll 2         loop time: 0.55772
> 
> vector32, w/vector pair: (a * b) + c, unroll 4         loop time: 0.48257
> vector32, w/vector pair: (a * b) + c, unroll 2         loop time: 0.50782
> vector32, w/vector pair: (a * b) + c, unroll default   loop time: 0.50864
> vector32, w/vector pair: (a * b) + c, unroll 0         loop time: 0.52224
> 
> Of course being micro-benchmarks, it doesn't mean that this translates to the
> behavior on actual code.
> 
> 

I noticed that Ajit posted a patch for adding one new pass to replace contiguous
addresses vector load lxv with lxvp:

https://inbox.sourceware.org/gcc-patches/ef0c54a5-c35c-3519-f062-9ac78ee66b81@linux.ibm.com/

How about making this kind of rs6000 specific pass to pair both vector load and
store?  Users can make more unrolling with parameters and those memory accesses
from unrolling should be neat, I'd expect the pass can easily detect and pair the
candidates.

BR,
Kewen

  parent reply	other threads:[~2023-11-24  9:41 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-11-20  4:18 Michael Meissner
2023-11-20  4:20 ` [PATCH 1/4] Add basic vector pair mode support Michael Meissner
2023-11-20  4:23 ` [PATCH 1/4] Add vector pair modes to PowerPC (patch attached) Michael Meissner
2023-11-20  4:23 ` [PATCH 2/4] Vector pair floating point support for PowerPC Michael Meissner
2023-11-20  4:26 ` [PATCH 3/4] Add integer vector pair mode support to PowerPC Michael Meissner
2023-11-20  4:26 ` [PATCH 4/4] Add vector pair tests " Michael Meissner
2023-11-20  7:24 ` [PATCH 0/4] Add vector pair support to PowerPC attribute((vector_size(32))) Richard Biener
2023-11-20  8:56   ` Michael Meissner
2023-11-20  9:08     ` Richard Biener
2023-11-24  9:41     ` Kewen.Lin [this message]
2023-11-28  4:26       ` Michael Meissner

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