* [PATCH] RISC-V: Enable ztso tests on rv32
@ 2023-10-31 0:47 Patrick O'Neill
2023-10-31 13:03 ` Jeff Law
0 siblings, 1 reply; 2+ messages in thread
From: Patrick O'Neill @ 2023-10-31 0:47 UTC (permalink / raw)
To: gcc-patches; +Cc: Patrick O'Neill
This patch transitions the ztso testcases to use the testsuite infrastructure,
enabling the tests on both rv64 and rv32 targets.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/amo-table-ztso-amo-add-1.c: Add Ztso extension to
dg-options for dg-do compile.
* gcc.target/riscv/amo-table-ztso-amo-add-2.c: Ditto.
* gcc.target/riscv/amo-table-ztso-amo-add-3.c: Ditto.
* gcc.target/riscv/amo-table-ztso-amo-add-4.c: Ditto.
* gcc.target/riscv/amo-table-ztso-amo-add-5.c: Ditto.
* gcc.target/riscv/amo-table-ztso-compare-exchange-1.c: Ditto.
* gcc.target/riscv/amo-table-ztso-compare-exchange-2.c: Ditto.
* gcc.target/riscv/amo-table-ztso-compare-exchange-3.c: Ditto.
* gcc.target/riscv/amo-table-ztso-compare-exchange-4.c: Ditto.
* gcc.target/riscv/amo-table-ztso-compare-exchange-5.c: Ditto.
* gcc.target/riscv/amo-table-ztso-compare-exchange-6.c: Ditto.
* gcc.target/riscv/amo-table-ztso-compare-exchange-7.c: Ditto.
* gcc.target/riscv/amo-table-ztso-fence-1.c: Ditto.
* gcc.target/riscv/amo-table-ztso-fence-2.c: Ditto.
* gcc.target/riscv/amo-table-ztso-fence-3.c: Ditto.
* gcc.target/riscv/amo-table-ztso-fence-4.c: Ditto.
* gcc.target/riscv/amo-table-ztso-fence-5.c: Ditto.
* gcc.target/riscv/amo-table-ztso-load-1.c: Ditto.
* gcc.target/riscv/amo-table-ztso-load-2.c: Ditto.
* gcc.target/riscv/amo-table-ztso-load-3.c: Ditto.
* gcc.target/riscv/amo-table-ztso-store-1.c: Ditto.
* gcc.target/riscv/amo-table-ztso-store-2.c: Ditto.
* gcc.target/riscv/amo-table-ztso-store-3.c: Ditto.
* gcc.target/riscv/amo-table-ztso-subword-amo-add-1.c: Ditto.
* gcc.target/riscv/amo-table-ztso-subword-amo-add-2.c: Ditto.
* gcc.target/riscv/amo-table-ztso-subword-amo-add-3.c: Ditto.
* gcc.target/riscv/amo-table-ztso-subword-amo-add-4.c: Ditto.
* gcc.target/riscv/amo-table-ztso-subword-amo-add-5.c: Ditto.
* lib/target-supports.exp: Add testing infrastructure to require the
Ztso extension or add it to an existing -march.
Signed-off-by: Patrick O'Neill <patrick@rivosinc.com>
---
.../riscv/amo-table-ztso-amo-add-1.c | 3 ++-
.../riscv/amo-table-ztso-amo-add-2.c | 3 ++-
.../riscv/amo-table-ztso-amo-add-3.c | 3 ++-
.../riscv/amo-table-ztso-amo-add-4.c | 3 ++-
.../riscv/amo-table-ztso-amo-add-5.c | 3 ++-
.../riscv/amo-table-ztso-compare-exchange-1.c | 2 +-
.../riscv/amo-table-ztso-compare-exchange-2.c | 2 +-
.../riscv/amo-table-ztso-compare-exchange-3.c | 2 +-
.../riscv/amo-table-ztso-compare-exchange-4.c | 2 +-
.../riscv/amo-table-ztso-compare-exchange-5.c | 2 +-
.../riscv/amo-table-ztso-compare-exchange-6.c | 2 +-
.../riscv/amo-table-ztso-compare-exchange-7.c | 2 +-
.../gcc.target/riscv/amo-table-ztso-fence-1.c | 3 ++-
.../gcc.target/riscv/amo-table-ztso-fence-2.c | 3 ++-
.../gcc.target/riscv/amo-table-ztso-fence-3.c | 3 ++-
.../gcc.target/riscv/amo-table-ztso-fence-4.c | 3 ++-
.../gcc.target/riscv/amo-table-ztso-fence-5.c | 3 ++-
.../gcc.target/riscv/amo-table-ztso-load-1.c | 3 ++-
.../gcc.target/riscv/amo-table-ztso-load-2.c | 3 ++-
.../gcc.target/riscv/amo-table-ztso-load-3.c | 3 ++-
.../gcc.target/riscv/amo-table-ztso-store-1.c | 3 ++-
.../gcc.target/riscv/amo-table-ztso-store-2.c | 3 ++-
.../gcc.target/riscv/amo-table-ztso-store-3.c | 3 ++-
.../riscv/amo-table-ztso-subword-amo-add-1.c | 2 +-
.../riscv/amo-table-ztso-subword-amo-add-2.c | 2 +-
.../riscv/amo-table-ztso-subword-amo-add-3.c | 2 +-
.../riscv/amo-table-ztso-subword-amo-add-4.c | 2 +-
.../riscv/amo-table-ztso-subword-amo-add-5.c | 2 +-
gcc/testsuite/lib/target-supports.exp | 23 +++++++++++++++++++
29 files changed, 67 insertions(+), 28 deletions(-)
diff --git a/gcc/testsuite/gcc.target/riscv/amo-table-ztso-amo-add-1.c b/gcc/testsuite/gcc.target/riscv/amo-table-ztso-amo-add-1.c
index a88d08eb3f4..65a4351025d 100644
--- a/gcc/testsuite/gcc.target/riscv/amo-table-ztso-amo-add-1.c
+++ b/gcc/testsuite/gcc.target/riscv/amo-table-ztso-amo-add-1.c
@@ -1,6 +1,7 @@
/* { dg-do compile } */
/* Verify that atomic op mappings match the Ztso suggested mapping. */
-/* { dg-options "-march=rv64id_ztso -mabi=lp64d -O3" } */
+/* { dg-options "-O3" } */
+/* { dg-add-options riscv_ztso } */
/* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */
/* { dg-final { check-function-bodies "**" "" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/amo-table-ztso-amo-add-2.c b/gcc/testsuite/gcc.target/riscv/amo-table-ztso-amo-add-2.c
index ebd240f9dd2..03da6b04de0 100644
--- a/gcc/testsuite/gcc.target/riscv/amo-table-ztso-amo-add-2.c
+++ b/gcc/testsuite/gcc.target/riscv/amo-table-ztso-amo-add-2.c
@@ -1,6 +1,7 @@
/* { dg-do compile } */
/* Verify that atomic op mappings the Ztso suggested mapping. */
-/* { dg-options "-march=rv64id_ztso -mabi=lp64d -O3" } */
+/* { dg-options "-O3" } */
+/* { dg-add-options riscv_ztso } */
/* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */
/* { dg-final { check-function-bodies "**" "" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/amo-table-ztso-amo-add-3.c b/gcc/testsuite/gcc.target/riscv/amo-table-ztso-amo-add-3.c
index ee00d222ece..695306e9d6f 100644
--- a/gcc/testsuite/gcc.target/riscv/amo-table-ztso-amo-add-3.c
+++ b/gcc/testsuite/gcc.target/riscv/amo-table-ztso-amo-add-3.c
@@ -1,6 +1,7 @@
/* { dg-do compile } */
/* Verify that atomic op mappings match the Ztso suggested mapping. */
-/* { dg-options "-march=rv64id_ztso -mabi=lp64d -O3" } */
+/* { dg-options "-O3" } */
+/* { dg-add-options riscv_ztso } */
/* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */
/* { dg-final { check-function-bodies "**" "" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/amo-table-ztso-amo-add-4.c b/gcc/testsuite/gcc.target/riscv/amo-table-ztso-amo-add-4.c
index ff08811c5d7..e7e5ac7cc88 100644
--- a/gcc/testsuite/gcc.target/riscv/amo-table-ztso-amo-add-4.c
+++ b/gcc/testsuite/gcc.target/riscv/amo-table-ztso-amo-add-4.c
@@ -1,6 +1,7 @@
/* { dg-do compile } */
/* Verify that atomic op mappings match the Ztso suggested mapping. */
-/* { dg-options "-march=rv64id_ztso -mabi=lp64d -O3" } */
+/* { dg-options "-O3" } */
+/* { dg-add-options riscv_ztso } */
/* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */
/* { dg-final { check-function-bodies "**" "" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/amo-table-ztso-amo-add-5.c b/gcc/testsuite/gcc.target/riscv/amo-table-ztso-amo-add-5.c
index b129df4b607..457d0b12fbe 100644
--- a/gcc/testsuite/gcc.target/riscv/amo-table-ztso-amo-add-5.c
+++ b/gcc/testsuite/gcc.target/riscv/amo-table-ztso-amo-add-5.c
@@ -1,6 +1,7 @@
/* { dg-do compile } */
/* Verify that atomic op mappings match the Ztso suggested mapping. */
-/* { dg-options "-march=rv64id_ztso -mabi=lp64d -O3" } */
+/* { dg-options "-O3" } */
+/* { dg-add-options riscv_ztso } */
/* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */
/* { dg-final { check-function-bodies "**" "" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/amo-table-ztso-compare-exchange-1.c b/gcc/testsuite/gcc.target/riscv/amo-table-ztso-compare-exchange-1.c
index 9d5b8c2a5f6..dd6b5c24aa0 100644
--- a/gcc/testsuite/gcc.target/riscv/amo-table-ztso-compare-exchange-1.c
+++ b/gcc/testsuite/gcc.target/riscv/amo-table-ztso-compare-exchange-1.c
@@ -1,6 +1,6 @@
/* { dg-do compile } */
/* Verify that compare exchange mappings match the Ztso suggested mapping. */
-/* { dg-options "-march=rv64id_ztso -mabi=lp64d" } */
+/* { dg-add-options riscv_ztso } */
/* { dg-final { scan-assembler-times "lr.w\t" 1 } } */
/* { dg-final { scan-assembler-times "sc.w\t" 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/amo-table-ztso-compare-exchange-2.c b/gcc/testsuite/gcc.target/riscv/amo-table-ztso-compare-exchange-2.c
index 57d6746ee22..b0bafa3296e 100644
--- a/gcc/testsuite/gcc.target/riscv/amo-table-ztso-compare-exchange-2.c
+++ b/gcc/testsuite/gcc.target/riscv/amo-table-ztso-compare-exchange-2.c
@@ -1,6 +1,6 @@
/* { dg-do compile } */
/* Verify that compare exchange mappings match the Ztso suggested mapping. */
-/* { dg-options "-march=rv64id_ztso -mabi=lp64d" } */
+/* { dg-add-options riscv_ztso } */
/* { dg-final { scan-assembler-times "lr.w\t" 1 } } */
/* { dg-final { scan-assembler-times "sc.w\t" 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/amo-table-ztso-compare-exchange-3.c b/gcc/testsuite/gcc.target/riscv/amo-table-ztso-compare-exchange-3.c
index d0044106d36..78cb8aa9748 100644
--- a/gcc/testsuite/gcc.target/riscv/amo-table-ztso-compare-exchange-3.c
+++ b/gcc/testsuite/gcc.target/riscv/amo-table-ztso-compare-exchange-3.c
@@ -1,6 +1,6 @@
/* { dg-do compile } */
/* Verify that compare exchange mappings match the Ztso suggested mapping. */
-/* { dg-options "-march=rv64id_ztso -mabi=lp64d" } */
+/* { dg-add-options riscv_ztso } */
/* { dg-final { scan-assembler-times "lr.w\t" 1 } } */
/* { dg-final { scan-assembler-times "sc.w\t" 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/amo-table-ztso-compare-exchange-4.c b/gcc/testsuite/gcc.target/riscv/amo-table-ztso-compare-exchange-4.c
index 6a53473e26b..0656b84c787 100644
--- a/gcc/testsuite/gcc.target/riscv/amo-table-ztso-compare-exchange-4.c
+++ b/gcc/testsuite/gcc.target/riscv/amo-table-ztso-compare-exchange-4.c
@@ -1,6 +1,6 @@
/* { dg-do compile } */
/* Verify that compare exchange mappings match the Ztso suggested mapping. */
-/* { dg-options "-march=rv64id_ztso -mabi=lp64d" } */
+/* { dg-add-options riscv_ztso } */
/* { dg-final { scan-assembler-times "lr.w\t" 1 } } */
/* { dg-final { scan-assembler-times "sc.w\t" 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/amo-table-ztso-compare-exchange-5.c b/gcc/testsuite/gcc.target/riscv/amo-table-ztso-compare-exchange-5.c
index 80729091c73..33d486c26ca 100644
--- a/gcc/testsuite/gcc.target/riscv/amo-table-ztso-compare-exchange-5.c
+++ b/gcc/testsuite/gcc.target/riscv/amo-table-ztso-compare-exchange-5.c
@@ -1,6 +1,6 @@
/* { dg-do compile } */
/* Verify that compare exchange mappings match the Ztso suggested mapping. */
-/* { dg-options "-march=rv64id_ztso -mabi=lp64d" } */
+/* { dg-add-options riscv_ztso } */
/* { dg-final { scan-assembler-times "lr.w.aqrl\t" 1 } } */
/* { dg-final { scan-assembler-times "sc.w.rl\t" 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/amo-table-ztso-compare-exchange-6.c b/gcc/testsuite/gcc.target/riscv/amo-table-ztso-compare-exchange-6.c
index 731f7f84af4..f8331bfcd0d 100644
--- a/gcc/testsuite/gcc.target/riscv/amo-table-ztso-compare-exchange-6.c
+++ b/gcc/testsuite/gcc.target/riscv/amo-table-ztso-compare-exchange-6.c
@@ -1,6 +1,6 @@
/* { dg-do compile } */
/* Verify that compare exchange mappings match the Ztso suggested mapping. */
-/* { dg-options "-march=rv64id_ztso -mabi=lp64d" } */
+/* { dg-add-options riscv_ztso } */
/* { dg-final { scan-assembler-times "lr.w\t" 1 } } */
/* { dg-final { scan-assembler-times "sc.w\t" 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/amo-table-ztso-compare-exchange-7.c b/gcc/testsuite/gcc.target/riscv/amo-table-ztso-compare-exchange-7.c
index 3806d55da1d..b5c42e1df1d 100644
--- a/gcc/testsuite/gcc.target/riscv/amo-table-ztso-compare-exchange-7.c
+++ b/gcc/testsuite/gcc.target/riscv/amo-table-ztso-compare-exchange-7.c
@@ -1,6 +1,6 @@
/* { dg-do compile } */
/* Verify that compare exchange mappings match the Ztso suggested mapping. */
-/* { dg-options "-march=rv64id_ztso -mabi=lp64d" } */
+/* { dg-add-options riscv_ztso } */
/* { dg-final { scan-assembler-times "lr.w.aqrl\t" 1 } } */
/* { dg-final { scan-assembler-times "sc.w.rl\t" 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/amo-table-ztso-fence-1.c b/gcc/testsuite/gcc.target/riscv/amo-table-ztso-fence-1.c
index 81f2f9fbbd6..ec008d25794 100644
--- a/gcc/testsuite/gcc.target/riscv/amo-table-ztso-fence-1.c
+++ b/gcc/testsuite/gcc.target/riscv/amo-table-ztso-fence-1.c
@@ -1,6 +1,7 @@
/* { dg-do compile } */
/* Verify that fence mappings match the Ztso suggested mapping. */
-/* { dg-options "-march=rv64id_ztso -mabi=lp64d -O3" } */
+/* { dg-options "-O3" } */
+/* { dg-add-options riscv_ztso } */
/* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */
/* { dg-final { check-function-bodies "**" "" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/amo-table-ztso-fence-2.c b/gcc/testsuite/gcc.target/riscv/amo-table-ztso-fence-2.c
index 8e868890bae..acef911573f 100644
--- a/gcc/testsuite/gcc.target/riscv/amo-table-ztso-fence-2.c
+++ b/gcc/testsuite/gcc.target/riscv/amo-table-ztso-fence-2.c
@@ -1,6 +1,7 @@
/* { dg-do compile } */
/* Verify that fence mappings match the Ztso suggested mapping. */
-/* { dg-options "-march=rv64id_ztso -mabi=lp64d -O3" } */
+/* { dg-options "-O3" } */
+/* { dg-add-options riscv_ztso } */
/* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */
/* { dg-final { check-function-bodies "**" "" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/amo-table-ztso-fence-3.c b/gcc/testsuite/gcc.target/riscv/amo-table-ztso-fence-3.c
index 5eb1aa7f472..6931ba0a799 100644
--- a/gcc/testsuite/gcc.target/riscv/amo-table-ztso-fence-3.c
+++ b/gcc/testsuite/gcc.target/riscv/amo-table-ztso-fence-3.c
@@ -1,6 +1,7 @@
/* { dg-do compile } */
/* Verify that fence mappings match the Ztso suggested mapping. */
-/* { dg-options "-march=rv64id_ztso -mabi=lp64d -O3" } */
+/* { dg-options "-O3" } */
+/* { dg-add-options riscv_ztso } */
/* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */
/* { dg-final { check-function-bodies "**" "" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/amo-table-ztso-fence-4.c b/gcc/testsuite/gcc.target/riscv/amo-table-ztso-fence-4.c
index 3df959a3eb0..b5a04294ad0 100644
--- a/gcc/testsuite/gcc.target/riscv/amo-table-ztso-fence-4.c
+++ b/gcc/testsuite/gcc.target/riscv/amo-table-ztso-fence-4.c
@@ -1,6 +1,7 @@
/* { dg-do compile } */
/* Verify that fence mappings match the Ztso suggested mapping. */
-/* { dg-options "-march=rv64id_ztso -mabi=lp64d -O3" } */
+/* { dg-options "-O3" } */
+/* { dg-add-options riscv_ztso } */
/* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */
/* { dg-final { check-function-bodies "**" "" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/amo-table-ztso-fence-5.c b/gcc/testsuite/gcc.target/riscv/amo-table-ztso-fence-5.c
index 731f9a34267..860fb978cbc 100644
--- a/gcc/testsuite/gcc.target/riscv/amo-table-ztso-fence-5.c
+++ b/gcc/testsuite/gcc.target/riscv/amo-table-ztso-fence-5.c
@@ -1,6 +1,7 @@
/* { dg-do compile } */
/* Verify that fence mappings match the Ztso suggested mapping. */
-/* { dg-options "-march=rv64id_ztso -mabi=lp64d -O3" } */
+/* { dg-options "-O3" } */
+/* { dg-add-options riscv_ztso } */
/* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */
/* { dg-final { check-function-bodies "**" "" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/amo-table-ztso-load-1.c b/gcc/testsuite/gcc.target/riscv/amo-table-ztso-load-1.c
index b911a6e3207..631977985bd 100644
--- a/gcc/testsuite/gcc.target/riscv/amo-table-ztso-load-1.c
+++ b/gcc/testsuite/gcc.target/riscv/amo-table-ztso-load-1.c
@@ -1,6 +1,7 @@
/* { dg-do compile } */
/* Verify that load mappings match the Ztso suggested mapping. */
-/* { dg-options "-march=rv64id_ztso -mabi=lp64d -O3" } */
+/* { dg-options "-O3" } */
+/* { dg-add-options riscv_ztso } */
/* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */
/* { dg-final { check-function-bodies "**" "" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/amo-table-ztso-load-2.c b/gcc/testsuite/gcc.target/riscv/amo-table-ztso-load-2.c
index 056506f6370..2c24f10fb44 100644
--- a/gcc/testsuite/gcc.target/riscv/amo-table-ztso-load-2.c
+++ b/gcc/testsuite/gcc.target/riscv/amo-table-ztso-load-2.c
@@ -1,6 +1,7 @@
/* { dg-do compile } */
/* Verify that load mappings match the Ztso suggested mapping. */
-/* { dg-options "-march=rv64id_ztso -mabi=lp64d -O3" } */
+/* { dg-options "-O3" } */
+/* { dg-add-options riscv_ztso } */
/* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */
/* { dg-final { check-function-bodies "**" "" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/amo-table-ztso-load-3.c b/gcc/testsuite/gcc.target/riscv/amo-table-ztso-load-3.c
index 35a301f321d..7d2166d29c0 100644
--- a/gcc/testsuite/gcc.target/riscv/amo-table-ztso-load-3.c
+++ b/gcc/testsuite/gcc.target/riscv/amo-table-ztso-load-3.c
@@ -1,6 +1,7 @@
/* { dg-do compile } */
/* Verify that load mappings match the Ztso suggested mapping. */
-/* { dg-options "-march=rv64id_ztso -mabi=lp64d -O3" } */
+/* { dg-options "-O3" } */
+/* { dg-add-options riscv_ztso } */
/* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */
/* { dg-final { check-function-bodies "**" "" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/amo-table-ztso-store-1.c b/gcc/testsuite/gcc.target/riscv/amo-table-ztso-store-1.c
index f0bda4b2420..29a770285ef 100644
--- a/gcc/testsuite/gcc.target/riscv/amo-table-ztso-store-1.c
+++ b/gcc/testsuite/gcc.target/riscv/amo-table-ztso-store-1.c
@@ -1,6 +1,7 @@
/* { dg-do compile } */
/* Verify that store mappings match the Ztso suggested mapping. */
-/* { dg-options "-march=rv64id_ztso -mabi=lp64d -O3" } */
+/* { dg-options "-O3" } */
+/* { dg-add-options riscv_ztso } */
/* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */
/* { dg-final { check-function-bodies "**" "" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/amo-table-ztso-store-2.c b/gcc/testsuite/gcc.target/riscv/amo-table-ztso-store-2.c
index 45f73056aa4..fb82360ad33 100644
--- a/gcc/testsuite/gcc.target/riscv/amo-table-ztso-store-2.c
+++ b/gcc/testsuite/gcc.target/riscv/amo-table-ztso-store-2.c
@@ -1,6 +1,7 @@
/* { dg-do compile } */
/* Verify that store mappings match the Ztso suggested mapping. */
-/* { dg-options "-march=rv64id_ztso -mabi=lp64d -O3" } */
+/* { dg-options "-O3" } */
+/* { dg-add-options riscv_ztso } */
/* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */
/* { dg-final { check-function-bodies "**" "" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/amo-table-ztso-store-3.c b/gcc/testsuite/gcc.target/riscv/amo-table-ztso-store-3.c
index 762468b248e..88d8432d8c9 100644
--- a/gcc/testsuite/gcc.target/riscv/amo-table-ztso-store-3.c
+++ b/gcc/testsuite/gcc.target/riscv/amo-table-ztso-store-3.c
@@ -1,6 +1,7 @@
/* { dg-do compile } */
/* Verify that store mappings match the Ztso suggested mapping. */
-/* { dg-options "-march=rv64id_ztso -mabi=lp64d -O3" } */
+/* { dg-options "-O3" } */
+/* { dg-add-options riscv_ztso } */
/* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */
/* { dg-final { check-function-bodies "**" "" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/amo-table-ztso-subword-amo-add-1.c b/gcc/testsuite/gcc.target/riscv/amo-table-ztso-subword-amo-add-1.c
index e9ae506f32c..3ba69ebc325 100644
--- a/gcc/testsuite/gcc.target/riscv/amo-table-ztso-subword-amo-add-1.c
+++ b/gcc/testsuite/gcc.target/riscv/amo-table-ztso-subword-amo-add-1.c
@@ -1,6 +1,6 @@
/* { dg-do compile } */
/* Verify that subword atomic op mappings match the Ztso suggested mapping. */
-/* { dg-options "-march=rv64id_ztso -mabi=lp64d" } */
+/* { dg-add-options riscv_ztso } */
/* { dg-final { scan-assembler-times "lr.w\t" 1 } } */
/* { dg-final { scan-assembler-times "sc.w\t" 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/amo-table-ztso-subword-amo-add-2.c b/gcc/testsuite/gcc.target/riscv/amo-table-ztso-subword-amo-add-2.c
index f47922f13e4..4f38ed3015c 100644
--- a/gcc/testsuite/gcc.target/riscv/amo-table-ztso-subword-amo-add-2.c
+++ b/gcc/testsuite/gcc.target/riscv/amo-table-ztso-subword-amo-add-2.c
@@ -1,6 +1,6 @@
/* { dg-do compile } */
/* Verify that subword atomic op mappings match the Ztso suggested mapping. */
-/* { dg-options "-march=rv64id_ztso -mabi=lp64d" } */
+/* { dg-add-options riscv_ztso } */
/* { dg-final { scan-assembler-times "lr.w\t" 1 } } */
/* { dg-final { scan-assembler-times "sc.w\t" 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/amo-table-ztso-subword-amo-add-3.c b/gcc/testsuite/gcc.target/riscv/amo-table-ztso-subword-amo-add-3.c
index 296387ad07c..e5bcb127552 100644
--- a/gcc/testsuite/gcc.target/riscv/amo-table-ztso-subword-amo-add-3.c
+++ b/gcc/testsuite/gcc.target/riscv/amo-table-ztso-subword-amo-add-3.c
@@ -1,6 +1,6 @@
/* { dg-do compile } */
/* Verify that subword atomic op mappings match the Ztso suggested mapping. */
-/* { dg-options "-march=rv64id_ztso -mabi=lp64d" } */
+/* { dg-add-options riscv_ztso } */
/* { dg-final { scan-assembler-times "lr.w\t" 1 } } */
/* { dg-final { scan-assembler-times "sc.w\t" 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/amo-table-ztso-subword-amo-add-4.c b/gcc/testsuite/gcc.target/riscv/amo-table-ztso-subword-amo-add-4.c
index f919ede7303..316183c268b 100644
--- a/gcc/testsuite/gcc.target/riscv/amo-table-ztso-subword-amo-add-4.c
+++ b/gcc/testsuite/gcc.target/riscv/amo-table-ztso-subword-amo-add-4.c
@@ -1,6 +1,6 @@
/* { dg-do compile } */
/* Verify that subword atomic op mappings match the Ztso suggested mapping. */
-/* { dg-options "-march=rv64id_ztso -mabi=lp64d" } */
+/* { dg-add-options riscv_ztso } */
/* { dg-final { scan-assembler-times "lr.w\t" 1 } } */
/* { dg-final { scan-assembler-times "sc.w\t" 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/amo-table-ztso-subword-amo-add-5.c b/gcc/testsuite/gcc.target/riscv/amo-table-ztso-subword-amo-add-5.c
index 2027a93218c..fc1aa8d94f1 100644
--- a/gcc/testsuite/gcc.target/riscv/amo-table-ztso-subword-amo-add-5.c
+++ b/gcc/testsuite/gcc.target/riscv/amo-table-ztso-subword-amo-add-5.c
@@ -1,6 +1,6 @@
/* { dg-do compile } */
/* Verify that subword atomic op mappings match the Ztso suggested mapping. */
-/* { dg-options "-march=rv64id_ztso -mabi=lp64d" } */
+/* { dg-add-options riscv_ztso } */
/* { dg-final { scan-assembler-times "lr.w.aqrl\t" 1 } } */
/* { dg-final { scan-assembler-times "sc.w.rl\t" 1 } } */
diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp
index f0b692a2e19..af0bf0c48d7 100644
--- a/gcc/testsuite/lib/target-supports.exp
+++ b/gcc/testsuite/lib/target-supports.exp
@@ -1939,6 +1939,17 @@ proc check_effective_target_riscv_zfh { } {
}]
}
+# Return 1 if the target arch supports the TSO memory ordering extension,
+# 0 otherwise. Cache the result.
+
+proc check_effective_target_riscv_ztso { } {
+ return [check_no_compiler_messages riscv_ext_a assembly {
+ #ifndef __riscv_ztso
+ #error "Not __riscv_ztso"
+ #endif
+ }]
+}
+
# Return 1 if we can execute code when using dg-add-options riscv_v
proc check_effective_target_riscv_v_ok { } {
@@ -2052,6 +2063,18 @@ proc add_options_for_riscv_zfh { flags } {
return "$flags -march=[riscv_get_arch]_zfh"
}
+proc add_options_for_riscv_ztso { flags } {
+ if { [lsearch $flags -march=*] >= 0 } {
+ # If there are multiple -march flags, we have to adjust all of them.
+ set flags [regsub -all -- {(?:^|[[:space:]])-march=[[:alnum:]_.]*} $flags &_ztso ]
+ return [regsub -all -- {((?:^|[[:space:]])-march=[[:alnum:]_.]*_ztso[[:alnum:]_.]*)_ztso} $flags \\1 ]
+ }
+ if { [check_effective_target_riscv_ztso] } {
+ return "$flags"
+ }
+ return "$flags -march=[riscv_get_arch]_ztso"
+}
+
# Return 1 if the target OS supports running SSE executables, 0
# otherwise. Cache the result.
--
2.34.1
^ permalink raw reply [flat|nested] 2+ messages in thread
* Re: [PATCH] RISC-V: Enable ztso tests on rv32
2023-10-31 0:47 [PATCH] RISC-V: Enable ztso tests on rv32 Patrick O'Neill
@ 2023-10-31 13:03 ` Jeff Law
0 siblings, 0 replies; 2+ messages in thread
From: Jeff Law @ 2023-10-31 13:03 UTC (permalink / raw)
To: Patrick O'Neill, gcc-patches
On 10/30/23 18:47, Patrick O'Neill wrote:
> This patch transitions the ztso testcases to use the testsuite infrastructure,
> enabling the tests on both rv64 and rv32 targets.
>
> gcc/testsuite/ChangeLog:
>
> * gcc.target/riscv/amo-table-ztso-amo-add-1.c: Add Ztso extension to
> dg-options for dg-do compile.
> * gcc.target/riscv/amo-table-ztso-amo-add-2.c: Ditto.
> * gcc.target/riscv/amo-table-ztso-amo-add-3.c: Ditto.
> * gcc.target/riscv/amo-table-ztso-amo-add-4.c: Ditto.
> * gcc.target/riscv/amo-table-ztso-amo-add-5.c: Ditto.
> * gcc.target/riscv/amo-table-ztso-compare-exchange-1.c: Ditto.
> * gcc.target/riscv/amo-table-ztso-compare-exchange-2.c: Ditto.
> * gcc.target/riscv/amo-table-ztso-compare-exchange-3.c: Ditto.
> * gcc.target/riscv/amo-table-ztso-compare-exchange-4.c: Ditto.
> * gcc.target/riscv/amo-table-ztso-compare-exchange-5.c: Ditto.
> * gcc.target/riscv/amo-table-ztso-compare-exchange-6.c: Ditto.
> * gcc.target/riscv/amo-table-ztso-compare-exchange-7.c: Ditto.
> * gcc.target/riscv/amo-table-ztso-fence-1.c: Ditto.
> * gcc.target/riscv/amo-table-ztso-fence-2.c: Ditto.
> * gcc.target/riscv/amo-table-ztso-fence-3.c: Ditto.
> * gcc.target/riscv/amo-table-ztso-fence-4.c: Ditto.
> * gcc.target/riscv/amo-table-ztso-fence-5.c: Ditto.
> * gcc.target/riscv/amo-table-ztso-load-1.c: Ditto.
> * gcc.target/riscv/amo-table-ztso-load-2.c: Ditto.
> * gcc.target/riscv/amo-table-ztso-load-3.c: Ditto.
> * gcc.target/riscv/amo-table-ztso-store-1.c: Ditto.
> * gcc.target/riscv/amo-table-ztso-store-2.c: Ditto.
> * gcc.target/riscv/amo-table-ztso-store-3.c: Ditto.
> * gcc.target/riscv/amo-table-ztso-subword-amo-add-1.c: Ditto.
> * gcc.target/riscv/amo-table-ztso-subword-amo-add-2.c: Ditto.
> * gcc.target/riscv/amo-table-ztso-subword-amo-add-3.c: Ditto.
> * gcc.target/riscv/amo-table-ztso-subword-amo-add-4.c: Ditto.
> * gcc.target/riscv/amo-table-ztso-subword-amo-add-5.c: Ditto.
> * lib/target-supports.exp: Add testing infrastructure to require the
> Ztso extension or add it to an existing -march.
OK.
Jeff
^ permalink raw reply [flat|nested] 2+ messages in thread
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2023-10-31 0:47 [PATCH] RISC-V: Enable ztso tests on rv32 Patrick O'Neill
2023-10-31 13:03 ` Jeff Law
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