* [PATCH] testsuite/arm: Add mve-vsub-scalar-1.c test
@ 2021-04-30 14:06 Christophe Lyon
2021-05-10 11:21 ` Christophe Lyon
2021-05-10 11:48 ` Kyrylo Tkachov
0 siblings, 2 replies; 3+ messages in thread
From: Christophe Lyon @ 2021-04-30 14:06 UTC (permalink / raw)
To: gcc-patches
This patchs adds a test similar to mve-vsub_1.c, but operates on a
scalar as second argument. For the moment we do not select the T2 vsub
variant operating on a scalar final argument, and we use vadd of the
opposite.
2021-04-26 Christophe Lyon <christophe.lyon@linaro.org>
gcc/testsuite/
* gcc.target/arm/simd/mve-vsub-scalar-1.c: New test.
---
.../gcc.target/arm/simd/mve-vsub-scalar-1.c | 47 ++++++++++++++++++++++
1 file changed, 47 insertions(+)
create mode 100644 gcc/testsuite/gcc.target/arm/simd/mve-vsub-scalar-1.c
diff --git a/gcc/testsuite/gcc.target/arm/simd/mve-vsub-scalar-1.c b/gcc/testsuite/gcc.target/arm/simd/mve-vsub-scalar-1.c
new file mode 100644
index 0000000..61a9a0e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/simd/mve-vsub-scalar-1.c
@@ -0,0 +1,47 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
+/* { dg-add-options arm_v8_1m_mve_fp } */
+/* { dg-additional-options "-O3" } */
+
+#include <stdint.h>
+
+#define FUNC_IMM(SIGN, TYPE, BITS, NB, OP, NAME) \
+ void test_ ## NAME ##_ ## SIGN ## BITS ## x ## NB (TYPE##BITS##_t * __restrict__ dest, \
+ TYPE##BITS##_t *a) { \
+ int i; \
+ for (i=0; i<NB; i++) { \
+ dest[i] = a[i] OP 1; \
+ } \
+}
+
+/* 128-bit vectors. */
+FUNC_IMM(s, int, 32, 4, -, vsubimm)
+FUNC_IMM(u, uint, 32, 4, -, vsubimm)
+FUNC_IMM(s, int, 16, 8, -, vsubimm)
+FUNC_IMM(u, uint, 16, 8, -, vsubimm)
+FUNC_IMM(s, int, 8, 16, -, vsubimm)
+FUNC_IMM(u, uint, 8, 16, -, vsubimm)
+
+/* For the moment we do not select the T2 vsub variant operating on a scalar
+ final argument, and we use vadd of the opposite. */
+/* { dg-final { scan-assembler-times {vadd\.i32 q[0-9]+, q[0-9]+, r[0-9]+} 2 { xfail *-*-* } } } */
+/* { dg-final { scan-assembler-times {vadd\.i16 q[0-9]+, q[0-9]+, r[0-9]+} 2 { xfail *-*-* } } } */
+/* { dg-final { scan-assembler-times {vadd\.i8 q[0-9]+, q[0-9]+, r[0-9]+} 2 { xfail *-*-* } } } */
+
+void test_vsubimm_f32 (float * dest, float * a) {
+ int i;
+ for (i=0; i<4; i++) {
+ dest[i] = a[i] - 5.0;
+ }
+}
+/* { dg-final { scan-assembler-times {vadd\.f32 q[0-9]+, q[0-9]+, r[0-9]+} 1 { xfail *-*-* } } } */
+
+/* Note that dest[i] = a[i] + 5.0f16 is not vectorized. */
+void test_vsubimm_f16 (__fp16 * dest, __fp16 * a) {
+ int i;
+ __fp16 b = 5.0f16;
+ for (i=0; i<8; i++) {
+ dest[i] = a[i] - b;
+ }
+}
+/* { dg-final { scan-assembler-times {vadd\.f16 q[0-9]+, q[0-9]+, r[0-9]+} 1 { xfail *-*-* } } } */
--
2.7.4
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH] testsuite/arm: Add mve-vsub-scalar-1.c test
2021-04-30 14:06 [PATCH] testsuite/arm: Add mve-vsub-scalar-1.c test Christophe Lyon
@ 2021-05-10 11:21 ` Christophe Lyon
2021-05-10 11:48 ` Kyrylo Tkachov
1 sibling, 0 replies; 3+ messages in thread
From: Christophe Lyon @ 2021-05-10 11:21 UTC (permalink / raw)
To: gcc Patches
Ping?
On Fri, 30 Apr 2021 at 16:06, Christophe Lyon
<christophe.lyon@linaro.org> wrote:
>
> This patchs adds a test similar to mve-vsub_1.c, but operates on a
> scalar as second argument. For the moment we do not select the T2 vsub
> variant operating on a scalar final argument, and we use vadd of the
> opposite.
>
> 2021-04-26 Christophe Lyon <christophe.lyon@linaro.org>
>
> gcc/testsuite/
> * gcc.target/arm/simd/mve-vsub-scalar-1.c: New test.
> ---
> .../gcc.target/arm/simd/mve-vsub-scalar-1.c | 47 ++++++++++++++++++++++
> 1 file changed, 47 insertions(+)
> create mode 100644 gcc/testsuite/gcc.target/arm/simd/mve-vsub-scalar-1.c
>
> diff --git a/gcc/testsuite/gcc.target/arm/simd/mve-vsub-scalar-1.c b/gcc/testsuite/gcc.target/arm/simd/mve-vsub-scalar-1.c
> new file mode 100644
> index 0000000..61a9a0e
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/arm/simd/mve-vsub-scalar-1.c
> @@ -0,0 +1,47 @@
> +/* { dg-do compile } */
> +/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
> +/* { dg-add-options arm_v8_1m_mve_fp } */
> +/* { dg-additional-options "-O3" } */
> +
> +#include <stdint.h>
> +
> +#define FUNC_IMM(SIGN, TYPE, BITS, NB, OP, NAME) \
> + void test_ ## NAME ##_ ## SIGN ## BITS ## x ## NB (TYPE##BITS##_t * __restrict__ dest, \
> + TYPE##BITS##_t *a) { \
> + int i; \
> + for (i=0; i<NB; i++) { \
> + dest[i] = a[i] OP 1; \
> + } \
> +}
> +
> +/* 128-bit vectors. */
> +FUNC_IMM(s, int, 32, 4, -, vsubimm)
> +FUNC_IMM(u, uint, 32, 4, -, vsubimm)
> +FUNC_IMM(s, int, 16, 8, -, vsubimm)
> +FUNC_IMM(u, uint, 16, 8, -, vsubimm)
> +FUNC_IMM(s, int, 8, 16, -, vsubimm)
> +FUNC_IMM(u, uint, 8, 16, -, vsubimm)
> +
> +/* For the moment we do not select the T2 vsub variant operating on a scalar
> + final argument, and we use vadd of the opposite. */
> +/* { dg-final { scan-assembler-times {vadd\.i32 q[0-9]+, q[0-9]+, r[0-9]+} 2 { xfail *-*-* } } } */
> +/* { dg-final { scan-assembler-times {vadd\.i16 q[0-9]+, q[0-9]+, r[0-9]+} 2 { xfail *-*-* } } } */
> +/* { dg-final { scan-assembler-times {vadd\.i8 q[0-9]+, q[0-9]+, r[0-9]+} 2 { xfail *-*-* } } } */
> +
> +void test_vsubimm_f32 (float * dest, float * a) {
> + int i;
> + for (i=0; i<4; i++) {
> + dest[i] = a[i] - 5.0;
> + }
> +}
> +/* { dg-final { scan-assembler-times {vadd\.f32 q[0-9]+, q[0-9]+, r[0-9]+} 1 { xfail *-*-* } } } */
> +
> +/* Note that dest[i] = a[i] + 5.0f16 is not vectorized. */
> +void test_vsubimm_f16 (__fp16 * dest, __fp16 * a) {
> + int i;
> + __fp16 b = 5.0f16;
> + for (i=0; i<8; i++) {
> + dest[i] = a[i] - b;
> + }
> +}
> +/* { dg-final { scan-assembler-times {vadd\.f16 q[0-9]+, q[0-9]+, r[0-9]+} 1 { xfail *-*-* } } } */
> --
> 2.7.4
>
^ permalink raw reply [flat|nested] 3+ messages in thread
* RE: [PATCH] testsuite/arm: Add mve-vsub-scalar-1.c test
2021-04-30 14:06 [PATCH] testsuite/arm: Add mve-vsub-scalar-1.c test Christophe Lyon
2021-05-10 11:21 ` Christophe Lyon
@ 2021-05-10 11:48 ` Kyrylo Tkachov
1 sibling, 0 replies; 3+ messages in thread
From: Kyrylo Tkachov @ 2021-05-10 11:48 UTC (permalink / raw)
To: Christophe Lyon; +Cc: gcc-patches
> -----Original Message-----
> From: Gcc-patches <gcc-patches-bounces@gcc.gnu.org> On Behalf Of
> Christophe Lyon via Gcc-patches
> Sent: 30 April 2021 15:07
> To: gcc-patches@gcc.gnu.org
> Subject: [PATCH] testsuite/arm: Add mve-vsub-scalar-1.c test
>
> This patchs adds a test similar to mve-vsub_1.c, but operates on a
> scalar as second argument. For the moment we do not select the T2 vsub
> variant operating on a scalar final argument, and we use vadd of the
> opposite.
Ok.
Thanks,
Kyrill
>
> 2021-04-26 Christophe Lyon <christophe.lyon@linaro.org>
>
> gcc/testsuite/
> * gcc.target/arm/simd/mve-vsub-scalar-1.c: New test.
> ---
> .../gcc.target/arm/simd/mve-vsub-scalar-1.c | 47
> ++++++++++++++++++++++
> 1 file changed, 47 insertions(+)
> create mode 100644 gcc/testsuite/gcc.target/arm/simd/mve-vsub-scalar-
> 1.c
>
> diff --git a/gcc/testsuite/gcc.target/arm/simd/mve-vsub-scalar-1.c
> b/gcc/testsuite/gcc.target/arm/simd/mve-vsub-scalar-1.c
> new file mode 100644
> index 0000000..61a9a0e
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/arm/simd/mve-vsub-scalar-1.c
> @@ -0,0 +1,47 @@
> +/* { dg-do compile } */
> +/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
> +/* { dg-add-options arm_v8_1m_mve_fp } */
> +/* { dg-additional-options "-O3" } */
> +
> +#include <stdint.h>
> +
> +#define FUNC_IMM(SIGN, TYPE, BITS, NB, OP, NAME) \
> + void test_ ## NAME ##_ ## SIGN ## BITS ## x ## NB (TYPE##BITS##_t *
> __restrict__ dest, \
> + TYPE##BITS##_t *a) { \
> + int i; \
> + for (i=0; i<NB; i++) { \
> + dest[i] = a[i] OP 1; \
> + } \
> +}
> +
> +/* 128-bit vectors. */
> +FUNC_IMM(s, int, 32, 4, -, vsubimm)
> +FUNC_IMM(u, uint, 32, 4, -, vsubimm)
> +FUNC_IMM(s, int, 16, 8, -, vsubimm)
> +FUNC_IMM(u, uint, 16, 8, -, vsubimm)
> +FUNC_IMM(s, int, 8, 16, -, vsubimm)
> +FUNC_IMM(u, uint, 8, 16, -, vsubimm)
> +
> +/* For the moment we do not select the T2 vsub variant operating on a
> scalar
> + final argument, and we use vadd of the opposite. */
> +/* { dg-final { scan-assembler-times {vadd\.i32 q[0-9]+, q[0-9]+, r[0-9]+} 2
> { xfail *-*-* } } } */
> +/* { dg-final { scan-assembler-times {vadd\.i16 q[0-9]+, q[0-9]+, r[0-9]+} 2
> { xfail *-*-* } } } */
> +/* { dg-final { scan-assembler-times {vadd\.i8 q[0-9]+, q[0-9]+, r[0-9]+} 2
> { xfail *-*-* } } } */
> +
> +void test_vsubimm_f32 (float * dest, float * a) {
> + int i;
> + for (i=0; i<4; i++) {
> + dest[i] = a[i] - 5.0;
> + }
> +}
> +/* { dg-final { scan-assembler-times {vadd\.f32 q[0-9]+, q[0-9]+, r[0-9]+} 1
> { xfail *-*-* } } } */
> +
> +/* Note that dest[i] = a[i] + 5.0f16 is not vectorized. */
> +void test_vsubimm_f16 (__fp16 * dest, __fp16 * a) {
> + int i;
> + __fp16 b = 5.0f16;
> + for (i=0; i<8; i++) {
> + dest[i] = a[i] - b;
> + }
> +}
> +/* { dg-final { scan-assembler-times {vadd\.f16 q[0-9]+, q[0-9]+, r[0-9]+} 1
> { xfail *-*-* } } } */
> --
> 2.7.4
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2021-04-30 14:06 [PATCH] testsuite/arm: Add mve-vsub-scalar-1.c test Christophe Lyon
2021-05-10 11:21 ` Christophe Lyon
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