* [PATCH v1 0/7] Add LoongArch support.
@ 2021-11-06 8:40 Chenghua Xu
2021-11-06 8:40 ` [PATCH v1 2/7] LoongArch Port: Regenerate gcc/configure Chenghua Xu
` (7 more replies)
0 siblings, 8 replies; 17+ messages in thread
From: Chenghua Xu @ 2021-11-06 8:40 UTC (permalink / raw)
To: gcc-patches; +Cc: paul.hua.gm, xuchenghua, chenglulu
This is a series of patch sets to support LoongArch.
The LoongArch architecture (LoongArch) is an Instruction Set
Architecture (ISA) that has a Reduced Instruction Set Computer (RISC)
style.
The documents are on
https://loongson.github.io/LoongArch-Documentation/README-EN.html
The ELF ABI Documents are on:
https://loongson.github.io/LoongArch-Documentation/LoongArch-ELF-ABI-EN.html
The binutils has been merged into trunk:
https://sourceware.org/git/?p=binutils-gdb.git;a=commit;h=560b3fe208255ae909b4b1c88ba9c28b09043307
The ABI -mabi=name is still under discussion and may change in the next version,
the rest can be reviewed.
chenglulu (7):
LoongArch Port: gcc
LoongArch Port: Regenerate gcc/configure.
LoongArch Port: libgcc
LoongArch Port: Regenerate libgcc/configure.
LoongArch Port: libgomp
LoongArch Port: gcc/testsuite
LoongArch Port: Regenerate configure
config/picflag.m4 | 3 +
configure | 12 +-
configure.ac | 10 +-
.../config/loongarch/loongarch-common.c | 63 +
gcc/config.gcc | 248 +-
gcc/config/host-linux.c | 2 +
gcc/config/loongarch/constraints.md | 212 +
gcc/config/loongarch/generic.md | 132 +
gcc/config/loongarch/gnu-user.h | 86 +
gcc/config/loongarch/la464.md | 132 +
gcc/config/loongarch/larchintrin.h | 413 ++
gcc/config/loongarch/linux.h | 57 +
gcc/config/loongarch/loongarch-builtins.c | 511 ++
gcc/config/loongarch/loongarch-c.c | 137 +
gcc/config/loongarch/loongarch-cpu.c | 182 +
gcc/config/loongarch/loongarch-cpu.h | 55 +
gcc/config/loongarch/loongarch-cpucfg.h | 29 +
gcc/config/loongarch/loongarch-driver.c | 201 +
gcc/config/loongarch/loongarch-driver.h | 49 +
gcc/config/loongarch/loongarch-ftypes.def | 95 +
gcc/config/loongarch/loongarch-modes.def | 35 +
gcc/config/loongarch/loongarch-opts.c | 311 +
gcc/config/loongarch/loongarch-opts.h | 133 +
gcc/config/loongarch/loongarch-protos.h | 244 +
gcc/config/loongarch/loongarch-rtx-cost.h | 80 +
gcc/config/loongarch/loongarch.c | 6485 +++++++++++++++++
gcc/config/loongarch/loongarch.h | 1292 ++++
gcc/config/loongarch/loongarch.md | 3836 ++++++++++
gcc/config/loongarch/loongarch.opt | 206 +
gcc/config/loongarch/predicates.md | 553 ++
gcc/config/loongarch/sync.md | 614 ++
gcc/config/loongarch/t-linux | 51 +
gcc/config/loongarch/t-loongarch | 46 +
gcc/configure | 63 +-
gcc/configure.ac | 33 +-
gcc/doc/invoke.texi | 193 +
gcc/doc/md.texi | 55 +
gcc/testsuite/g++.dg/cpp0x/constexpr-rom.C | 2 +-
gcc/testsuite/g++.old-deja/g++.abi/ptrmem.C | 2 +-
gcc/testsuite/g++.old-deja/g++.pt/ptrmem6.C | 2 +-
gcc/testsuite/gcc.dg/20020312-2.c | 2 +
gcc/testsuite/gcc.dg/loop-8.c | 2 +-
.../torture/stackalign/builtin-apply-2.c | 2 +-
gcc/testsuite/gcc.dg/tree-ssa/ssa-fre-3.c | 2 +-
.../gcc.target/loongarch/loongarch.exp | 40 +
.../gcc.target/loongarch/tst-asm-const.c | 16 +
gcc/testsuite/go.test/go-test.exp | 3 +
gcc/testsuite/lib/target-supports.exp | 14 +
libgcc/config.host | 26 +
libgcc/config/loongarch/crtfastmath.c | 52 +
libgcc/config/loongarch/crti.S | 43 +
libgcc/config/loongarch/crtn.S | 39 +
libgcc/config/loongarch/lib2funcs.c | 0
libgcc/config/loongarch/linux-unwind.h | 80 +
libgcc/config/loongarch/sfp-machine.h | 152 +
libgcc/config/loongarch/t-crtstuff | 2 +
libgcc/config/loongarch/t-elf | 3 +
libgcc/config/loongarch/t-loongarch | 9 +
libgcc/config/loongarch/t-loongarch64 | 1 +
libgcc/config/loongarch/t-softfp-tf | 3 +
libgcc/configure | 2 +-
libgcc/configure.ac | 2 +-
libgomp/configure.tgt | 4 +
63 files changed, 17343 insertions(+), 21 deletions(-)
create mode 100644 gcc/common/config/loongarch/loongarch-common.c
create mode 100644 gcc/config/loongarch/constraints.md
create mode 100644 gcc/config/loongarch/generic.md
create mode 100644 gcc/config/loongarch/gnu-user.h
create mode 100644 gcc/config/loongarch/la464.md
create mode 100644 gcc/config/loongarch/larchintrin.h
create mode 100644 gcc/config/loongarch/linux.h
create mode 100644 gcc/config/loongarch/loongarch-builtins.c
create mode 100644 gcc/config/loongarch/loongarch-c.c
create mode 100644 gcc/config/loongarch/loongarch-cpu.c
create mode 100644 gcc/config/loongarch/loongarch-cpu.h
create mode 100644 gcc/config/loongarch/loongarch-cpucfg.h
create mode 100644 gcc/config/loongarch/loongarch-driver.c
create mode 100644 gcc/config/loongarch/loongarch-driver.h
create mode 100644 gcc/config/loongarch/loongarch-ftypes.def
create mode 100644 gcc/config/loongarch/loongarch-modes.def
create mode 100644 gcc/config/loongarch/loongarch-opts.c
create mode 100644 gcc/config/loongarch/loongarch-opts.h
create mode 100644 gcc/config/loongarch/loongarch-protos.h
create mode 100644 gcc/config/loongarch/loongarch-rtx-cost.h
create mode 100644 gcc/config/loongarch/loongarch.c
create mode 100644 gcc/config/loongarch/loongarch.h
create mode 100644 gcc/config/loongarch/loongarch.md
create mode 100644 gcc/config/loongarch/loongarch.opt
create mode 100644 gcc/config/loongarch/predicates.md
create mode 100644 gcc/config/loongarch/sync.md
create mode 100644 gcc/config/loongarch/t-linux
create mode 100644 gcc/config/loongarch/t-loongarch
create mode 100644 gcc/testsuite/gcc.target/loongarch/loongarch.exp
create mode 100644 gcc/testsuite/gcc.target/loongarch/tst-asm-const.c
create mode 100644 libgcc/config/loongarch/crtfastmath.c
create mode 100644 libgcc/config/loongarch/crti.S
create mode 100644 libgcc/config/loongarch/crtn.S
create mode 100644 libgcc/config/loongarch/lib2funcs.c
create mode 100644 libgcc/config/loongarch/linux-unwind.h
create mode 100644 libgcc/config/loongarch/sfp-machine.h
create mode 100644 libgcc/config/loongarch/t-crtstuff
create mode 100644 libgcc/config/loongarch/t-elf
create mode 100644 libgcc/config/loongarch/t-loongarch
create mode 100644 libgcc/config/loongarch/t-loongarch64
create mode 100644 libgcc/config/loongarch/t-softfp-tf
--
2.27.0
^ permalink raw reply [flat|nested] 17+ messages in thread
* [PATCH v1 2/7] LoongArch Port: Regenerate gcc/configure.
2021-11-06 8:40 [PATCH v1 0/7] Add LoongArch support Chenghua Xu
@ 2021-11-06 8:40 ` Chenghua Xu
2021-11-06 8:40 ` [PATCH v1 3/7] LoongArch Port: libgcc Chenghua Xu
` (6 subsequent siblings)
7 siblings, 0 replies; 17+ messages in thread
From: Chenghua Xu @ 2021-11-06 8:40 UTC (permalink / raw)
To: gcc-patches; +Cc: paul.hua.gm, xuchenghua, chenglulu
From: chenglulu <chenglulu@loongson.cn>
---
gcc/configure | 63 ++++++++++++++++++++++++++++++++++++++++++++++-----
1 file changed, 57 insertions(+), 6 deletions(-)
diff --git a/gcc/configure b/gcc/configure
index 920868bcd33..5044fc27e42 100755
--- a/gcc/configure
+++ b/gcc/configure
@@ -7759,6 +7759,9 @@ else
mips*-*-*)
enable_fixed_point=yes
;;
+ loongarch*-*-*)
+ enable_fixed_point=yes
+ ;;
*)
{ $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: fixed-point is not supported for this target, ignored" >&5
$as_echo "$as_me: WARNING: fixed-point is not supported for this target, ignored" >&2;}
@@ -19455,7 +19458,7 @@ else
lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
lt_status=$lt_dlunknown
cat > conftest.$ac_ext <<_LT_EOF
-#line 19458 "configure"
+#line 19461 "configure"
#include "confdefs.h"
#if HAVE_DLFCN_H
@@ -19561,7 +19564,7 @@ else
lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
lt_status=$lt_dlunknown
cat > conftest.$ac_ext <<_LT_EOF
-#line 19564 "configure"
+#line 19567 "configure"
#include "confdefs.h"
#if HAVE_DLFCN_H
@@ -25326,6 +25329,17 @@ foo: data8 25
movl r24 = @tprel(foo#)'
tls_as_opt=--fatal-warnings
;;
+ loongarch*-*-*)
+ conftest_s='
+ .section .tdata,"awT",@progbits
+x: .word 2
+ .text
+ la.tls.gd $a0,x
+ bl __tls_get_addr'
+ tls_first_major=0
+ tls_first_minor=0
+ tls_as_opt='--fatal-warnings'
+ ;;
microblaze*-*-*)
conftest_s='
.section .tdata,"awT",@progbits
@@ -28548,6 +28562,43 @@ $as_echo "#define HAVE_AS_MARCH_ZIFENCEI 1" >>confdefs.h
fi
;;
+ loongarch*-*-*)
+ { $as_echo "$as_me:${as_lineno-$LINENO}: checking assembler for .dtprelword support" >&5
+$as_echo_n "checking assembler for .dtprelword support... " >&6; }
+if ${gcc_cv_as_loongarch_dtprelword+:} false; then :
+ $as_echo_n "(cached) " >&6
+else
+ gcc_cv_as_loongarch_dtprelword=no
+ if test x$gcc_cv_as != x; then
+ $as_echo '' > conftest.s
+ if { ac_try='$gcc_cv_as $gcc_cv_as_flags 2,18,0 -o conftest.o conftest.s >&5'
+ { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_try\""; } >&5
+ (eval $ac_try) 2>&5
+ ac_status=$?
+ $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5
+ test $ac_status = 0; }; }
+ then
+ .section .tdata,"awT",@progbits
+x:
+ .word 2
+ .text
+ .dtprelword x+0x8000
+ else
+ echo "configure: failed program was" >&5
+ cat conftest.s >&5
+ fi
+ rm -f conftest.o conftest.s
+ fi
+fi
+{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $gcc_cv_as_loongarch_dtprelword" >&5
+$as_echo "$gcc_cv_as_loongarch_dtprelword" >&6; }
+
+if test $gcc_cv_as_loongarch_dtprelword != yes; then
+
+$as_echo "#define HAVE_AS_DTPRELWORD 1" >>confdefs.h
+
+fi
+ ;;
s390*-*-*)
{ $as_echo "$as_me:${as_lineno-$LINENO}: checking assembler for .gnu_attribute support" >&5
$as_echo_n "checking assembler for .gnu_attribute support... " >&6; }
@@ -28711,11 +28762,11 @@ fi
;;
esac
-# Mips and HP-UX need the GNU assembler.
+# Mips, LoongArch and HP-UX need the GNU assembler.
# Linux on IA64 might be able to use the Intel assembler.
case "$target" in
- mips*-*-* | *-*-hpux* )
+ mips*-*-* | loongarch*-*-* | *-*-hpux* )
if test x$gas_flag = xyes \
|| test x"$host" != x"$build" \
|| test ! -x "$gcc_cv_as" \
@@ -29152,8 +29203,8 @@ esac
# ??? Once 2.11 is released, probably need to add first known working
# version to the per-target configury.
case "$cpu_type" in
- aarch64 | alpha | arc | arm | avr | bfin | cris | csky | i386 | m32c | m68k \
- | microblaze | mips | nds32 | nios2 | pa | riscv | rs6000 | score | sparc \
+ aarch64 | alpha | arc | arm | avr | bfin | cris | csky | i386 | loongarch | m32c \
+ | m68k | microblaze | mips | nds32 | nios2 | pa | riscv | rs6000 | score | sparc \
| tilegx | tilepro | visium | xstormy16 | xtensa)
insn="nop"
;;
--
2.27.0
^ permalink raw reply [flat|nested] 17+ messages in thread
* [PATCH v1 3/7] LoongArch Port: libgcc
2021-11-06 8:40 [PATCH v1 0/7] Add LoongArch support Chenghua Xu
2021-11-06 8:40 ` [PATCH v1 2/7] LoongArch Port: Regenerate gcc/configure Chenghua Xu
@ 2021-11-06 8:40 ` Chenghua Xu
2021-11-06 9:46 ` Xi Ruoyao
2021-11-06 8:40 ` [PATCH v1 4/7] LoongArch Port: Regenerate libgcc/configure Chenghua Xu
` (5 subsequent siblings)
7 siblings, 1 reply; 17+ messages in thread
From: Chenghua Xu @ 2021-11-06 8:40 UTC (permalink / raw)
To: gcc-patches; +Cc: paul.hua.gm, xuchenghua, chenglulu
From: chenglulu <chenglulu@loongson.cn>
libgcc/
* config/loongarch/crtfastmath.c: New file.
* config/loongarch/crti.S: Like wise.
* config/loongarch/crtn.S: Like wise.
* config/loongarch/lib2funcs.c: Like wise.
* config/loongarch/linux-unwind.h: Like wise.
* config/loongarch/sfp-machine.h: Like wise.
* config/loongarch/t-crtstuff: Like wise.
* config/loongarch/t-elf: Like wise.
* config/loongarch/t-loongarch: Like wise.
* config/loongarch/t-loongarch64: Like wise.
* config/loongarch/t-softfp-tf: Like wise.
* config.host: Add LoongArch tuples.
* configure.ac: Add LoongArch support.
---
libgcc/config.host | 26 +++++
libgcc/config/loongarch/crtfastmath.c | 52 +++++++++
libgcc/config/loongarch/crti.S | 43 +++++++
libgcc/config/loongarch/crtn.S | 39 +++++++
libgcc/config/loongarch/lib2funcs.c | 0
libgcc/config/loongarch/linux-unwind.h | 80 +++++++++++++
libgcc/config/loongarch/sfp-machine.h | 152 +++++++++++++++++++++++++
libgcc/config/loongarch/t-crtstuff | 2 +
libgcc/config/loongarch/t-elf | 3 +
libgcc/config/loongarch/t-loongarch | 9 ++
libgcc/config/loongarch/t-loongarch64 | 1 +
libgcc/config/loongarch/t-softfp-tf | 3 +
libgcc/configure.ac | 2 +-
13 files changed, 411 insertions(+), 1 deletion(-)
create mode 100644 libgcc/config/loongarch/crtfastmath.c
create mode 100644 libgcc/config/loongarch/crti.S
create mode 100644 libgcc/config/loongarch/crtn.S
create mode 100644 libgcc/config/loongarch/lib2funcs.c
create mode 100644 libgcc/config/loongarch/linux-unwind.h
create mode 100644 libgcc/config/loongarch/sfp-machine.h
create mode 100644 libgcc/config/loongarch/t-crtstuff
create mode 100644 libgcc/config/loongarch/t-elf
create mode 100644 libgcc/config/loongarch/t-loongarch
create mode 100644 libgcc/config/loongarch/t-loongarch64
create mode 100644 libgcc/config/loongarch/t-softfp-tf
diff --git a/libgcc/config.host b/libgcc/config.host
index 168535b1780..11b0af6f409 100644
--- a/libgcc/config.host
+++ b/libgcc/config.host
@@ -138,6 +138,22 @@ hppa*-*-*)
lm32*-*-*)
cpu_type=lm32
;;
+loongarch*-*-*)
+ cpu_type=loongarch
+ tmake_file="loongarch/t-loongarch"
+ if test "${libgcc_cv_loongarch_hard_float}" = yes; then
+ tmake_file="${tmake_file} t-hardfp-sfdf t-hardfp"
+ else
+ tmake_file="${tmake_file} t-softfp-sfdf"
+ fi
+ if test "${ac_cv_sizeof_long_double}" = 16; then
+ tmake_file="${tmake_file} loongarch/t-softfp-tf"
+ fi
+ if test "${host_address}" = 64; then
+ tmake_file="${tmake_file} loongarch/t-loongarch64"
+ fi
+ tmake_file="${tmake_file} t-softfp"
+ ;;
m32r*-*-*)
cpu_type=m32r
;;
@@ -922,6 +938,16 @@ lm32-*-uclinux*)
extra_parts="$extra_parts crtbegin.o crtendS.o crtbeginT.o"
tmake_file="lm32/t-lm32 lm32/t-uclinux t-libgcc-pic t-softfp-sfdf t-softfp"
;;
+loongarch*-*-linux*)
+ extra_parts="$extra_parts crtfastmath.o"
+ tmake_file="${tmake_file} t-crtfm"
+ case ${host} in
+ *)
+ tmake_file="${tmake_file} t-slibgcc-libgcc"
+ ;;
+ esac
+ md_unwind_header=loongarch/linux-unwind.h
+ ;;
m32r-*-elf*)
tmake_file="$tmake_file m32r/t-m32r t-fdpbit"
extra_parts="$extra_parts crtinit.o crtfini.o"
diff --git a/libgcc/config/loongarch/crtfastmath.c b/libgcc/config/loongarch/crtfastmath.c
new file mode 100644
index 00000000000..8f3ec599cbc
--- /dev/null
+++ b/libgcc/config/loongarch/crtfastmath.c
@@ -0,0 +1,52 @@
+/* Copyright (C) 2021 Free Software Foundation, Inc.
+ Contributed by Loongson Ltd.
+ Based on MIPS target for GNU compiler.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it
+under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 3, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT
+ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
+License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License
+and a copy of the GCC Runtime Library Exception along with this
+program; see the files COPYING3 and COPYING.RUNTIME respectively.
+If not, see <http://www.gnu.org/licenses/>. */
+
+#ifdef __loongarch_hard_float
+
+/* Rounding control. */
+#define _FPU_RC_NEAREST 0x000 /* RECOMMENDED. */
+#define _FPU_RC_ZERO 0x100
+#define _FPU_RC_UP 0x200
+#define _FPU_RC_DOWN 0x300
+
+/* Enable interrupts for IEEE exceptions. */
+#define _FPU_IEEE 0x0000001F
+
+/* Macros for accessing the hardware control word. */
+#define _FPU_GETCW(cw) __asm__ ("movgr2fcsr %0,$r1" : "=r" (cw))
+#define _FPU_SETCW(cw) __asm__ ("movfcsr2gr %0,$r1" : : "r" (cw))
+
+static void __attribute__((constructor))
+set_fast_math (void)
+{
+ unsigned int fcr;
+
+ /* Flush to zero, round to nearest, IEEE exceptions disabled. */
+ fcr = _FPU_RC_NEAREST;
+
+ _FPU_SETCW (fcr);
+}
+
+#endif /* __loongarch_hard_float */
diff --git a/libgcc/config/loongarch/crti.S b/libgcc/config/loongarch/crti.S
new file mode 100644
index 00000000000..bac029874b5
--- /dev/null
+++ b/libgcc/config/loongarch/crti.S
@@ -0,0 +1,43 @@
+/* Copyright (C) 2021 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+<http://www.gnu.org/licenses/>. */
+
+/* 4 slots for argument spill area. 1 for cpreturn, 1 for stack.
+ Return spill offset of 8. Aligned to 16 bytes for lp64. */
+
+ .section .init,"ax",@progbits
+ .globl _init
+ .type _init,@function
+_init:
+ addi.d $r3,$r3,-16
+ st.d $r1,$r3,8
+ addi.d $r3,$r3,16
+ jirl $r0,$r1,0
+
+ .section .fini,"ax",@progbits
+ .globl _fini
+ .type _fini,@function
+_fini:
+ addi.d $r3,$r3,-16
+ st.d $r1,$r3,8
+ addi.d $r3,$r3,16
+ jirl $r0,$r1,0
diff --git a/libgcc/config/loongarch/crtn.S b/libgcc/config/loongarch/crtn.S
new file mode 100644
index 00000000000..7af6728690f
--- /dev/null
+++ b/libgcc/config/loongarch/crtn.S
@@ -0,0 +1,39 @@
+/* Copyright (C) 2021 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+<http://www.gnu.org/licenses/>. */
+
+/* 4 slots for argument spill area. 1 for cpreturn, 1 for stack.
+ Return spill offset of 8. Aligned to 16 bytes for lp64. */
+
+
+ .section .init,"ax",@progbits
+init:
+ ld.d $r1,$r3,8
+ addi.d $r3,$r3,16
+ jirl $r0,$r1,0
+
+ .section .fini,"ax",@progbits
+fini:
+ ld.d $r1,$r3,8
+ addi.d $r3,$r3,16
+ jirl $r0,$r1,0
+
diff --git a/libgcc/config/loongarch/lib2funcs.c b/libgcc/config/loongarch/lib2funcs.c
new file mode 100644
index 00000000000..e69de29bb2d
diff --git a/libgcc/config/loongarch/linux-unwind.h b/libgcc/config/loongarch/linux-unwind.h
new file mode 100644
index 00000000000..8c9dfa56a6d
--- /dev/null
+++ b/libgcc/config/loongarch/linux-unwind.h
@@ -0,0 +1,80 @@
+/* DWARF2 EH unwinding support for LoongArch Linux.
+ Copyright (C) 2021 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 3, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+<http://www.gnu.org/licenses/>. */
+
+#ifndef inhibit_libc
+/* Do code reading to identify a signal frame, and set the frame
+ state data appropriately. See unwind-dw2.c for the structs. */
+
+#include <signal.h>
+#include <sys/syscall.h>
+#include <sys/ucontext.h>
+
+#define MD_FALLBACK_FRAME_STATE_FOR loongarch_fallback_frame_state
+
+static _Unwind_Reason_Code
+loongarch_fallback_frame_state (struct _Unwind_Context *context,
+ _Unwind_FrameState *fs)
+{
+ u_int32_t *pc = (u_int32_t *) context->ra;
+ struct sigcontext *sc;
+ _Unwind_Ptr new_cfa;
+ int i;
+
+ /* 03822c0b dli a7, 0x8b (sigreturn) */
+ /* 002b0000 syscall 0 */
+ if (pc[1] != 0x002b0000)
+ return _URC_END_OF_STACK;
+ if (pc[0] == 0x03822c0b)
+ {
+ struct rt_sigframe
+ {
+ siginfo_t info;
+ ucontext_t uc;
+ } *rt_ = context->cfa;
+ sc = &rt_->uc.uc_mcontext;
+ }
+ else
+ return _URC_END_OF_STACK;
+
+ new_cfa = (_Unwind_Ptr) sc;
+ fs->regs.cfa_how = CFA_REG_OFFSET;
+ fs->regs.cfa_reg = __LIBGCC_STACK_POINTER_REGNUM__;
+ fs->regs.cfa_offset = new_cfa - (_Unwind_Ptr) context->cfa;
+
+ for (i = 0; i < 32; i++)
+ {
+ fs->regs.reg[i].how = REG_SAVED_OFFSET;
+ fs->regs.reg[i].loc.offset = (_Unwind_Ptr) & (sc->sc_regs[i]) - new_cfa;
+ }
+
+ fs->signal_frame = 1;
+ fs->regs.reg[__LIBGCC_DWARF_ALT_FRAME_RETURN_COLUMN__].how
+ = REG_SAVED_VAL_OFFSET;
+ fs->regs.reg[__LIBGCC_DWARF_ALT_FRAME_RETURN_COLUMN__].loc.offset
+ = (_Unwind_Ptr) (sc->sc_pc) - new_cfa;
+ fs->retaddr_column = __LIBGCC_DWARF_ALT_FRAME_RETURN_COLUMN__;
+
+ return _URC_NO_REASON;
+}
+#endif
diff --git a/libgcc/config/loongarch/sfp-machine.h b/libgcc/config/loongarch/sfp-machine.h
new file mode 100644
index 00000000000..cb5b04feede
--- /dev/null
+++ b/libgcc/config/loongarch/sfp-machine.h
@@ -0,0 +1,152 @@
+/* softfp machine description for LoongArch.
+ Copyright (C) 2021 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+<http://www.gnu.org/licenses/>. */
+
+#ifdef __loongarch64
+#define _FP_W_TYPE_SIZE 64
+#define _FP_W_TYPE unsigned long long
+#define _FP_WS_TYPE signed long long
+#define _FP_I_TYPE long long
+
+typedef int TItype __attribute__ ((mode (TI)));
+typedef unsigned int UTItype __attribute__ ((mode (TI)));
+#define TI_BITS (__CHAR_BIT__ * (int) sizeof (TItype))
+
+#define _FP_MUL_MEAT_S(R, X, Y) \
+ _FP_MUL_MEAT_1_wide (_FP_WFRACBITS_S, R, X, Y, umul_ppmm)
+#define _FP_MUL_MEAT_D(R, X, Y) \
+ _FP_MUL_MEAT_1_wide (_FP_WFRACBITS_D, R, X, Y, umul_ppmm)
+#define _FP_MUL_MEAT_Q(R, X, Y) \
+ _FP_MUL_MEAT_2_wide (_FP_WFRACBITS_Q, R, X, Y, umul_ppmm)
+
+#define _FP_DIV_MEAT_S(R, X, Y) _FP_DIV_MEAT_1_udiv_norm (S, R, X, Y)
+#define _FP_DIV_MEAT_D(R, X, Y) _FP_DIV_MEAT_1_udiv_norm (D, R, X, Y)
+#define _FP_DIV_MEAT_Q(R, X, Y) _FP_DIV_MEAT_2_udiv (Q, R, X, Y)
+
+#define _FP_NANFRAC_S ((_FP_QNANBIT_S << 1) - 1)
+#define _FP_NANFRAC_D ((_FP_QNANBIT_D << 1) - 1)
+#define _FP_NANFRAC_Q ((_FP_QNANBIT_Q << 1) - 1), -1
+#else
+#define _FP_W_TYPE_SIZE 32
+#define _FP_W_TYPE unsigned int
+#define _FP_WS_TYPE signed int
+#define _FP_I_TYPE int
+
+#define _FP_MUL_MEAT_S(R, X, Y) \
+ _FP_MUL_MEAT_1_wide (_FP_WFRACBITS_S, R, X, Y, umul_ppmm)
+#define _FP_MUL_MEAT_D(R, X, Y) \
+ _FP_MUL_MEAT_2_wide (_FP_WFRACBITS_D, R, X, Y, umul_ppmm)
+#define _FP_MUL_MEAT_Q(R, X, Y) \
+ _FP_MUL_MEAT_4_wide (_FP_WFRACBITS_Q, R, X, Y, umul_ppmm)
+
+#define _FP_DIV_MEAT_S(R, X, Y) _FP_DIV_MEAT_1_udiv_norm (S, R, X, Y)
+#define _FP_DIV_MEAT_D(R, X, Y) _FP_DIV_MEAT_2_udiv (D, R, X, Y)
+#define _FP_DIV_MEAT_Q(R, X, Y) _FP_DIV_MEAT_4_udiv (Q, R, X, Y)
+
+#define _FP_NANFRAC_S ((_FP_QNANBIT_S << 1) - 1)
+#define _FP_NANFRAC_D ((_FP_QNANBIT_D << 1) - 1), -1
+#define _FP_NANFRAC_Q ((_FP_QNANBIT_Q << 1) - 1), -1, -1, -1
+#endif
+
+/* The type of the result of a floating point comparison. This must
+ match __libgcc_cmp_return__ in GCC for the target. */
+typedef int __gcc_CMPtype __attribute__ ((mode (__libgcc_cmp_return__)));
+#define CMPtype __gcc_CMPtype
+
+#define _FP_NANSIGN_S 0
+#define _FP_NANSIGN_D 0
+#define _FP_NANSIGN_Q 0
+
+#define _FP_KEEPNANFRACP 1
+#define _FP_QNANNEGATEDP 0
+
+/* NaN payloads should be preserved for NAN2008. */
+#define _FP_CHOOSENAN(fs, wc, R, X, Y, OP) \
+ do \
+ { \
+ R##_s = X##_s; \
+ _FP_FRAC_COPY_##wc (R, X); \
+ R##_c = FP_CLS_NAN; \
+ } \
+ while (0)
+
+#ifdef __loongarch_hard_float
+#define FP_EX_INVALID 0x100000
+#define FP_EX_DIVZERO 0x080000
+#define FP_EX_OVERFLOW 0x040000
+#define FP_EX_UNDERFLOW 0x020000
+#define FP_EX_INEXACT 0x010000
+#define FP_EX_ALL \
+ (FP_EX_INVALID | FP_EX_DIVZERO | FP_EX_OVERFLOW | FP_EX_UNDERFLOW \
+ | FP_EX_INEXACT)
+
+#define FP_EX_ENABLE_SHIFT 16
+#define FP_EX_CAUSE_SHIFT 8
+
+#define FP_RND_NEAREST 0x000
+#define FP_RND_ZERO 0x100
+#define FP_RND_PINF 0x200
+#define FP_RND_MINF 0x300
+#define FP_RND_MASK 0x300
+
+#define _FP_DECL_EX \
+ unsigned long int _fcsr __attribute__ ((unused)) = FP_RND_NEAREST
+
+#define FP_INIT_ROUNDMODE \
+ do \
+ { \
+ _fcsr = __builtin_loongarch_movfcsr2gr (0); \
+ } \
+ while (0)
+
+#define FP_ROUNDMODE (_fcsr & FP_RND_MASK)
+
+#define FP_TRAPPING_EXCEPTIONS ((_fcsr << FP_EX_ENABLE_SHIFT) & FP_EX_ALL)
+
+#define FP_HANDLE_EXCEPTIONS \
+ do \
+ { \
+ _fcsr &= ~(FP_EX_ALL << FP_EX_CAUSE_SHIFT); \
+ _fcsr |= _fex | (_fex << FP_EX_CAUSE_SHIFT); \
+ __builtin_loongarch_movgr2fcsr (0, _fcsr); \
+ } \
+ while (0)
+
+#else
+#define FP_EX_INVALID (1 << 4)
+#define FP_EX_DIVZERO (1 << 3)
+#define FP_EX_OVERFLOW (1 << 2)
+#define FP_EX_UNDERFLOW (1 << 1)
+#define FP_EX_INEXACT (1 << 0)
+#endif
+
+#define _FP_TININESS_AFTER_ROUNDING 1
+
+#define __LITTLE_ENDIAN 1234
+
+#define __BYTE_ORDER __LITTLE_ENDIAN
+
+/* Define ALIASNAME as a strong alias for NAME. */
+#define strong_alias(name, aliasname) _strong_alias (name, aliasname)
+#define _strong_alias(name, aliasname) \
+ extern __typeof (name) aliasname __attribute__ ((alias (#name)));
diff --git a/libgcc/config/loongarch/t-crtstuff b/libgcc/config/loongarch/t-crtstuff
new file mode 100644
index 00000000000..d8ab43be2ae
--- /dev/null
+++ b/libgcc/config/loongarch/t-crtstuff
@@ -0,0 +1,2 @@
+# Don't let CTOR_LIST end up in sdata section.
+CRTSTUFF_T_CFLAGS = -G 0
diff --git a/libgcc/config/loongarch/t-elf b/libgcc/config/loongarch/t-elf
new file mode 100644
index 00000000000..651f10a5303
--- /dev/null
+++ b/libgcc/config/loongarch/t-elf
@@ -0,0 +1,3 @@
+# We must build libgcc2.a with -G 0, in case the user wants to link
+# without the $gp register.
+HOST_LIBGCC2_CFLAGS += -G 0
diff --git a/libgcc/config/loongarch/t-loongarch b/libgcc/config/loongarch/t-loongarch
new file mode 100644
index 00000000000..9508cb2fcae
--- /dev/null
+++ b/libgcc/config/loongarch/t-loongarch
@@ -0,0 +1,9 @@
+LIB2_SIDITI_CONV_FUNCS = yes
+
+softfp_float_modes :=
+softfp_int_modes := si di
+softfp_extensions :=
+softfp_truncations :=
+softfp_exclude_libgcc2 := n
+
+LIB2ADD_ST += $(srcdir)/config/loongarch/lib2funcs.c
diff --git a/libgcc/config/loongarch/t-loongarch64 b/libgcc/config/loongarch/t-loongarch64
new file mode 100644
index 00000000000..a1e3513e288
--- /dev/null
+++ b/libgcc/config/loongarch/t-loongarch64
@@ -0,0 +1 @@
+softfp_int_modes += ti
diff --git a/libgcc/config/loongarch/t-softfp-tf b/libgcc/config/loongarch/t-softfp-tf
new file mode 100644
index 00000000000..306677b1255
--- /dev/null
+++ b/libgcc/config/loongarch/t-softfp-tf
@@ -0,0 +1,3 @@
+softfp_float_modes += tf
+softfp_extensions += sftf dftf
+softfp_truncations += tfsf tfdf
diff --git a/libgcc/configure.ac b/libgcc/configure.ac
index 13a80b2551b..b17d788dbd0 100644
--- a/libgcc/configure.ac
+++ b/libgcc/configure.ac
@@ -317,7 +317,7 @@ AC_CACHE_CHECK([whether assembler supports CFI directives], [libgcc_cv_cfi],
# word size rather than the address size.
cat > conftest.c <<EOF
#if defined(__x86_64__) || (!defined(__i386__) && defined(__LP64__)) \
- || defined(__mips64)
+ || defined(__mips64) || defined(__loongarch64)
host_address=64
#else
host_address=32
--
2.27.0
^ permalink raw reply [flat|nested] 17+ messages in thread
* [PATCH v1 4/7] LoongArch Port: Regenerate libgcc/configure.
2021-11-06 8:40 [PATCH v1 0/7] Add LoongArch support Chenghua Xu
2021-11-06 8:40 ` [PATCH v1 2/7] LoongArch Port: Regenerate gcc/configure Chenghua Xu
2021-11-06 8:40 ` [PATCH v1 3/7] LoongArch Port: libgcc Chenghua Xu
@ 2021-11-06 8:40 ` Chenghua Xu
2021-11-06 8:40 ` [PATCH v1 5/7] LoongArch Port: libgomp Chenghua Xu
` (4 subsequent siblings)
7 siblings, 0 replies; 17+ messages in thread
From: Chenghua Xu @ 2021-11-06 8:40 UTC (permalink / raw)
To: gcc-patches; +Cc: paul.hua.gm, xuchenghua, chenglulu
From: chenglulu <chenglulu@loongson.cn>
---
libgcc/configure | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/libgcc/configure b/libgcc/configure
index 4919a56f518..150ea04cb3d 100755
--- a/libgcc/configure
+++ b/libgcc/configure
@@ -5066,7 +5066,7 @@ $as_echo "$libgcc_cv_cfi" >&6; }
# word size rather than the address size.
cat > conftest.c <<EOF
#if defined(__x86_64__) || (!defined(__i386__) && defined(__LP64__)) \
- || defined(__mips64)
+ || defined(__mips64) || defined(__loongarch64)
host_address=64
#else
host_address=32
--
2.27.0
^ permalink raw reply [flat|nested] 17+ messages in thread
* [PATCH v1 5/7] LoongArch Port: libgomp
2021-11-06 8:40 [PATCH v1 0/7] Add LoongArch support Chenghua Xu
` (2 preceding siblings ...)
2021-11-06 8:40 ` [PATCH v1 4/7] LoongArch Port: Regenerate libgcc/configure Chenghua Xu
@ 2021-11-06 8:40 ` Chenghua Xu
2021-11-06 9:58 ` Xi Ruoyao
2021-11-06 8:40 ` [PATCH v1 6/7] LoongArch Port: gcc/testsuite Chenghua Xu
` (3 subsequent siblings)
7 siblings, 1 reply; 17+ messages in thread
From: Chenghua Xu @ 2021-11-06 8:40 UTC (permalink / raw)
To: gcc-patches; +Cc: paul.hua.gm, xuchenghua, chenglulu
From: chenglulu <chenglulu@loongson.cn>
libgomp/
* configure.tgt: Add LoongArch tuple.
---
libgomp/configure.tgt | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/libgomp/configure.tgt b/libgomp/configure.tgt
index d4f1e741b5a..2cd7272fcd8 100644
--- a/libgomp/configure.tgt
+++ b/libgomp/configure.tgt
@@ -56,6 +56,10 @@ if test x$enable_linux_futex = xyes; then
config_path="linux/ia64 linux posix"
;;
+ loongarch*-*-linux*)
+ config_path="linux posix"
+ ;;
+
mips*-*-linux*)
config_path="linux/mips linux posix"
;;
--
2.27.0
^ permalink raw reply [flat|nested] 17+ messages in thread
* [PATCH v1 6/7] LoongArch Port: gcc/testsuite
2021-11-06 8:40 [PATCH v1 0/7] Add LoongArch support Chenghua Xu
` (3 preceding siblings ...)
2021-11-06 8:40 ` [PATCH v1 5/7] LoongArch Port: libgomp Chenghua Xu
@ 2021-11-06 8:40 ` Chenghua Xu
2021-11-06 9:51 ` Xi Ruoyao
2021-11-06 8:40 ` [PATCH v1 7/7] LoongArch Port: Regenerate configure Chenghua Xu
` (2 subsequent siblings)
7 siblings, 1 reply; 17+ messages in thread
From: Chenghua Xu @ 2021-11-06 8:40 UTC (permalink / raw)
To: gcc-patches; +Cc: paul.hua.gm, xuchenghua, chenglulu
From: chenglulu <chenglulu@loongson.cn>
gcc/testsuite/
* g++.dg/cpp0x/constexpr-rom.C: Add build options for LoongArch.
* g++.old-deja/g++.abi/ptrmem.C: Add LoongArch support.
* g++.old-deja/g++.pt/ptrmem6.C: xfail for LoongArch.
* gcc.dg/20020312-2.c: Add LoongArch support.
* gcc.dg/loop-8.c: Skip on LoongArch.
* gcc.dg/torture/stackalign/builtin-apply-2.c: Likewise.
* gcc.dg/tree-ssa/ssa-fre-3.c: Likewise.
* go.test/go-test.exp: Define the LoongArch target.
* lib/target-supports.exp: Like wise.
* gcc.target/loongarch/loongarch.exp: New file.
* gcc.target/loongarch/tst-asm-const.c: Like wise.
---
gcc/testsuite/g++.dg/cpp0x/constexpr-rom.C | 2 +-
gcc/testsuite/g++.old-deja/g++.abi/ptrmem.C | 2 +-
gcc/testsuite/g++.old-deja/g++.pt/ptrmem6.C | 2 +-
gcc/testsuite/gcc.dg/20020312-2.c | 2 +
gcc/testsuite/gcc.dg/loop-8.c | 2 +-
.../torture/stackalign/builtin-apply-2.c | 2 +-
gcc/testsuite/gcc.dg/tree-ssa/ssa-fre-3.c | 2 +-
.../gcc.target/loongarch/loongarch.exp | 40 +++++++++++++++++++
.../gcc.target/loongarch/tst-asm-const.c | 16 ++++++++
gcc/testsuite/go.test/go-test.exp | 3 ++
gcc/testsuite/lib/target-supports.exp | 14 +++++++
11 files changed, 81 insertions(+), 6 deletions(-)
create mode 100644 gcc/testsuite/gcc.target/loongarch/loongarch.exp
create mode 100644 gcc/testsuite/gcc.target/loongarch/tst-asm-const.c
diff --git a/gcc/testsuite/g++.dg/cpp0x/constexpr-rom.C b/gcc/testsuite/g++.dg/cpp0x/constexpr-rom.C
index 2e0ef685f36..424979a604b 100644
--- a/gcc/testsuite/g++.dg/cpp0x/constexpr-rom.C
+++ b/gcc/testsuite/g++.dg/cpp0x/constexpr-rom.C
@@ -1,6 +1,6 @@
// PR c++/49673: check that test_data goes into .rodata
// { dg-do compile { target c++11 } }
-// { dg-additional-options -G0 { target { { alpha*-*-* frv*-*-* ia64-*-* lm32*-*-* m32r*-*-* microblaze*-*-* mips*-*-* nios2-*-* powerpc*-*-* rs6000*-*-* } && { ! { *-*-darwin* *-*-aix* alpha*-*-*vms* } } } } }
+// { dg-additional-options -G0 { target { { alpha*-*-* frv*-*-* ia64-*-* lm32*-*-* m32r*-*-* microblaze*-*-* mips*-*-* loongarch*-*-* nios2-*-* powerpc*-*-* rs6000*-*-* } && { ! { *-*-darwin* *-*-aix* alpha*-*-*vms* } } } } }
// { dg-final { scan-assembler "\\.rdata" { target mips*-*-* } } }
// { dg-final { scan-assembler "rodata" { target { { *-*-linux-gnu *-*-gnu* *-*-elf } && { ! { mips*-*-* riscv*-*-* } } } } } }
diff --git a/gcc/testsuite/g++.old-deja/g++.abi/ptrmem.C b/gcc/testsuite/g++.old-deja/g++.abi/ptrmem.C
index bda7960d8a2..f69000e9081 100644
--- a/gcc/testsuite/g++.old-deja/g++.abi/ptrmem.C
+++ b/gcc/testsuite/g++.old-deja/g++.abi/ptrmem.C
@@ -7,7 +7,7 @@
function. However, some platforms use all bits to encode a
function pointer. Such platforms use the lowest bit of the delta,
that is shifted left by one bit. */
-#if defined __MN10300__ || defined __SH5__ || defined __arm__ || defined __thumb__ || defined __mips__ || defined __aarch64__ || defined __PRU__
+#if defined __MN10300__ || defined __SH5__ || defined __arm__ || defined __thumb__ || defined __mips__ || defined __aarch64__ || defined __PRU__ || defined __loongarch__
#define ADJUST_PTRFN(func, virt) ((void (*)())(func))
#define ADJUST_DELTA(delta, virt) (((delta) << 1) + !!(virt))
#else
diff --git a/gcc/testsuite/g++.old-deja/g++.pt/ptrmem6.C b/gcc/testsuite/g++.old-deja/g++.pt/ptrmem6.C
index 9f4bbe43f89..8f8f7017ab7 100644
--- a/gcc/testsuite/g++.old-deja/g++.pt/ptrmem6.C
+++ b/gcc/testsuite/g++.old-deja/g++.pt/ptrmem6.C
@@ -25,7 +25,7 @@ int main() {
h<&B::j>(); // { dg-error "" }
g<(void (A::*)()) &A::f>(); // { dg-error "" "" { xfail c++11 } }
h<(int A::*) &A::i>(); // { dg-error "" "" { xfail c++11 } }
- g<(void (A::*)()) &B::f>(); // { dg-error "" "" { xfail { c++11 && { aarch64*-*-* arm*-*-* mips*-*-* } } } }
+ g<(void (A::*)()) &B::f>(); // { dg-error "" "" { xfail { c++11 && { aarch64*-*-* arm*-*-* mips*-*-* loongarch*-*-* } } } }
h<(int A::*) &B::j>(); // { dg-error "" }
g<(void (A::*)()) 0>(); // { dg-error "" "" { target { ! c++11 } } }
h<(int A::*) 0>(); // { dg-error "" "" { target { ! c++11 } } }
diff --git a/gcc/testsuite/gcc.dg/20020312-2.c b/gcc/testsuite/gcc.dg/20020312-2.c
index 52c33d09b90..2e35d443a1d 100644
--- a/gcc/testsuite/gcc.dg/20020312-2.c
+++ b/gcc/testsuite/gcc.dg/20020312-2.c
@@ -49,6 +49,8 @@ extern void abort (void);
# define PIC_REG "r20"
#elif defined(__mips__)
/* PIC register is $28, but is used even without -fpic. */
+#elif defined(__loongarch__)
+/* PIC register is $r2, but is used even without -fpic. */
#elif defined(__MMIX__)
/* No pic register. */
#elif defined(__mn10300__)
diff --git a/gcc/testsuite/gcc.dg/loop-8.c b/gcc/testsuite/gcc.dg/loop-8.c
index a685fc25056..8e5f2087831 100644
--- a/gcc/testsuite/gcc.dg/loop-8.c
+++ b/gcc/testsuite/gcc.dg/loop-8.c
@@ -1,6 +1,6 @@
/* { dg-do compile } */
/* { dg-options "-O1 -fdump-rtl-loop2_invariant" } */
-/* { dg-skip-if "unexpected IV" { "hppa*-*-* mips*-*-* visium-*-* powerpc*-*-* riscv*-*-* mmix-*-* vax-*-*" } } */
+/* { dg-skip-if "unexpected IV" { "hppa*-*-* mips*-*-* visium-*-* powerpc*-*-* riscv*-*-* mmix-*-* vax-*-* loongarch*-*-*" } } */
/* Load immediate on condition is available from z13 on and prevents moving
the load out of the loop, so always run this test with -march=zEC12 that
does not have load immediate on condition. */
diff --git a/gcc/testsuite/gcc.dg/torture/stackalign/builtin-apply-2.c b/gcc/testsuite/gcc.dg/torture/stackalign/builtin-apply-2.c
index 5ec05587dba..552ca1433f4 100644
--- a/gcc/testsuite/gcc.dg/torture/stackalign/builtin-apply-2.c
+++ b/gcc/testsuite/gcc.dg/torture/stackalign/builtin-apply-2.c
@@ -9,7 +9,7 @@
/* arm_hf_eabi: Variadic funcs use Base AAPCS. Normal funcs use VFP variant.
avr: Variadic funcs don't pass arguments in registers, while normal funcs
do. */
-/* { dg-skip-if "Variadic funcs use different argument passing from normal funcs" { arm_hf_eabi || { csky*-*-* avr-*-* riscv*-*-* or1k*-*-* msp430-*-* amdgcn-*-* pru-*-* } } } */
+/* { dg-skip-if "Variadic funcs use different argument passing from normal funcs" { arm_hf_eabi || { csky*-*-* avr-*-* riscv*-*-* or1k*-*-* msp430-*-* amdgcn-*-* pru-*-* loongarch*-*-* } } } */
/* { dg-skip-if "Variadic funcs have all args on stack. Normal funcs have args in registers." { nds32*-*-* } { v850*-*-* } } */
/* { dg-require-effective-target untyped_assembly } */
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/ssa-fre-3.c b/gcc/testsuite/gcc.dg/tree-ssa/ssa-fre-3.c
index 6b6255b9713..224dd4f72ef 100644
--- a/gcc/testsuite/gcc.dg/tree-ssa/ssa-fre-3.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/ssa-fre-3.c
@@ -5,7 +5,7 @@
When the condition is true, we distribute "(int) (a + b)" as
"(int) a + (int) b", otherwise we keep the original. */
-/* { dg-do compile { target { ! mips64 } } } */
+/* { dg-do compile { target { ! mips64 } && { ! loongarch64 } } } */
/* { dg-options "-O -fno-tree-forwprop -fno-tree-ccp -fwrapv -fdump-tree-fre1-details" } */
/* From PR14844. */
diff --git a/gcc/testsuite/gcc.target/loongarch/loongarch.exp b/gcc/testsuite/gcc.target/loongarch/loongarch.exp
new file mode 100644
index 00000000000..9f374a9bc73
--- /dev/null
+++ b/gcc/testsuite/gcc.target/loongarch/loongarch.exp
@@ -0,0 +1,40 @@
+# Copyright (C) 2021 Free Software Foundation, Inc.
+
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with GCC; see the file COPYING3. If not see
+# <http://www.gnu.org/licenses/>.
+
+# GCC testsuite that uses the `dg.exp' driver.
+
+# Exit immediately if this isn't a LoongArch target.
+if ![istarget loongarch*-*-*] then {
+ return
+}
+
+# Load support procs.
+load_lib gcc-dg.exp
+
+# If a testcase doesn't have special options, use these.
+global DEFAULT_CFLAGS
+if ![info exists DEFAULT_CFLAGS] then {
+ set DEFAULT_CFLAGS " "
+}
+
+# Initialize `dg'.
+dg-init
+
+# Main loop.
+dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/*.\[cS\]]] \
+ "" $DEFAULT_CFLAGS
+# All done.
+dg-finish
diff --git a/gcc/testsuite/gcc.target/loongarch/tst-asm-const.c b/gcc/testsuite/gcc.target/loongarch/tst-asm-const.c
new file mode 100644
index 00000000000..2e04b99e301
--- /dev/null
+++ b/gcc/testsuite/gcc.target/loongarch/tst-asm-const.c
@@ -0,0 +1,16 @@
+/* Test asm const. */
+/* { dg-do compile } */
+/* { dg-final { scan-assembler-times "foo:.*\\.long 1061109567.*\\.long 52" 1 } } */
+int foo ()
+{
+ __asm__ volatile (
+ "foo:"
+ "\n\t"
+ ".long %a0\n\t"
+ ".long %a1\n\t"
+ :
+ :"i"(0x3f3f3f3f), "i"(52)
+ :
+ );
+}
+
diff --git a/gcc/testsuite/go.test/go-test.exp b/gcc/testsuite/go.test/go-test.exp
index f16754513e4..63755aed106 100644
--- a/gcc/testsuite/go.test/go-test.exp
+++ b/gcc/testsuite/go.test/go-test.exp
@@ -232,6 +232,9 @@ proc go-set-goarch { } {
"riscv64-*-*" {
set goarch "riscv64"
}
+ "loongarch64-*-*" {
+ set goarch "loongarch64"
+ }
"s390*-*-*" {
if [check_effective_target_ilp32] {
set goarch "s390"
diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp
index e07d563f6f4..9dc2050b366 100644
--- a/gcc/testsuite/lib/target-supports.exp
+++ b/gcc/testsuite/lib/target-supports.exp
@@ -284,6 +284,10 @@ proc check_configured_with { pattern } {
proc check_weak_available { } {
global target_cpu
+ if { [ string first "loongarch" $target_cpu ] >= 0 } {
+ return 1
+ }
+
# All mips targets should support it
if { [ string first "mips" $target_cpu ] >= 0 } {
@@ -1295,6 +1299,14 @@ proc check_effective_target_mpaired_single { } {
# Return true if the target has access to FPU instructions.
proc check_effective_target_hard_float { } {
+ if { [istarget loongarch*-*-*] } {
+ return [check_no_compiler_messages hard_float assembly {
+ #if (defined __loongarch_soft_float)
+ #error __loongarch_soft_float
+ #endif
+ }]
+ }
+
if { [istarget mips*-*-*] } {
return [check_no_compiler_messages hard_float assembly {
#if (defined __mips_soft_float || defined __mips16)
@@ -8570,6 +8582,7 @@ proc check_effective_target_sync_char_short { } {
|| [istarget cris-*-*]
|| ([istarget sparc*-*-*] && [check_effective_target_sparc_v9])
|| ([istarget arc*-*-*] && [check_effective_target_arc_atomic])
+ || [istarget loongarch*-*-*]
|| [check_effective_target_mips_llsc] }}]
}
@@ -10658,6 +10671,7 @@ proc check_effective_target_branch_cost {} {
|| [istarget epiphany*-*-*]
|| [istarget frv*-*-*]
|| [istarget i?86-*-*] || [istarget x86_64-*-*]
+ || [istarget loongarch*-*-*]
|| [istarget mips*-*-*]
|| [istarget s390*-*-*]
|| [istarget riscv*-*-*]
--
2.27.0
^ permalink raw reply [flat|nested] 17+ messages in thread
* [PATCH v1 7/7] LoongArch Port: Regenerate configure
2021-11-06 8:40 [PATCH v1 0/7] Add LoongArch support Chenghua Xu
` (4 preceding siblings ...)
2021-11-06 8:40 ` [PATCH v1 6/7] LoongArch Port: gcc/testsuite Chenghua Xu
@ 2021-11-06 8:40 ` Chenghua Xu
2021-11-06 9:18 ` [PATCH v1 0/7] Add LoongArch support Xi Ruoyao
[not found] ` <20211106084056.2506166-2-xuchenghua@loongson.cn>
7 siblings, 0 replies; 17+ messages in thread
From: Chenghua Xu @ 2021-11-06 8:40 UTC (permalink / raw)
To: gcc-patches; +Cc: paul.hua.gm, xuchenghua, chenglulu
From: chenglulu <chenglulu@loongson.cn>
* config/picflag.m4: Default add build option '-fpic' for LoongArch.
* configure: Add LoongArch tuples.
* configure.ac: Like wise.
---
config/picflag.m4 | 3 +++
configure | 12 +++++++++++-
configure.ac | 10 +++++++++-
3 files changed, 23 insertions(+), 2 deletions(-)
diff --git a/config/picflag.m4 b/config/picflag.m4
index 8b106f9af88..0aefcf619bf 100644
--- a/config/picflag.m4
+++ b/config/picflag.m4
@@ -44,6 +44,9 @@ case "${$2}" in
# sets the default TLS model and affects inlining.
$1=-fPIC
;;
+ loongarch*-*-*)
+ $1=-fpic
+ ;;
mips-sgi-irix6*)
# PIC is the default.
;;
diff --git a/configure b/configure
index 58979d6e3b1..fcdb8b3d1b9 100755
--- a/configure
+++ b/configure
@@ -3052,7 +3052,7 @@ case "${ENABLE_GOLD}" in
# Check for target supported by gold.
case "${target}" in
i?86-*-* | x86_64-*-* | sparc*-*-* | powerpc*-*-* | arm*-*-* \
- | aarch64*-*-* | tilegx*-*-* | mips*-*-* | s390*-*-*)
+ | aarch64*-*-* | tilegx*-*-* | mips*-*-* | s390*-*-* | loongarch*-*-*)
configdirs="$configdirs gold"
if test x${ENABLE_GOLD} = xdefault; then
default_ld=gold
@@ -3638,6 +3638,9 @@ case "${target}" in
i[3456789]86-*-*)
libgloss_dir=i386
;;
+ loongarch*-*-*)
+ libgloss_dir=loongarch
+ ;;
m68hc11-*-*|m6811-*-*|m68hc12-*-*|m6812-*-*)
libgloss_dir=m68hc11
;;
@@ -4022,6 +4025,11 @@ case "${target}" in
wasm32-*-*)
noconfigdirs="$noconfigdirs ld"
;;
+ loongarch*-*-linux*)
+ ;;
+ loongarch*-*-*)
+ noconfigdirs="$noconfigdirs gprof"
+ ;;
esac
# If we aren't building newlib, then don't build libgloss, since libgloss
@@ -10083,6 +10091,8 @@ done
+
+
# Generate default definitions for YACC, M4, LEX and other programs that run
# on the build machine. These are used if the Makefile can't locate these
# programs in objdir.
diff --git a/configure.ac b/configure.ac
index 550e6993b59..8d1cf5eaf27 100644
--- a/configure.ac
+++ b/configure.ac
@@ -353,7 +353,7 @@ case "${ENABLE_GOLD}" in
# Check for target supported by gold.
case "${target}" in
i?86-*-* | x86_64-*-* | sparc*-*-* | powerpc*-*-* | arm*-*-* \
- | aarch64*-*-* | tilegx*-*-* | mips*-*-* | s390*-*-*)
+ | aarch64*-*-* | tilegx*-*-* | mips*-*-* | s390*-*-* | loongarch*-*-*)
configdirs="$configdirs gold"
if test x${ENABLE_GOLD} = xdefault; then
default_ld=gold
@@ -899,6 +899,9 @@ case "${target}" in
i[[3456789]]86-*-*)
libgloss_dir=i386
;;
+ loongarch*-*-*)
+ libgloss_dir=loongarch
+ ;;
m68hc11-*-*|m6811-*-*|m68hc12-*-*|m6812-*-*)
libgloss_dir=m68hc11
;;
@@ -1283,6 +1286,11 @@ case "${target}" in
wasm32-*-*)
noconfigdirs="$noconfigdirs ld"
;;
+ loongarch*-*-linux*)
+ ;;
+ loongarch*-*-*)
+ noconfigdirs="$noconfigdirs gprof"
+ ;;
esac
# If we aren't building newlib, then don't build libgloss, since libgloss
--
2.27.0
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH v1 0/7] Add LoongArch support.
2021-11-06 8:40 [PATCH v1 0/7] Add LoongArch support Chenghua Xu
` (5 preceding siblings ...)
2021-11-06 8:40 ` [PATCH v1 7/7] LoongArch Port: Regenerate configure Chenghua Xu
@ 2021-11-06 9:18 ` Xi Ruoyao
[not found] ` <20211106084056.2506166-2-xuchenghua@loongson.cn>
7 siblings, 0 replies; 17+ messages in thread
From: Xi Ruoyao @ 2021-11-06 9:18 UTC (permalink / raw)
To: Chenghua Xu, gcc-patches; +Cc: chenglulu
On Sat, 2021-11-06 at 16:40 +0800, Chenghua Xu wrote:
>
> This is a series of patch sets to support LoongArch.
>
> The LoongArch architecture (LoongArch) is an Instruction Set
> Architecture (ISA) that has a Reduced Instruction Set Computer (RISC)
> style.
> The documents are on
> https://loongson.github.io/LoongArch-Documentation/README-EN.html
>
> The ELF ABI Documents are on:
> https://loongson.github.io/LoongArch-Documentation/LoongArch-ELF-ABI-EN.html
>
> The binutils has been merged into trunk:
> https://sourceware.org/git/?p=binutils-gdb.git;a=commit;h=560b3fe208255ae909b4b1c88ba9c28b09043307
Congratulations!
> The ABI -mabi=name is still under discussion and may change in the
> next version,
> the rest can be reviewed.
>
> chenglulu (7):
> LoongArch Port: gcc
The [PATCH 1/1] does not arrive at gcc-patches successfully. I guess
it's because of some mail size limit issue... According to
https://gcc.gnu.org/contribute.html:
> If the patch is too big or too mechanical, posting it gzipped or
> bzip2ed and uuencoded or encoded as a base64 MIME part is acceptable,
> as long as the ChangeLog is still posted as plain text.
--
Xi Ruoyao <xry111@mengyan1223.wang>
School of Aerospace Science and Technology, Xidian University
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH v1 3/7] LoongArch Port: libgcc
2021-11-06 8:40 ` [PATCH v1 3/7] LoongArch Port: libgcc Chenghua Xu
@ 2021-11-06 9:46 ` Xi Ruoyao
0 siblings, 0 replies; 17+ messages in thread
From: Xi Ruoyao @ 2021-11-06 9:46 UTC (permalink / raw)
To: Chenghua Xu, gcc-patches; +Cc: chenglulu
On Sat, 2021-11-06 at 16:40 +0800, Chenghua Xu wrote:
/* snip */
> diff --git a/libgcc/config/loongarch/crti.S b/libgcc/config/loongarch/crti.S
> new file mode 100644
> index 00000000000..bac029874b5
> --- /dev/null
> +++ b/libgcc/config/loongarch/crti.S
> @@ -0,0 +1,43 @@
> +/* Copyright (C) 2021 Free Software Foundation, Inc.
> +
> +This file is part of GCC.
> +
> +GCC is free software; you can redistribute it and/or modify it under
> +the terms of the GNU General Public License as published by the Free
> +Software Foundation; either version 3, or (at your option) any later
> +version.
> +
> +GCC is distributed in the hope that it will be useful, but WITHOUT ANY
> +WARRANTY; without even the implied warranty of MERCHANTABILITY or
> +FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
> +for more details.
> +
> +Under Section 7 of GPL version 3, you are granted additional
> +permissions described in the GCC Runtime Library Exception, version
> +3.1, as published by the Free Software Foundation.
> +
> +You should have received a copy of the GNU General Public License and
> +a copy of the GCC Runtime Library Exception along with this program;
> +see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
> +<http://www.gnu.org/licenses/>. */
> +
> +/* 4 slots for argument spill area. 1 for cpreturn, 1 for stack.
> + Return spill offset of 8. Aligned to 16 bytes for lp64. */
> +
> + .section .init,"ax",@progbits
> + .globl _init
> + .type _init,@function
> +_init:
> + addi.d $r3,$r3,-16
> + st.d $r1,$r3,8
> + addi.d $r3,$r3,16
> + jirl $r0,$r1,0
> +
> + .section .fini,"ax",@progbits
> + .globl _fini
> + .type _fini,@function
> +_fini:
> + addi.d $r3,$r3,-16
> + st.d $r1,$r3,8
> + addi.d $r3,$r3,16
> + jirl $r0,$r1,0
There is some inconsistency of "tabs" or "spaces" between the
instruction and the operands. Likewisely, other *.S files.
/* snip */
> diff --git a/libgcc/config/loongarch/linux-unwind.h b/libgcc/config/loongarch/linux-unwind.h
> new file mode 100644
> index 00000000000..8c9dfa56a6d
> --- /dev/null
> +++ b/libgcc/config/loongarch/linux-unwind.h
> @@ -0,0 +1,80 @@
> +/* DWARF2 EH unwinding support for LoongArch Linux.
> + Copyright (C) 2021 Free Software Foundation, Inc.
> +
> +This file is part of GCC.
> +
> +GCC is free software; you can redistribute it and/or modify
> +it under the terms of the GNU General Public License as published by
> +the Free Software Foundation; either version 3, or (at your option)
> +any later version.
> +
> +GCC is distributed in the hope that it will be useful,
> +but WITHOUT ANY WARRANTY; without even the implied warranty of
> +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> +GNU General Public License for more details.
> +
> +Under Section 7 of GPL version 3, you are granted additional
> +permissions described in the GCC Runtime Library Exception, version
> +3.1, as published by the Free Software Foundation.
> +
> +You should have received a copy of the GNU General Public License and
> +a copy of the GCC Runtime Library Exception along with this program;
> +see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
> +<http://www.gnu.org/licenses/>. */
> +
> +#ifndef inhibit_libc
> +/* Do code reading to identify a signal frame, and set the frame
> + state data appropriately. See unwind-dw2.c for the structs. */
> +
> +#include <signal.h>
> +#include <sys/syscall.h>
> +#include <sys/ucontext.h>
> +
> +#define MD_FALLBACK_FRAME_STATE_FOR loongarch_fallback_frame_state
> +
> +static _Unwind_Reason_Code
> +loongarch_fallback_frame_state (struct _Unwind_Context *context,
> + _Unwind_FrameState *fs)
> +{
> + u_int32_t *pc = (u_int32_t *) context->ra;
> + struct sigcontext *sc;
> + _Unwind_Ptr new_cfa;
> + int i;
> +
> + /* 03822c0b dli a7, 0x8b (sigreturn) */
> + /* 002b0000 syscall 0 */
> + if (pc[1] != 0x002b0000)
> + return _URC_END_OF_STACK;
> + if (pc[0] == 0x03822c0b)
> + {
> + struct rt_sigframe
> + {
> + siginfo_t info;
> + ucontext_t uc;
> + } *rt_ = context->cfa;
> + sc = &rt_->uc.uc_mcontext;
> + }
> + else
> + return _URC_END_OF_STACK;
> +
> + new_cfa = (_Unwind_Ptr) sc;
> + fs->regs.cfa_how = CFA_REG_OFFSET;
> + fs->regs.cfa_reg = __LIBGCC_STACK_POINTER_REGNUM__;
> + fs->regs.cfa_offset = new_cfa - (_Unwind_Ptr) context->cfa;
> +
> + for (i = 0; i < 32; i++)
> + {
> + fs->regs.reg[i].how = REG_SAVED_OFFSET;
> + fs->regs.reg[i].loc.offset = (_Unwind_Ptr) & (sc->sc_regs[i]) - new_cfa;
There shouldn't be a space between the unary & and its operand. And the
braces around sc->sc_regs[i] seems unnecessary.
In this particular case, the space makes it really looking similar to a
bitwise and expression...
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH v1 6/7] LoongArch Port: gcc/testsuite
2021-11-06 8:40 ` [PATCH v1 6/7] LoongArch Port: gcc/testsuite Chenghua Xu
@ 2021-11-06 9:51 ` Xi Ruoyao
0 siblings, 0 replies; 17+ messages in thread
From: Xi Ruoyao @ 2021-11-06 9:51 UTC (permalink / raw)
To: Chenghua Xu, gcc-patches; +Cc: chenglulu
On Sat, 2021-11-06 at 16:40 +0800, Chenghua Xu wrote:
> diff --git a/gcc/testsuite/gcc.dg/20020312-2.c
> b/gcc/testsuite/gcc.dg/20020312-2.c
> index 52c33d09b90..2e35d443a1d 100644
> --- a/gcc/testsuite/gcc.dg/20020312-2.c
> +++ b/gcc/testsuite/gcc.dg/20020312-2.c
> @@ -49,6 +49,8 @@ extern void abort (void);
> # define PIC_REG "r20"
> #elif defined(__mips__)
> /* PIC register is $28, but is used even without -fpic. */
> +#elif defined(__loongarch__)
> +/* PIC register is $r2, but is used even without -fpic. */
It seems misleading: $r2 is the thread pointer, not the PIC register.
> #elif defined(__MMIX__)
> /* No pic register. */
> #elif defined(__mn10300__)
--
Xi Ruoyao <xry111@mengyan1223.wang>
School of Aerospace Science and Technology, Xidian University
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH v1 5/7] LoongArch Port: libgomp
2021-11-06 8:40 ` [PATCH v1 5/7] LoongArch Port: libgomp Chenghua Xu
@ 2021-11-06 9:58 ` Xi Ruoyao
0 siblings, 0 replies; 17+ messages in thread
From: Xi Ruoyao @ 2021-11-06 9:58 UTC (permalink / raw)
To: Chenghua Xu, gcc-patches; +Cc: chenglulu
On Sat, 2021-11-06 at 16:40 +0800, Chenghua Xu wrote:
> From: chenglulu <chenglulu@loongson.cn>
>
> libgomp/
>
> * configure.tgt: Add LoongArch tuple.
"tuple" should be "triplet".
--
Xi Ruoyao <xry111@mengyan1223.wang>
School of Aerospace Science and Technology, Xidian University
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH v1 1/7] LoongArch Port: gcc
[not found] ` <20211106084056.2506166-2-xuchenghua@loongson.cn>
@ 2021-11-08 2:30 ` Chenghua Xu
2021-11-08 16:40 ` Xi Ruoyao
2021-11-08 23:14 ` Joseph Myers
0 siblings, 2 replies; 17+ messages in thread
From: Chenghua Xu @ 2021-11-08 2:30 UTC (permalink / raw)
To: gcc-patches; +Cc: paul.hua.gm, chenglulu
[-- Attachment #1: Type: text/plain, Size: 90 bytes --]
This patch does not arrive at mail list. Send as an attachment in a
compressed format.
[-- Attachment #2: v1-0001-LoongArch-Port-gcc.patch.tar.xz --]
[-- Type: application/x-xz, Size: 99148 bytes --]
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH v1 1/7] LoongArch Port: gcc
2021-11-08 2:30 ` [PATCH v1 1/7] LoongArch Port: gcc Chenghua Xu
@ 2021-11-08 16:40 ` Xi Ruoyao
2021-11-08 23:14 ` Joseph Myers
1 sibling, 0 replies; 17+ messages in thread
From: Xi Ruoyao @ 2021-11-08 16:40 UTC (permalink / raw)
To: Chenghua Xu, gcc-patches; +Cc: chenglulu
On Mon, 2021-11-08 at 10:30 +0800, Chenghua Xu wrote:
> This patch does not arrive at mail list. Send as an attachment in a
> compressed format.
I think .patch.gz is perferred instead of .tar.gz.
And is it possible to seperate this into multiple commits? For example
the whole "-march=native" support can be in a seperate commit. It will
be easier to review those changes one-by-one.
> --- /dev/null
> +++ b/gcc/config/loongarch/linux.h
/* snip */
> + /* Integer ABI */
> + #if DEFAULT_ABI_INT == ABI_LP64
> + #define INT_ABI_SUFFIX "lib64"
> + #endif
"INT_ABI_SUFFIX" should be renamed to INT_ABI_LIBDIR or something.
"lib64" is not a "suffix".
> --- /dev/null
> +++ b/gcc/config/loongarch/loongarch-opts.c
/* snip */
> + /* 5. Check integer ABI-ISA for conflicts. */
> + switch (*isa_int)
> + {
> + case ISA_LA64:
> + if (*abi_int != ABI_LP64) goto error_int_abi;
> + break;
/* snip */
> + switch (*isa_float)
> + {
> + case ISA_SOFT_FLOAT:
> + if (*abi_float != ABI_SOFT_FLOAT) goto error_float_abi;
> + break;
> +
> + case ISA_SINGLE_FLOAT:
> + if (*abi_float != ABI_SINGLE_FLOAT) goto error_float_abi;
> + break;
> +
> + case ISA_DOUBLE_FLOAT:
> + if (*abi_float != ABI_DOUBLE_FLOAT) goto error_float_abi;
> + break;
>
The goto statements should be in a new line (coding style).
> --- /dev/null
> +++ b/gcc/config/loongarch/gnu-user.h
/* snip */
> +#define GLIBC_DYNAMIC_LINKER_LP64 "/lib64/ld.so.1"
It is "ld-linux-loongarch-lp64d.so.x" in the latest ELF psABI. "x" is
now 0 but we have an ongoing discussion to make it 1.
> +++ b/gcc/config/loongarch/sync.md
/* snip */
> +(define_insn "atomic_cas_value_strong<mode>"
> + [(set (match_operand:GPR 0 "register_operand" "=&r")
> + (match_operand:GPR 1 "memory_operand" "+ZC"))
> + (set (match_dup 1)
> + (unspec_volatile:GPR [(match_operand:GPR 2 "reg_or_0_operand" "rJ")
> + (match_operand:GPR 3 "reg_or_0_operand" "rJ")
> + (match_operand:SI 4 "const_int_operand") ;; mod_s
> + (match_operand:SI 5 "const_int_operand")] ;; mod_f
> + UNSPEC_COMPARE_AND_SWAP))
> + (clobber (match_scratch:GPR 6 "=&r"))]
> + ""
> +{
> + static char buff[256] = {0};
> + buff[0] = '\0';
> + sprintf (buff + strlen (buff), "%%G5\\n\\t");
> + sprintf (buff + strlen (buff), "1:\\n\\t");
> + sprintf (buff + strlen (buff), "ll.<amo>\\t%%0,%%1\\n\\t");
> + sprintf (buff + strlen (buff), "bne\\t%%0,%%z2,2f\\n\\t");
> + sprintf (buff + strlen (buff), "or%%i3\\t%%6,$zero,%%3\\n\\t");
> + sprintf (buff + strlen (buff), "sc.<amo>\\t%%6,%%1\\n\\t");
> + sprintf (buff + strlen (buff), "beq\\t$zero,%%6,1b\\n\\t");
> + sprintf (buff + strlen (buff), "b\\t3f\\n\\t");
> + sprintf (buff + strlen (buff), "2:\\n\\t");
> + sprintf (buff + strlen (buff), "dbar\\t0x700\\n\\t");
> + sprintf (buff + strlen (buff), "3:\\n\\t");
> +
> + return buff;
> +}
These "cascading" sprintf/strlen looks stupid. It can be simply:
return "%G5\\n\\t"
"1:\\n\\t"
"ll.<amo>\\t%0,%1\\n\\t"
...
"3:\\n\\t";
The compiler will concatenate the string literals so there will be no
runtime overhead.
And there should be some comment to explain this LL/SC loop and dbar
workaround IMO.
Likewise for other atomic LL/SC expansions.
--
Xi Ruoyao <xry111@mengyan1223.wang>
School of Aerospace Science and Technology, Xidian University
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH v1 1/7] LoongArch Port: gcc
2021-11-08 2:30 ` [PATCH v1 1/7] LoongArch Port: gcc Chenghua Xu
2021-11-08 16:40 ` Xi Ruoyao
@ 2021-11-08 23:14 ` Joseph Myers
2021-11-09 13:53 ` Xi Ruoyao
1 sibling, 1 reply; 17+ messages in thread
From: Joseph Myers @ 2021-11-08 23:14 UTC (permalink / raw)
To: Chenghua Xu; +Cc: gcc-patches, chenglulu
You have:
> +#define GLIBC_DYNAMIC_LINKER_LP64 "/lib64/ld.so.1"
See my comments on the glibc patch series
<https://sourceware.org/pipermail/libc-alpha/2021-August/130298.html>.
Specifically, the point that all new glibc ports should have unique
per-ABI dynamic linker names for each ABI supported by the port,
preferably referencing the architecture name somewhere in the dynamic
linker name. /lib64/ld.so.1 is a name that's already in use, so should
not be used by any ABI of this new port.
> + error ("%<-march=%s%> does not work on a cross compiler.",
Error messages should not end with '.'.
> + error ("%<-mtune=%s%> does not work on a cross compiler.",
Likewise.
I didn't see any additions to contrib/config-list.mk anywhere in the patch
series. (See "Back End" in sourcebuild.texi for a list of places you may
need to update as part of a GCC port, including config-list.mk.)
Please make sure the back end builds cleanly with current GCC mainline.
This can be tested either with a native bootstrap, or by building a cross
compiler, using a native compiler of the same GCC mainline version for the
build and configuring using --enable-werror-always (that configure option
has the effect of enabling -Werror in the same way that later bootstrap
stages in a native bootstrap do).
--
Joseph S. Myers
joseph@codesourcery.com
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH v1 1/7] LoongArch Port: gcc
2021-11-08 23:14 ` Joseph Myers
@ 2021-11-09 13:53 ` Xi Ruoyao
2021-11-09 15:52 ` Xi Ruoyao
0 siblings, 1 reply; 17+ messages in thread
From: Xi Ruoyao @ 2021-11-09 13:53 UTC (permalink / raw)
To: Joseph Myers, Chenghua Xu; +Cc: chenglulu, gcc-patches
On Mon, 2021-11-08 at 23:14 +0000, Joseph Myers wrote:
/* snip */
> Please make sure the back end builds cleanly with current GCC mainline.
> This can be tested either with a native bootstrap, or by building a cross
> compiler, using a native compiler of the same GCC mainline version for the
> build and configuring using --enable-werror-always (that configure option
> has the effect of enabling -Werror in the same way that later bootstrap
> stages in a native bootstrap do).
gcc trunk does not build with glibc-2.34+ and --enable-werror-always :(
gcc -c -g -O2 -W -Wall -Wwrite-strings -Wstrict-prototypes -Wmissing-prototypes
-Wold-style-definition -Wmissing-format-attribute -Wno-overlength-strings -pedan
tic -Wno-long-long -Werror -DHAVE_CONFIG_H -I. -I../../../fixincludes -I../incl
ude -I../../../fixincludes/../include ../../../fixincludes/fixincl.c
../../../fixincludes/fixincl.c: In function ‘process’:
../../../fixincludes/fixincl.c:1356:7: error: argument 1 is null but the corresp
onding size argument 2 value is 4096 [-Werror=nonnull]
1356 | fprintf (stderr, "Cannot access %s from %s\n\terror %d (%s)\n",
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
1357 | pz_curr_file, getcwd ((char *) NULL, MAXPATHLEN),
| ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
1358 | erno, xstrerror (erno));
| ~~~~~~~~~~~~~~~~~~~~~~~
In file included from ../../../fixincludes/system.h:192,
from ../../../fixincludes/fixlib.h:29,
from ../../../fixincludes/fixincl.c:24:
/usr/include/unistd.h:531:14: note: in a call to function ‘getcwd’ declared with attribute ‘access (write_only, 1, 2)’
531 | extern char *getcwd (char *__buf, size_t __size) __THROW __wur
| ^~~~~~
cc1: all warnings being treated as errors
I've sent the fix as
https://gcc.gnu.org/pipermail/gcc-patches/2021-November/583820.html.
--
Xi Ruoyao <xry111@mengyan1223.wang>
School of Aerospace Science and Technology, Xidian University
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH v1 1/7] LoongArch Port: gcc
2021-11-09 13:53 ` Xi Ruoyao
@ 2021-11-09 15:52 ` Xi Ruoyao
2021-11-09 18:31 ` Xi Ruoyao
0 siblings, 1 reply; 17+ messages in thread
From: Xi Ruoyao @ 2021-11-09 15:52 UTC (permalink / raw)
To: Joseph Myers, Chenghua Xu; +Cc: gcc-patches, chenglulu
On Tue, 2021-11-09 at 21:53 +0800, Xi Ruoyao via Gcc-patches wrote:
> On Mon, 2021-11-08 at 23:14 +0000, Joseph Myers wrote:
>
> /* snip */
>
> > Please make sure the back end builds cleanly with current GCC mainline.
> > This can be tested either with a native bootstrap, or by building a cross
> > compiler, using a native compiler of the same GCC mainline version for the
> > build and configuring using --enable-werror-always (that configure option
> > has the effect of enabling -Werror in the same way that later bootstrap
> > stages in a native bootstrap do).
>
> gcc trunk does not build with glibc-2.34+ and --enable-werror-always :(
>
> I've sent the fix as
> https://gcc.gnu.org/pipermail/gcc-patches/2021-November/583820.html.
I applied the 7 patches and my fix onto c71cb26a9e. A native bootstrap
with --enable-werror-always has succeeded.
--
Xi Ruoyao <xry111@mengyan1223.wang>
School of Aerospace Science and Technology, Xidian University
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH v1 1/7] LoongArch Port: gcc
2021-11-09 15:52 ` Xi Ruoyao
@ 2021-11-09 18:31 ` Xi Ruoyao
0 siblings, 0 replies; 17+ messages in thread
From: Xi Ruoyao @ 2021-11-09 18:31 UTC (permalink / raw)
To: Joseph Myers, Chenghua Xu; +Cc: chenglulu, gcc-patches
[-- Attachment #1: Type: text/plain, Size: 504 bytes --]
On Tue, 2021-11-09 at 23:52 +0800, Xi Ruoyao via Gcc-patches wrote:
> > gcc trunk does not build with glibc-2.34+ and --enable-werror-always
> > :(
> >
> > I've sent the fix as
> > https://gcc.gnu.org/pipermail/gcc-patches/2021-November/583820.html.
>
> I applied the 7 patches and my fix onto c71cb26a9e. A native bootstrap
> with --enable-werror-always has succeeded.
A test summary is attached.
--
Xi Ruoyao <xry111@mengyan1223.wang>
School of Aerospace Science and Technology, Xidian University
[-- Attachment #2: gcc-12-larch-v1-test-summary.txt --]
[-- Type: text/plain, Size: 11670 bytes --]
Native configuration is loongarch64-unknown-linux-gnu
=== gcc tests ===
Running target unix
FAIL: gcc.dg/analyzer/analyzer-verbosity-2a.c (test for excess errors)
FAIL: gcc.dg/analyzer/analyzer-verbosity-3a.c (test for excess errors)
FAIL: gcc.dg/analyzer/edges-1.c (test for excess errors)
FAIL: gcc.dg/analyzer/file-1.c (test for excess errors)
FAIL: gcc.dg/analyzer/file-2.c (test for excess errors)
FAIL: gcc.dg/analyzer/file-paths-1.c (test for excess errors)
FAIL: gcc.dg/analyzer/file-pr58237.c (test for excess errors)
FAIL: gcc.dg/analyzer/pr99716-1.c (test for excess errors)
FAIL: gcc.dg/compat/scalar-by-value-3 c_compat_x_tst.o-c_compat_y_tst.o execute
FAIL: c-c++-common/auto-init-6.c -Wc++-compat (internal compiler error)
FAIL: c-c++-common/auto-init-6.c -Wc++-compat (test for excess errors)
FAIL: c-c++-common/spec-barrier-1.c -Wc++-compat (test for excess errors)
FAIL: gcc.dg/Warray-bounds-48.c pr102706 (test for warnings, line 33)
FAIL: gcc.dg/Warray-bounds-48.c pr102706 (test for warnings, line 133)
FAIL: gcc.dg/Wzero-length-array-bounds-2.c (test for excess errors)
XPASS: gcc.dg/attr-alloc_size-11.c missing range info for signed char (test for warnings, line 50)
XPASS: gcc.dg/attr-alloc_size-11.c missing range info for short (test for warnings, line 51)
FAIL: gcc.dg/builtin-apply2.c execution test
FAIL: gcc.dg/pr44194-1.c scan-rtl-dump dse1 "global deletions = (2|3)"
FAIL: gcc.dg/pr44194-1.c scan-rtl-dump-not final "insn[: ][^\\n]*set \\\\(mem(?![^\\n]*scratch)"
FAIL: gcc.dg/signbit-2.c scan-tree-dump-times optimized "\\\\s+>\\\\s+{ 0, 0, 0, 0 }" 1
FAIL: gcc.dg/stack-usage-1.c scan-stack-usage foo\\t(256|264)\\tstatic
XPASS: gcc.dg/uninit-pred-7_a.c bogus warning (test for bogus messages, line 26)
FAIL: gcc.dg/uninit-pred-9_b.c bogus warning (test for bogus messages, line 20)
FAIL: gcc.dg/fixed-point/composite-type.c (test for excess errors)
FAIL: gcc.dg/torture/fp-uint64-convert-double-1.c -O3 -g (internal compiler error)
FAIL: gcc.dg/torture/fp-uint64-convert-double-1.c -O3 -g (test for excess errors)
UNRESOLVED: gcc.dg/torture/fp-uint64-convert-double-1.c -O3 -g compilation failed to produce executable
FAIL: gcc.dg/torture/fp-uint64-convert-double-2.c -O3 -g (internal compiler error)
FAIL: gcc.dg/torture/fp-uint64-convert-double-2.c -O3 -g (test for excess errors)
UNRESOLVED: gcc.dg/torture/fp-uint64-convert-double-2.c -O3 -g compilation failed to produce executable
XPASS: gcc.dg/tree-ssa/20040204-1.c scan-tree-dump-times optimized "link_error" 0
FAIL: gcc.dg/tree-ssa/builtin-sprintf-warn-16.c (test for warnings, line 142)
FAIL: gcc.dg/tree-ssa/builtin-sprintf-warn-16.c (test for warnings, line 243)
FAIL: gcc.dg/tree-ssa/builtin-sprintf-warn-16.c (test for excess errors)
FAIL: gcc.dg/tree-ssa/ssa-dom-cse-2.c scan-tree-dump optimized "return 28;"
FAIL: gcc.dg/tree-ssa/ssa-sink-18.c scan-tree-dump-times sink2 "Sunk statements: 4" 1
=== gcc Summary ===
# of expected passes 129806
# of unexpected failures 31
# of unexpected successes 4
# of expected failures 831
# of unresolved testcases 2
# of unsupported tests 2234
/home/xry111/gcc-test/gcc-12-larch-v1/build/gcc/xgcc version 12.0.0 20211109 (experimental) (GCC)
=== gfortran tests ===
Running target unix
FAIL: gfortran.dg/bind_c_array_params_2.f90 -O scan-assembler-times [ \\t][\$,_0-9]*myBindC 1
FAIL: gfortran.dg/pr95690.f90 -O (test for errors, line 6)
FAIL: gfortran.dg/pr95690.f90 -O (test for excess errors)
FAIL: gfortran.dg/reshape_shape_2.f90 -O (internal compiler error)
FAIL: gfortran.dg/reshape_shape_2.f90 -O (test for errors, line 6)
FAIL: gfortran.dg/reshape_shape_2.f90 -O (test for excess errors)
FAIL: gfortran.dg/vector_subscript_1.f90 -O1 execution test
FAIL: gfortran.dg/vector_subscript_1.f90 -O2 execution test
FAIL: gfortran.dg/vector_subscript_1.f90 -O3 -fomit-frame-pointer -funroll-loops -fpeel-loops -ftracer -finline-functions execution test
FAIL: gfortran.dg/vector_subscript_1.f90 -O3 -g execution test
=== gfortran Summary ===
# of expected passes 63806
# of unexpected failures 10
# of expected failures 241
# of unsupported tests 174
/home/xry111/gcc-test/gcc-12-larch-v1/build/gcc/gfortran version 12.0.0 20211109 (experimental) (GCC)
=== g++ tests ===
Running target unix
FAIL: tmpdir-g++.dg-struct-layout-1/t033 cp_compat_x_tst.o-cp_compat_y_tst.o execute
FAIL: g++.dg/tree-ssa/pr90883.C scan-tree-dump dse1 "Deleted redundant store: .*.a = {}"
FAIL: g++.dg/warn/Waddress-5.C -std=gnu++98 (test for excess errors)
FAIL: g++.dg/warn/Waddress-5.C -std=gnu++14 (test for excess errors)
FAIL: g++.dg/warn/Waddress-5.C -std=gnu++17 (test for excess errors)
FAIL: g++.dg/warn/Waddress-5.C -std=gnu++2a (test for excess errors)
FAIL: g++.dg/warn/Warray-bounds-16.C -std=gnu++98 (test for excess errors)
FAIL: g++.dg/warn/Warray-bounds-16.C -std=gnu++98 scan-tree-dump-not optimized "goto"
FAIL: g++.dg/warn/Warray-bounds-16.C -std=gnu++14 (test for excess errors)
FAIL: g++.dg/warn/Warray-bounds-16.C -std=gnu++14 scan-tree-dump-not optimized "goto"
FAIL: g++.dg/warn/Warray-bounds-16.C -std=gnu++17 (test for excess errors)
FAIL: g++.dg/warn/Warray-bounds-16.C -std=gnu++17 scan-tree-dump-not optimized "goto"
FAIL: g++.dg/warn/Warray-bounds-16.C -std=gnu++2a (test for excess errors)
FAIL: g++.dg/warn/Warray-bounds-16.C -std=gnu++2a scan-tree-dump-not optimized "goto"
FAIL: c-c++-common/auto-init-6.c -std=gnu++98 (internal compiler error)
FAIL: c-c++-common/auto-init-6.c -std=gnu++98 (test for excess errors)
FAIL: c-c++-common/auto-init-6.c -std=gnu++14 (internal compiler error)
FAIL: c-c++-common/auto-init-6.c -std=gnu++14 (test for excess errors)
FAIL: c-c++-common/auto-init-6.c -std=gnu++17 (internal compiler error)
FAIL: c-c++-common/auto-init-6.c -std=gnu++17 (test for excess errors)
FAIL: c-c++-common/auto-init-6.c -std=gnu++2a (internal compiler error)
FAIL: c-c++-common/auto-init-6.c -std=gnu++2a (test for excess errors)
FAIL: c-c++-common/spec-barrier-1.c -std=gnu++98 (test for excess errors)
FAIL: c-c++-common/spec-barrier-1.c -std=gnu++14 (test for excess errors)
FAIL: c-c++-common/spec-barrier-1.c -std=gnu++17 (test for excess errors)
FAIL: c-c++-common/spec-barrier-1.c -std=gnu++2a (test for excess errors)
FAIL: g++.dg/lto/pr64076 cp_lto_pr64076_0.o-cp_lto_pr64076_1.o link, -O0 -flto -shared -fPIC
FAIL: g++.dg/modules/bad-mapper-3.C -std=c++17 (test for errors, line )
FAIL: g++.dg/modules/bad-mapper-3.C -std=c++17 (test for excess errors)
FAIL: g++.dg/modules/bad-mapper-3.C -std=c++2a (test for errors, line )
FAIL: g++.dg/modules/bad-mapper-3.C -std=c++2a (test for excess errors)
FAIL: g++.dg/modules/bad-mapper-3.C -std=c++2b (test for errors, line )
FAIL: g++.dg/modules/bad-mapper-3.C -std=c++2b (test for excess errors)
FAIL: g++.dg/modules/xtreme-header-3_a.H -std=c++17 (internal compiler error)
FAIL: g++.dg/modules/xtreme-header-3_a.H -std=c++17 (test for excess errors)
FAIL: g++.dg/modules/xtreme-header-3_a.H module-cmi (gcm.cache/\$srcdir/g++.dg/modules/xtreme-header-3_a.H.gcm)
FAIL: g++.dg/modules/xtreme-header-3_b.C -std=c++17 (test for excess errors)
FAIL: g++.dg/modules/xtreme-header-3_c.C -std=c++17 (test for excess errors)
FAIL: g++.dg/modules/xtreme-header-3_a.H -std=c++2a (internal compiler error)
FAIL: g++.dg/modules/xtreme-header-3_a.H -std=c++2a (test for excess errors)
FAIL: g++.dg/modules/xtreme-header-3_a.H module-cmi (gcm.cache/\$srcdir/g++.dg/modules/xtreme-header-3_a.H.gcm)
FAIL: g++.dg/modules/xtreme-header-3_b.C -std=c++2a (test for excess errors)
FAIL: g++.dg/modules/xtreme-header-3_c.C -std=c++2a (test for excess errors)
FAIL: g++.dg/modules/xtreme-header-3_a.H -std=c++2b (internal compiler error)
FAIL: g++.dg/modules/xtreme-header-3_a.H -std=c++2b (test for excess errors)
FAIL: g++.dg/modules/xtreme-header-3_a.H module-cmi (gcm.cache/\$srcdir/g++.dg/modules/xtreme-header-3_a.H.gcm)
FAIL: g++.dg/modules/xtreme-header-3_b.C -std=c++2b (test for excess errors)
FAIL: g++.dg/modules/xtreme-header-3_c.C -std=c++2b (test for excess errors)
FAIL: g++.dg/modules/xtreme-header-5_a.H -std=c++2a (internal compiler error)
FAIL: g++.dg/modules/xtreme-header-5_a.H -std=c++2a (test for excess errors)
FAIL: g++.dg/modules/xtreme-header-5_a.H module-cmi (gcm.cache/\$srcdir/g++.dg/modules/xtreme-header-5_a.H.gcm)
FAIL: g++.dg/modules/xtreme-header-5_b.C -std=c++2a (test for excess errors)
FAIL: g++.dg/modules/xtreme-header-5_c.C -std=c++2a (test for excess errors)
FAIL: g++.dg/modules/xtreme-header-5_a.H -std=c++2b (internal compiler error)
FAIL: g++.dg/modules/xtreme-header-5_a.H -std=c++2b (test for excess errors)
FAIL: g++.dg/modules/xtreme-header-5_a.H module-cmi (gcm.cache/\$srcdir/g++.dg/modules/xtreme-header-5_a.H.gcm)
FAIL: g++.dg/modules/xtreme-header-5_b.C -std=c++2b (test for excess errors)
FAIL: g++.dg/modules/xtreme-header-5_c.C -std=c++2b (test for excess errors)
FAIL: g++.dg/modules/xtreme-header_a.H -std=c++17 (internal compiler error)
FAIL: g++.dg/modules/xtreme-header_a.H -std=c++17 (test for excess errors)
FAIL: g++.dg/modules/xtreme-header_a.H module-cmi (gcm.cache/\$srcdir/g++.dg/modules/xtreme-header_a.H.gcm)
FAIL: g++.dg/modules/xtreme-header_b.C -std=c++17 (test for excess errors)
FAIL: g++.dg/modules/xtreme-header_a.H -std=c++2a (internal compiler error)
FAIL: g++.dg/modules/xtreme-header_a.H -std=c++2a (test for excess errors)
FAIL: g++.dg/modules/xtreme-header_a.H module-cmi (gcm.cache/\$srcdir/g++.dg/modules/xtreme-header_a.H.gcm)
FAIL: g++.dg/modules/xtreme-header_b.C -std=c++2a (test for excess errors)
FAIL: g++.dg/modules/xtreme-header_a.H -std=c++2b (internal compiler error)
FAIL: g++.dg/modules/xtreme-header_a.H -std=c++2b (test for excess errors)
FAIL: g++.dg/modules/xtreme-header_a.H module-cmi (gcm.cache/\$srcdir/g++.dg/modules/xtreme-header_a.H.gcm)
FAIL: g++.dg/modules/xtreme-header_b.C -std=c++2b (test for excess errors)
=== g++ Summary ===
# of expected passes 210924
# of unexpected failures 70
# of expected failures 1403
# of unsupported tests 9657
/home/xry111/gcc-test/gcc-12-larch-v1/build/gcc/xg++ version 12.0.0 20211109 (experimental) (GCC)
=== objc tests ===
Running target unix
=== objc Summary ===
# of expected passes 2844
# of unsupported tests 71
/home/xry111/gcc-test/gcc-12-larch-v1/build/gcc/xgcc version 12.0.0 20211109 (experimental) (GCC)
=== libatomic tests ===
Running target unix
=== libatomic Summary ===
# of expected passes 54
=== libgomp tests ===
Running target unix
=== libgomp Summary ===
# of expected passes 11673
# of expected failures 103
# of unsupported tests 620
=== libstdc++ tests ===
Running target unix
FAIL: 17_intro/headers/c++1998/49745.cc (test for excess errors)
FAIL: 22_locale/numpunct/members/char/3.cc execution test
FAIL: 22_locale/time_get/get_time/char/2.cc execution test
FAIL: 22_locale/time_get/get_time/char/wrapped_env.cc execution test
FAIL: 22_locale/time_get/get_time/char/wrapped_locale.cc execution test
FAIL: 22_locale/time_get/get_time/wchar_t/2.cc execution test
FAIL: 22_locale/time_get/get_time/wchar_t/wrapped_env.cc execution test
FAIL: 22_locale/time_get/get_time/wchar_t/wrapped_locale.cc execution test
FAIL: 30_threads/jthread/95989.cc execution test
=== libstdc++ Summary ===
# of expected passes 14768
# of unexpected failures 9
# of expected failures 95
# of unsupported tests 383
Compiler version: 12.0.0 20211109 (experimental) (GCC)
Platform: loongarch64-unknown-linux-gnu
configure flags: --prefix=/home/xry111/gcc-12-larch-v1 --disable-multilib --with-system-zlib --enable-werror-always
true
^ permalink raw reply [flat|nested] 17+ messages in thread
end of thread, other threads:[~2021-11-09 18:31 UTC | newest]
Thread overview: 17+ messages (download: mbox.gz / follow: Atom feed)
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2021-11-06 8:40 [PATCH v1 0/7] Add LoongArch support Chenghua Xu
2021-11-06 8:40 ` [PATCH v1 2/7] LoongArch Port: Regenerate gcc/configure Chenghua Xu
2021-11-06 8:40 ` [PATCH v1 3/7] LoongArch Port: libgcc Chenghua Xu
2021-11-06 9:46 ` Xi Ruoyao
2021-11-06 8:40 ` [PATCH v1 4/7] LoongArch Port: Regenerate libgcc/configure Chenghua Xu
2021-11-06 8:40 ` [PATCH v1 5/7] LoongArch Port: libgomp Chenghua Xu
2021-11-06 9:58 ` Xi Ruoyao
2021-11-06 8:40 ` [PATCH v1 6/7] LoongArch Port: gcc/testsuite Chenghua Xu
2021-11-06 9:51 ` Xi Ruoyao
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2021-11-06 9:18 ` [PATCH v1 0/7] Add LoongArch support Xi Ruoyao
[not found] ` <20211106084056.2506166-2-xuchenghua@loongson.cn>
2021-11-08 2:30 ` [PATCH v1 1/7] LoongArch Port: gcc Chenghua Xu
2021-11-08 16:40 ` Xi Ruoyao
2021-11-08 23:14 ` Joseph Myers
2021-11-09 13:53 ` Xi Ruoyao
2021-11-09 15:52 ` Xi Ruoyao
2021-11-09 18:31 ` Xi Ruoyao
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