* [Ada] arm-qnx-7.1: unwind goes wrong after regs restore
@ 2022-06-01 8:45 Pierre-Marie de Rodat
0 siblings, 0 replies; 2+ messages in thread
From: Pierre-Marie de Rodat @ 2022-06-01 8:45 UTC (permalink / raw)
To: gcc-patches; +Cc: Doug Rupp
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Bump the pc +3 total for Thumb mode, the same calculation that as is
done for arm-linux.
Tested on x86_64-pc-linux-gnu, committed on trunk
gcc/ada/
* init.c (__gnat_adjust_context_for_raise) [QNX][__thumb2__]: Bump
the pc an extra byte.
[-- Attachment #2: patch.diff --]
[-- Type: text/x-diff, Size: 831 bytes --]
diff --git a/gcc/ada/init.c b/gcc/ada/init.c
--- a/gcc/ada/init.c
+++ b/gcc/ada/init.c
@@ -2579,7 +2579,17 @@ __gnat_adjust_context_for_raise (int signo ATTRIBUTE_UNUSED,
uintptr_t *pc_addr;
mcontext_t *mcontext = &((ucontext_t *) sc)->uc_mcontext;
pc_addr = (uintptr_t *)&mcontext->cpu.gpr [ARM_REG_PC];
+
+ /* ARM Bump has to be an even number because of odd/even architecture. */
*pc_addr += 2;
+#ifdef __thumb2__
+ /* For thumb, the return address must have the low order bit set, otherwise
+ the unwinder will reset to "arm" mode upon return. As long as the
+ compilation unit containing the landing pad is compiled with the same
+ mode (arm vs thumb) as the signaling compilation unit, this works. */
+ if (mcontext->cpu.spsr & ARM_CPSR_T)
+ *pc_addr += 1;
+#endif
}
#endif /* ARMEL */
^ permalink raw reply [flat|nested] 2+ messages in thread
* [Ada] arm-qnx-7.1: unwind goes wrong after regs restore
@ 2022-06-01 8:44 Pierre-Marie de Rodat
0 siblings, 0 replies; 2+ messages in thread
From: Pierre-Marie de Rodat @ 2022-06-01 8:44 UTC (permalink / raw)
To: gcc-patches; +Cc: Doug Rupp
[-- Attachment #1: Type: text/plain, Size: 201 bytes --]
The usual increment of the pc to pc+2 for ARM is needed.
Tested on x86_64-pc-linux-gnu, committed on trunk
gcc/ada/
* init.c (QNX): __gnat_adjust_context_for_raise: New
implementation for arm-qnx.
[-- Attachment #2: patch.diff --]
[-- Type: text/x-diff, Size: 1510 bytes --]
diff --git a/gcc/ada/init.c b/gcc/ada/init.c
--- a/gcc/ada/init.c
+++ b/gcc/ada/init.c
@@ -2560,6 +2560,29 @@ __gnat_install_handler (void)
#include <errno.h>
#include "sigtramp.h"
+#if defined (__ARMEL__) && !defined (__aarch64__)
+
+/* ARM-QNX case with arm unwinding exceptions */
+#define HAVE_GNAT_ADJUST_CONTEXT_FOR_RAISE
+
+#include <ucontext.h>
+#include <arm/cpu.h>
+#include <stdint.h>
+
+void
+__gnat_adjust_context_for_raise (int signo ATTRIBUTE_UNUSED,
+ void *sc ATTRIBUTE_UNUSED)
+{
+ /* In case of ARM exceptions, the registers context have the PC pointing
+ to the instruction that raised the signal. However the unwinder expects
+ the instruction to be in the range [PC+2,PC+3]. */
+ uintptr_t *pc_addr;
+ mcontext_t *mcontext = &((ucontext_t *) sc)->uc_mcontext;
+ pc_addr = (uintptr_t *)&mcontext->cpu.gpr [ARM_REG_PC];
+ *pc_addr += 2;
+}
+#endif /* ARMEL */
+
void
__gnat_map_signal (int sig,
siginfo_t *si ATTRIBUTE_UNUSED,
@@ -2597,6 +2620,13 @@ __gnat_map_signal (int sig,
static void
__gnat_error_handler (int sig, siginfo_t *si, void *ucontext)
{
+#ifdef HAVE_GNAT_ADJUST_CONTEXT_FOR_RAISE
+ /* We need to sometimes to adjust the PC in case of signals so that it
+ doesn't reference the exception that actually raised the signal but the
+ instruction before it. */
+ __gnat_adjust_context_for_raise (sig, ucontext);
+#endif
+
__gnat_sigtramp (sig, (void *) si, (void *) ucontext,
(__sigtramphandler_t *)&__gnat_map_signal);
}
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