* [PATCH] middle-end: Add MULT_EXPR recognition for cond scalar reduction
@ 2022-08-25 9:39 Kong, Lingling
2022-08-25 9:39 ` Kong, Lingling
` (2 more replies)
0 siblings, 3 replies; 4+ messages in thread
From: Kong, Lingling @ 2022-08-25 9:39 UTC (permalink / raw)
To: Liu, Hongtao, gcc-patches, richard.guenther; +Cc: Kong, Lingling
Hi,
The conditional mult reduction cannot be recognized with current GCC. The following loop cannot be vectorized.
Now add MULT_EXPR recognition for conditional scalar reduction.
float summa(int n, float *arg1, float *arg2)
{
int i;
float res1 = 1.0;
for(i = 0; i < n; i++) {
if(arg2[i])
res1 *= arg1[i];
}
return res1;
}
gcc/ChangeLog:
* tree-if-conv.cc (is_cond_scalar_reduction): Add MULT_EXPR
recognition.
gcc/testsuite/ChangeLog:
* gcc.dg/tree-ssa/gen-vect-34.c: New test.
* gcc.dg/vect/vect-ifcvt-18.c: New test.
---
gcc/testsuite/gcc.dg/tree-ssa/gen-vect-34.c | 16 +++++++++
gcc/testsuite/gcc.dg/vect/vect-ifcvt-18.c | 38 +++++++++++++++++++++
gcc/tree-if-conv.cc | 1 +
3 files changed, 55 insertions(+)
create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/gen-vect-34.c
create mode 100644 gcc/testsuite/gcc.dg/vect/vect-ifcvt-18.c
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/gen-vect-34.c b/gcc/testsuite/gcc.dg/tree-ssa/gen-vect-34.c
new file mode 100644
index 00000000000..8d2d36401fe
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/tree-ssa/gen-vect-34.c
@@ -0,0 +1,16 @@
+/* { dg-do compile } */
+/* { dg-options "-Ofast -fdump-tree-vect-details" } */
+/* { dg-additional-options "-mavx2" { target { x86_64-*-* i?86-*-* } }
+} */
+
+float summul(int n, float *arg1, float *arg2)
+{
+ int i;
+ float res1 = 1.0;
+ for(i = 0; i < n; i++) {
+ if(arg2[i])
+ res1 *= arg1[i];
+ }
+ return res1;
+}
+
+/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" {
+target { ! { avr-*-* pru-*-* } } } } } */
diff --git a/gcc/testsuite/gcc.dg/vect/vect-ifcvt-18.c b/gcc/testsuite/gcc.dg/vect/vect-ifcvt-18.c
new file mode 100644
index 00000000000..c1d3c27d819
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/vect/vect-ifcvt-18.c
@@ -0,0 +1,38 @@
+/* { dg-require-effective-target vect_condition } */
+/* { dg-require-effective-target vect_float } */
+/* { dg-additional-options "-Ofast -mavx" { target avx_runtime } } */
+
+
+int A0[4] = {36,39,42,45};
+int B0[4] = {42,42,0,42};
+float A1[8] = {36,39,42,45,43,32,21,12}; float B1[8] =
+{42,42,0,42,42,42,0,42}; double A2[16] =
+{36,39,42,45,43,32,21,12,23,34,45,56,42,78,89,11};
+double B2[16] = {42,42,0,42,42,42,42,42,42,42,42,42,0,42,42,42};
+
+int main ()
+{
+ int i, j;
+ int res0 = 1;
+ float res1 = 1.0;
+ double res2 = 1.0;
+
+ for (i = 0; i < 4; i++)
+ if (B0[i])
+ res0 *= A0[i];
+
+ for (i = 0; i < 8; i++)
+ if (B1[i])
+ res1 *= A1[i];
+
+ for (i = 0; i < 16; i++)
+ if (B2[i])
+ res2 *= A2[i];
+ /* check results: */
+ if (res0 != 63180 || res1 != 1043228160.000000
+ ||res2 != 3296728515318523101184.000000)
+ __builtin_abort ();
+ return 0;
+}
+
+/* { dg-final { scan-tree-dump "vectorized 3 loops" "vect" { target
+i?86-*-* x86_64-*-* } } } */
diff --git a/gcc/tree-if-conv.cc b/gcc/tree-if-conv.cc index 1c8e1a45234..bac29fb5574 100644
--- a/gcc/tree-if-conv.cc
+++ b/gcc/tree-if-conv.cc
@@ -1739,6 +1739,7 @@ is_cond_scalar_reduction (gimple *phi, gimple **reduc, tree arg_0, tree arg_1,
if (reduction_op != PLUS_EXPR
&& reduction_op != MINUS_EXPR
+ && reduction_op != MULT_EXPR
&& reduction_op != BIT_IOR_EXPR
&& reduction_op != BIT_XOR_EXPR
&& reduction_op != BIT_AND_EXPR)
--
2.18.2
^ permalink raw reply [flat|nested] 4+ messages in thread
* [PATCH] middle-end: Add MULT_EXPR recognition for cond scalar reduction
2022-08-25 9:39 [PATCH] middle-end: Add MULT_EXPR recognition for cond scalar reduction Kong, Lingling
@ 2022-08-25 9:39 ` Kong, Lingling
2022-08-31 7:14 ` Kong, Lingling
2022-08-31 16:08 ` Jeff Law
2 siblings, 0 replies; 4+ messages in thread
From: Kong, Lingling @ 2022-08-25 9:39 UTC (permalink / raw)
To: Liu, Hongtao, gcc-patches, richard.guenther
Hi,
The conditional mult reduction cannot be recognized with current GCC. The following loop cannot be vectorized.
Now add MULT_EXPR recognition for conditional scalar reduction.
float summa(int n, float *arg1, float *arg2)
{
int i;
float res1 = 1.0;
for(i = 0; i < n; i++) {
if(arg2[i])
res1 *= arg1[i];
}
return res1;
}
gcc/ChangeLog:
* tree-if-conv.cc (is_cond_scalar_reduction): Add MULT_EXPR
recognition.
gcc/testsuite/ChangeLog:
* gcc.dg/tree-ssa/gen-vect-34.c: New test.
* gcc.dg/vect/vect-ifcvt-18.c: New test.
---
gcc/testsuite/gcc.dg/tree-ssa/gen-vect-34.c | 16 +++++++++
gcc/testsuite/gcc.dg/vect/vect-ifcvt-18.c | 38 +++++++++++++++++++++
gcc/tree-if-conv.cc | 1 +
3 files changed, 55 insertions(+)
create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/gen-vect-34.c
create mode 100644 gcc/testsuite/gcc.dg/vect/vect-ifcvt-18.c
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/gen-vect-34.c b/gcc/testsuite/gcc.dg/tree-ssa/gen-vect-34.c
new file mode 100644
index 00000000000..8d2d36401fe
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/tree-ssa/gen-vect-34.c
@@ -0,0 +1,16 @@
+/* { dg-do compile } */
+/* { dg-options "-Ofast -fdump-tree-vect-details" } */
+/* { dg-additional-options "-mavx2" { target { x86_64-*-* i?86-*-* } }
+} */
+
+float summul(int n, float *arg1, float *arg2)
+{
+ int i;
+ float res1 = 1.0;
+ for(i = 0; i < n; i++) {
+ if(arg2[i])
+ res1 *= arg1[i];
+ }
+ return res1;
+}
+
+/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" {
+target { ! { avr-*-* pru-*-* } } } } } */
diff --git a/gcc/testsuite/gcc.dg/vect/vect-ifcvt-18.c b/gcc/testsuite/gcc.dg/vect/vect-ifcvt-18.c
new file mode 100644
index 00000000000..c1d3c27d819
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/vect/vect-ifcvt-18.c
@@ -0,0 +1,38 @@
+/* { dg-require-effective-target vect_condition } */
+/* { dg-require-effective-target vect_float } */
+/* { dg-additional-options "-Ofast -mavx" { target avx_runtime } } */
+
+
+int A0[4] = {36,39,42,45};
+int B0[4] = {42,42,0,42};
+float A1[8] = {36,39,42,45,43,32,21,12}; float B1[8] =
+{42,42,0,42,42,42,0,42}; double A2[16] =
+{36,39,42,45,43,32,21,12,23,34,45,56,42,78,89,11};
+double B2[16] = {42,42,0,42,42,42,42,42,42,42,42,42,0,42,42,42};
+
+int main ()
+{
+ int i, j;
+ int res0 = 1;
+ float res1 = 1.0;
+ double res2 = 1.0;
+
+ for (i = 0; i < 4; i++)
+ if (B0[i])
+ res0 *= A0[i];
+
+ for (i = 0; i < 8; i++)
+ if (B1[i])
+ res1 *= A1[i];
+
+ for (i = 0; i < 16; i++)
+ if (B2[i])
+ res2 *= A2[i];
+ /* check results: */
+ if (res0 != 63180 || res1 != 1043228160.000000
+ ||res2 != 3296728515318523101184.000000)
+ __builtin_abort ();
+ return 0;
+}
+
+/* { dg-final { scan-tree-dump "vectorized 3 loops" "vect" { target
+i?86-*-* x86_64-*-* } } } */
diff --git a/gcc/tree-if-conv.cc b/gcc/tree-if-conv.cc index 1c8e1a45234..bac29fb5574 100644
--- a/gcc/tree-if-conv.cc
+++ b/gcc/tree-if-conv.cc
@@ -1739,6 +1739,7 @@ is_cond_scalar_reduction (gimple *phi, gimple **reduc, tree arg_0, tree arg_1,
if (reduction_op != PLUS_EXPR
&& reduction_op != MINUS_EXPR
+ && reduction_op != MULT_EXPR
&& reduction_op != BIT_IOR_EXPR
&& reduction_op != BIT_XOR_EXPR
&& reduction_op != BIT_AND_EXPR)
--
2.18.2
^ permalink raw reply [flat|nested] 4+ messages in thread
* RE: [PATCH] middle-end: Add MULT_EXPR recognition for cond scalar reduction
2022-08-25 9:39 [PATCH] middle-end: Add MULT_EXPR recognition for cond scalar reduction Kong, Lingling
2022-08-25 9:39 ` Kong, Lingling
@ 2022-08-31 7:14 ` Kong, Lingling
2022-08-31 16:08 ` Jeff Law
2 siblings, 0 replies; 4+ messages in thread
From: Kong, Lingling @ 2022-08-31 7:14 UTC (permalink / raw)
To: gcc-patches, richard.guenther; +Cc: Liu, Hongtao
Hi Richard, could you help to have a look for the patch ?
Ok for master ?
> Hi,
>
> The conditional mult reduction cannot be recognized with current GCC. The
> following loop cannot be vectorized.
> Now add MULT_EXPR recognition for conditional scalar reduction.
>
> float summa(int n, float *arg1, float *arg2)
> {
> int i;
> float res1 = 1.0;
> for(i = 0; i < n; i++) {
> if(arg2[i])
> res1 *= arg1[i];
> }
> return res1;
> }
>
> gcc/ChangeLog:
>
> * tree-if-conv.cc (is_cond_scalar_reduction): Add MULT_EXPR
> recognition.
>
> gcc/testsuite/ChangeLog:
>
> * gcc.dg/tree-ssa/gen-vect-34.c: New test.
> * gcc.dg/vect/vect-ifcvt-18.c: New test.
> ---
> gcc/testsuite/gcc.dg/tree-ssa/gen-vect-34.c | 16 +++++++++
> gcc/testsuite/gcc.dg/vect/vect-ifcvt-18.c | 38 +++++++++++++++++++++
> gcc/tree-if-conv.cc | 1 +
> 3 files changed, 55 insertions(+)
> create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/gen-vect-34.c
> create mode 100644 gcc/testsuite/gcc.dg/vect/vect-ifcvt-18.c
>
> diff --git a/gcc/testsuite/gcc.dg/tree-ssa/gen-vect-34.c
> b/gcc/testsuite/gcc.dg/tree-ssa/gen-vect-34.c
> new file mode 100644
> index 00000000000..8d2d36401fe
> --- /dev/null
> +++ b/gcc/testsuite/gcc.dg/tree-ssa/gen-vect-34.c
> @@ -0,0 +1,16 @@
> +/* { dg-do compile } */
> +/* { dg-options "-Ofast -fdump-tree-vect-details" } */
> +/* { dg-additional-options "-mavx2" { target { x86_64-*-* i?86-*-* } }
> +} */
> +
> +float summul(int n, float *arg1, float *arg2)
> +{
> + int i;
> + float res1 = 1.0;
> + for(i = 0; i < n; i++) {
> + if(arg2[i])
> + res1 *= arg1[i];
> + }
> + return res1;
> +}
> +
> +/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" {
> +target { ! { avr-*-* pru-*-* } } } } } */
> diff --git a/gcc/testsuite/gcc.dg/vect/vect-ifcvt-18.c
> b/gcc/testsuite/gcc.dg/vect/vect-ifcvt-18.c
> new file mode 100644
> index 00000000000..c1d3c27d819
> --- /dev/null
> +++ b/gcc/testsuite/gcc.dg/vect/vect-ifcvt-18.c
> @@ -0,0 +1,38 @@
> +/* { dg-require-effective-target vect_condition } */
> +/* { dg-require-effective-target vect_float } */
> +/* { dg-additional-options "-Ofast -mavx" { target avx_runtime } } */
> +
> +
> +int A0[4] = {36,39,42,45};
> +int B0[4] = {42,42,0,42};
> +float A1[8] = {36,39,42,45,43,32,21,12}; float B1[8] =
> +{42,42,0,42,42,42,0,42}; double A2[16] =
> +{36,39,42,45,43,32,21,12,23,34,45,56,42,78,89,11};
> +double B2[16] = {42,42,0,42,42,42,42,42,42,42,42,42,0,42,42,42};
> +
> +int main ()
> +{
> + int i, j;
> + int res0 = 1;
> + float res1 = 1.0;
> + double res2 = 1.0;
> +
> + for (i = 0; i < 4; i++)
> + if (B0[i])
> + res0 *= A0[i];
> +
> + for (i = 0; i < 8; i++)
> + if (B1[i])
> + res1 *= A1[i];
> +
> + for (i = 0; i < 16; i++)
> + if (B2[i])
> + res2 *= A2[i];
> + /* check results: */
> + if (res0 != 63180 || res1 != 1043228160.000000
> + ||res2 != 3296728515318523101184.000000)
> + __builtin_abort ();
> + return 0;
> +}
> +
> +/* { dg-final { scan-tree-dump "vectorized 3 loops" "vect" { target
> +i?86-*-* x86_64-*-* } } } */
> diff --git a/gcc/tree-if-conv.cc b/gcc/tree-if-conv.cc index
> 1c8e1a45234..bac29fb5574 100644
> --- a/gcc/tree-if-conv.cc
> +++ b/gcc/tree-if-conv.cc
> @@ -1739,6 +1739,7 @@ is_cond_scalar_reduction (gimple *phi, gimple
> **reduc, tree arg_0, tree arg_1,
>
> if (reduction_op != PLUS_EXPR
> && reduction_op != MINUS_EXPR
> + && reduction_op != MULT_EXPR
> && reduction_op != BIT_IOR_EXPR
> && reduction_op != BIT_XOR_EXPR
> && reduction_op != BIT_AND_EXPR)
> --
> 2.18.2
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] middle-end: Add MULT_EXPR recognition for cond scalar reduction
2022-08-25 9:39 [PATCH] middle-end: Add MULT_EXPR recognition for cond scalar reduction Kong, Lingling
2022-08-25 9:39 ` Kong, Lingling
2022-08-31 7:14 ` Kong, Lingling
@ 2022-08-31 16:08 ` Jeff Law
2 siblings, 0 replies; 4+ messages in thread
From: Jeff Law @ 2022-08-31 16:08 UTC (permalink / raw)
To: gcc-patches
On 8/25/2022 3:39 AM, Kong, Lingling via Gcc-patches wrote:
> Hi,
>
> The conditional mult reduction cannot be recognized with current GCC. The following loop cannot be vectorized.
> Now add MULT_EXPR recognition for conditional scalar reduction.
>
> float summa(int n, float *arg1, float *arg2)
> {
> int i;
> float res1 = 1.0;
> for(i = 0; i < n; i++) {
> if(arg2[i])
> res1 *= arg1[i];
> }
> return res1;
> }
>
> gcc/ChangeLog:
>
> * tree-if-conv.cc (is_cond_scalar_reduction): Add MULT_EXPR
> recognition.
>
> gcc/testsuite/ChangeLog:
>
> * gcc.dg/tree-ssa/gen-vect-34.c: New test.
> * gcc.dg/vect/vect-ifcvt-18.c: New test.
OK
jeff
^ permalink raw reply [flat|nested] 4+ messages in thread
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2022-08-25 9:39 [PATCH] middle-end: Add MULT_EXPR recognition for cond scalar reduction Kong, Lingling
2022-08-25 9:39 ` Kong, Lingling
2022-08-31 7:14 ` Kong, Lingling
2022-08-31 16:08 ` Jeff Law
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