From: Palmer Dabbelt <palmer@rivosinc.com>
To: gcc-patches@gcc.gnu.org
Subject: [PATCH] RISC-V: Fix the V calling convention
Date: Wed, 31 Aug 2022 20:27:46 -0700 [thread overview]
Message-ID: <20220901032746.22765-1-palmer@rivosinc.com> (raw)
Message-ID: <20220901032746.Zext8gLpePV-8iVw0H7iTY09zQAt6_A1P7RagpygycM@z> (raw)
The V registers are always clobbered on calls.
gcc/ChangeLog
* config/riscv/riscv.cc (riscv_conditional_register_usage):
Always mark the V registers as clobbered on calls.
---
gcc/config/riscv/riscv.cc | 13 ++++++++++---
1 file changed, 10 insertions(+), 3 deletions(-)
diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc
index 675d92c0961..c18e61f4a03 100644
--- a/gcc/config/riscv/riscv.cc
+++ b/gcc/config/riscv/riscv.cc
@@ -5442,11 +5442,18 @@ riscv_conditional_register_usage (void)
if (!TARGET_VECTOR)
{
for (int regno = V_REG_FIRST; regno <= V_REG_LAST; regno++)
- fixed_regs[regno] = call_used_regs[regno] = 1;
+ fixed_regs[regno] = 1;
- fixed_regs[VTYPE_REGNUM] = call_used_regs[VTYPE_REGNUM] = 1;
- fixed_regs[VL_REGNUM] = call_used_regs[VL_REGNUM] = 1;
+ fixed_regs[VTYPE_REGNUM] = 1;
+ fixed_regs[VL_REGNUM] = 1;
}
+
+ /* The standard ABIs all clobber the entire vector state on calls. */
+ for (int regno = V_REG_FIRST; regno <= V_REG_LAST; regno++)
+ call_used_regs[regno] = 1;
+
+ call_used_regs[VTYPE_REGNUM] = 1;
+ call_used_regs[VL_REGNUM] = 1;
}
/* Return a register priority for hard reg REGNO. */
--
2.34.1
next reply other threads:[~2022-09-01 3:28 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-09-01 3:27 Palmer Dabbelt [this message]
2022-09-01 3:27 ` Palmer Dabbelt
2022-09-02 7:54 ` Kito Cheng
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