* [PATCH] RISC-V: Add new line at end of file.
@ 2022-10-12 1:42 juzhe.zhong
2022-10-12 13:00 ` Kito Cheng
0 siblings, 1 reply; 2+ messages in thread
From: juzhe.zhong @ 2022-10-12 1:42 UTC (permalink / raw)
To: gcc-patches; +Cc: kito.cheng, Ju-Zhe Zhong
From: Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
gcc/ChangeLog:
* config/riscv/riscv-c.cc: Add new line.
* config/riscv/riscv_vector.h (vwrite_csr): Add new line.
---
gcc/config/riscv/riscv-c.cc | 2 +-
gcc/config/riscv/riscv_vector.h | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/gcc/config/riscv/riscv-c.cc b/gcc/config/riscv/riscv-c.cc
index 6fe4a8aeacf..57eeaebc582 100644
--- a/gcc/config/riscv/riscv-c.cc
+++ b/gcc/config/riscv/riscv-c.cc
@@ -195,4 +195,4 @@ void
riscv_register_pragmas (void)
{
c_register_pragma ("riscv", "intrinsic", riscv_pragma_intrinsic);
-}
\ No newline at end of file
+}
diff --git a/gcc/config/riscv/riscv_vector.h b/gcc/config/riscv/riscv_vector.h
index 85cc656bc41..1efe3f888b5 100644
--- a/gcc/config/riscv/riscv_vector.h
+++ b/gcc/config/riscv/riscv_vector.h
@@ -97,4 +97,4 @@ vwrite_csr(enum RVV_CSR csr, unsigned long value)
}
#endif // __cplusplus
#endif // __riscv_vector
-#endif // __RISCV_VECTOR_H
\ No newline at end of file
+#endif // __RISCV_VECTOR_H
--
2.36.1
^ permalink raw reply [flat|nested] 2+ messages in thread
* Re: [PATCH] RISC-V: Add new line at end of file.
2022-10-12 1:42 [PATCH] RISC-V: Add new line at end of file juzhe.zhong
@ 2022-10-12 13:00 ` Kito Cheng
0 siblings, 0 replies; 2+ messages in thread
From: Kito Cheng @ 2022-10-12 13:00 UTC (permalink / raw)
To: juzhe.zhong; +Cc: gcc-patches
Most changes has included in this commit:
https://github.com/gcc-mirror/gcc/commit/684d238b8cd7e8222d9e66457815f2a63178730b
On Wed, Oct 12, 2022 at 9:43 AM <juzhe.zhong@rivai.ai> wrote:
>
> From: Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
>
> gcc/ChangeLog:
>
> * config/riscv/riscv-c.cc: Add new line.
> * config/riscv/riscv_vector.h (vwrite_csr): Add new line.
>
> ---
> gcc/config/riscv/riscv-c.cc | 2 +-
> gcc/config/riscv/riscv_vector.h | 2 +-
> 2 files changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/gcc/config/riscv/riscv-c.cc b/gcc/config/riscv/riscv-c.cc
> index 6fe4a8aeacf..57eeaebc582 100644
> --- a/gcc/config/riscv/riscv-c.cc
> +++ b/gcc/config/riscv/riscv-c.cc
> @@ -195,4 +195,4 @@ void
> riscv_register_pragmas (void)
> {
> c_register_pragma ("riscv", "intrinsic", riscv_pragma_intrinsic);
> -}
> \ No newline at end of file
> +}
> diff --git a/gcc/config/riscv/riscv_vector.h b/gcc/config/riscv/riscv_vector.h
> index 85cc656bc41..1efe3f888b5 100644
> --- a/gcc/config/riscv/riscv_vector.h
> +++ b/gcc/config/riscv/riscv_vector.h
> @@ -97,4 +97,4 @@ vwrite_csr(enum RVV_CSR csr, unsigned long value)
> }
> #endif // __cplusplus
> #endif // __riscv_vector
> -#endif // __RISCV_VECTOR_H
> \ No newline at end of file
> +#endif // __RISCV_VECTOR_H
> --
> 2.36.1
>
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2022-10-12 13:00 ` Kito Cheng
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