[PATCH] RISC-V: Add vle/vse C++ overloaded API intrinsic testcases

[PATCH] RISC-V: Add vle/vse C++ overloaded API intrinsic testcases

[juzhe.zhong]

From: Ju-Zhe Zhong <juzhe.zhong@rivai.ai>

gcc/testsuite/ChangeLog:

        * g++.target/riscv/rvv/base/vle-1.C: New test.
        * g++.target/riscv/rvv/base/vle_tu-1.C: New test.
        * g++.target/riscv/rvv/base/vle_tum-1.C: New test.
        * g++.target/riscv/rvv/base/vle_tumu-1.C: New test.
        * g++.target/riscv/rvv/base/vse-1.C: New test.

---
 .../g++.target/riscv/rvv/base/vle-1.C         | 345 +++++++++
 .../g++.target/riscv/rvv/base/vle_tu-1.C      | 345 +++++++++
 .../g++.target/riscv/rvv/base/vle_tum-1.C     | 345 +++++++++
 .../g++.target/riscv/rvv/base/vle_tumu-1.C    | 345 +++++++++
 .../g++.target/riscv/rvv/base/vse-1.C         | 685 ++++++++++++++++++
 5 files changed, 2065 insertions(+)
 create mode 100644 gcc/testsuite/g++.target/riscv/rvv/base/vle-1.C
 create mode 100644 gcc/testsuite/g++.target/riscv/rvv/base/vle_tu-1.C
 create mode 100644 gcc/testsuite/g++.target/riscv/rvv/base/vle_tum-1.C
 create mode 100644 gcc/testsuite/g++.target/riscv/rvv/base/vle_tumu-1.C
 create mode 100644 gcc/testsuite/g++.target/riscv/rvv/base/vse-1.C

diff --git a/gcc/testsuite/g++.target/riscv/rvv/base/vle-1.C b/gcc/testsuite/g++.target/riscv/rvv/base/vle-1.C
new file mode 100644
index 00000000000..e06f62a8fb9
--- /dev/null
+++ b/gcc/testsuite/g++.target/riscv/rvv/base/vle-1.C
@@ -0,0 +1,345 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv32gcv -mabi=ilp32d -O3 -fno-schedule-insns -fno-schedule-insns2" } */
+
+#include "riscv_vector.h"
+
+vint8mf8_t
+test___riscv_vle8(vbool64_t mask,int8_t* base,size_t vl)
+{
+  return __riscv_vle8(mask,base,vl);
+}
+
+vint8mf4_t
+test___riscv_vle8(vbool32_t mask,int8_t* base,size_t vl)
+{
+  return __riscv_vle8(mask,base,vl);
+}
+
+vint8mf2_t
+test___riscv_vle8(vbool16_t mask,int8_t* base,size_t vl)
+{
+  return __riscv_vle8(mask,base,vl);
+}
+
+vint8m1_t
+test___riscv_vle8(vbool8_t mask,int8_t* base,size_t vl)
+{
+  return __riscv_vle8(mask,base,vl);
+}
+
+vint8m2_t
+test___riscv_vle8(vbool4_t mask,int8_t* base,size_t vl)
+{
+  return __riscv_vle8(mask,base,vl);
+}
+
+vint8m4_t
+test___riscv_vle8(vbool2_t mask,int8_t* base,size_t vl)
+{
+  return __riscv_vle8(mask,base,vl);
+}
+
+vint8m8_t
+test___riscv_vle8(vbool1_t mask,int8_t* base,size_t vl)
+{
+  return __riscv_vle8(mask,base,vl);
+}
+
+vuint8mf8_t
+test___riscv_vle8(vbool64_t mask,uint8_t* base,size_t vl)
+{
+  return __riscv_vle8(mask,base,vl);
+}
+
+vuint8mf4_t
+test___riscv_vle8(vbool32_t mask,uint8_t* base,size_t vl)
+{
+  return __riscv_vle8(mask,base,vl);
+}
+
+vuint8mf2_t
+test___riscv_vle8(vbool16_t mask,uint8_t* base,size_t vl)
+{
+  return __riscv_vle8(mask,base,vl);
+}
+
+vuint8m1_t
+test___riscv_vle8(vbool8_t mask,uint8_t* base,size_t vl)
+{
+  return __riscv_vle8(mask,base,vl);
+}
+
+vuint8m2_t
+test___riscv_vle8(vbool4_t mask,uint8_t* base,size_t vl)
+{
+  return __riscv_vle8(mask,base,vl);
+}
+
+vuint8m4_t
+test___riscv_vle8(vbool2_t mask,uint8_t* base,size_t vl)
+{
+  return __riscv_vle8(mask,base,vl);
+}
+
+vuint8m8_t
+test___riscv_vle8(vbool1_t mask,uint8_t* base,size_t vl)
+{
+  return __riscv_vle8(mask,base,vl);
+}
+
+vint16mf4_t
+test___riscv_vle16(vbool64_t mask,int16_t* base,size_t vl)
+{
+  return __riscv_vle16(mask,base,vl);
+}
+
+vint16mf2_t
+test___riscv_vle16(vbool32_t mask,int16_t* base,size_t vl)
+{
+  return __riscv_vle16(mask,base,vl);
+}
+
+vint16m1_t
+test___riscv_vle16(vbool16_t mask,int16_t* base,size_t vl)
+{
+  return __riscv_vle16(mask,base,vl);
+}
+
+vint16m2_t
+test___riscv_vle16(vbool8_t mask,int16_t* base,size_t vl)
+{
+  return __riscv_vle16(mask,base,vl);
+}
+
+vint16m4_t
+test___riscv_vle16(vbool4_t mask,int16_t* base,size_t vl)
+{
+  return __riscv_vle16(mask,base,vl);
+}
+
+vint16m8_t
+test___riscv_vle16(vbool2_t mask,int16_t* base,size_t vl)
+{
+  return __riscv_vle16(mask,base,vl);
+}
+
+vuint16mf4_t
+test___riscv_vle16(vbool64_t mask,uint16_t* base,size_t vl)
+{
+  return __riscv_vle16(mask,base,vl);
+}
+
+vuint16mf2_t
+test___riscv_vle16(vbool32_t mask,uint16_t* base,size_t vl)
+{
+  return __riscv_vle16(mask,base,vl);
+}
+
+vuint16m1_t
+test___riscv_vle16(vbool16_t mask,uint16_t* base,size_t vl)
+{
+  return __riscv_vle16(mask,base,vl);
+}
+
+vuint16m2_t
+test___riscv_vle16(vbool8_t mask,uint16_t* base,size_t vl)
+{
+  return __riscv_vle16(mask,base,vl);
+}
+
+vuint16m4_t
+test___riscv_vle16(vbool4_t mask,uint16_t* base,size_t vl)
+{
+  return __riscv_vle16(mask,base,vl);
+}
+
+vuint16m8_t
+test___riscv_vle16(vbool2_t mask,uint16_t* base,size_t vl)
+{
+  return __riscv_vle16(mask,base,vl);
+}
+
+vint32mf2_t
+test___riscv_vle32(vbool64_t mask,int32_t* base,size_t vl)
+{
+  return __riscv_vle32(mask,base,vl);
+}
+
+vint32m1_t
+test___riscv_vle32(vbool32_t mask,int32_t* base,size_t vl)
+{
+  return __riscv_vle32(mask,base,vl);
+}
+
+vint32m2_t
+test___riscv_vle32(vbool16_t mask,int32_t* base,size_t vl)
+{
+  return __riscv_vle32(mask,base,vl);
+}
+
+vint32m4_t
+test___riscv_vle32(vbool8_t mask,int32_t* base,size_t vl)
+{
+  return __riscv_vle32(mask,base,vl);
+}
+
+vint32m8_t
+test___riscv_vle32(vbool4_t mask,int32_t* base,size_t vl)
+{
+  return __riscv_vle32(mask,base,vl);
+}
+
+vuint32mf2_t
+test___riscv_vle32(vbool64_t mask,uint32_t* base,size_t vl)
+{
+  return __riscv_vle32(mask,base,vl);
+}
+
+vuint32m1_t
+test___riscv_vle32(vbool32_t mask,uint32_t* base,size_t vl)
+{
+  return __riscv_vle32(mask,base,vl);
+}
+
+vuint32m2_t
+test___riscv_vle32(vbool16_t mask,uint32_t* base,size_t vl)
+{
+  return __riscv_vle32(mask,base,vl);
+}
+
+vuint32m4_t
+test___riscv_vle32(vbool8_t mask,uint32_t* base,size_t vl)
+{
+  return __riscv_vle32(mask,base,vl);
+}
+
+vuint32m8_t
+test___riscv_vle32(vbool4_t mask,uint32_t* base,size_t vl)
+{
+  return __riscv_vle32(mask,base,vl);
+}
+
+vfloat32mf2_t
+test___riscv_vle32(vbool64_t mask,float* base,size_t vl)
+{
+  return __riscv_vle32(mask,base,vl);
+}
+
+vfloat32m1_t
+test___riscv_vle32(vbool32_t mask,float* base,size_t vl)
+{
+  return __riscv_vle32(mask,base,vl);
+}
+
+vfloat32m2_t
+test___riscv_vle32(vbool16_t mask,float* base,size_t vl)
+{
+  return __riscv_vle32(mask,base,vl);
+}
+
+vfloat32m4_t
+test___riscv_vle32(vbool8_t mask,float* base,size_t vl)
+{
+  return __riscv_vle32(mask,base,vl);
+}
+
+vfloat32m8_t
+test___riscv_vle32(vbool4_t mask,float* base,size_t vl)
+{
+  return __riscv_vle32(mask,base,vl);
+}
+
+vint64m1_t
+test___riscv_vle64(vbool64_t mask,int64_t* base,size_t vl)
+{
+  return __riscv_vle64(mask,base,vl);
+}
+
+vint64m2_t
+test___riscv_vle64(vbool32_t mask,int64_t* base,size_t vl)
+{
+  return __riscv_vle64(mask,base,vl);
+}
+
+vint64m4_t
+test___riscv_vle64(vbool16_t mask,int64_t* base,size_t vl)
+{
+  return __riscv_vle64(mask,base,vl);
+}
+
+vint64m8_t
+test___riscv_vle64(vbool8_t mask,int64_t* base,size_t vl)
+{
+  return __riscv_vle64(mask,base,vl);
+}
+
+vuint64m1_t
+test___riscv_vle64(vbool64_t mask,uint64_t* base,size_t vl)
+{
+  return __riscv_vle64(mask,base,vl);
+}
+
+vuint64m2_t
+test___riscv_vle64(vbool32_t mask,uint64_t* base,size_t vl)
+{
+  return __riscv_vle64(mask,base,vl);
+}
+
+vuint64m4_t
+test___riscv_vle64(vbool16_t mask,uint64_t* base,size_t vl)
+{
+  return __riscv_vle64(mask,base,vl);
+}
+
+vuint64m8_t
+test___riscv_vle64(vbool8_t mask,uint64_t* base,size_t vl)
+{
+  return __riscv_vle64(mask,base,vl);
+}
+
+vfloat64m1_t
+test___riscv_vle64(vbool64_t mask,double* base,size_t vl)
+{
+  return __riscv_vle64(mask,base,vl);
+}
+
+vfloat64m2_t
+test___riscv_vle64(vbool32_t mask,double* base,size_t vl)
+{
+  return __riscv_vle64(mask,base,vl);
+}
+
+vfloat64m4_t
+test___riscv_vle64(vbool16_t mask,double* base,size_t vl)
+{
+  return __riscv_vle64(mask,base,vl);
+}
+
+vfloat64m8_t
+test___riscv_vle64(vbool8_t mask,double* base,size_t vl)
+{
+  return __riscv_vle64(mask,base,vl);
+}
+
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf8,\s*t[au],\s*m[au]\s+vle8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf4,\s*t[au],\s*m[au]\s+vle8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf2,\s*t[au],\s*m[au]\s+vle8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m1,\s*t[au],\s*m[au]\s+vle8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m2,\s*t[au],\s*m[au]\s+vle8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m4,\s*t[au],\s*m[au]\s+vle8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m8,\s*t[au],\s*m[au]\s+vle8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf4,\s*t[au],\s*m[au]\s+vle16\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf2,\s*t[au],\s*m[au]\s+vle16\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m1,\s*t[au],\s*m[au]\s+vle16\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m2,\s*t[au],\s*m[au]\s+vle16\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m4,\s*t[au],\s*m[au]\s+vle16\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m8,\s*t[au],\s*m[au]\s+vle16\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*mf2,\s*t[au],\s*m[au]\s+vle32\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m1,\s*t[au],\s*m[au]\s+vle32\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m2,\s*t[au],\s*m[au]\s+vle32\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m4,\s*t[au],\s*m[au]\s+vle32\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m8,\s*t[au],\s*m[au]\s+vle32\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m1,\s*t[au],\s*m[au]\s+vle64\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m2,\s*t[au],\s*m[au]\s+vle64\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m4,\s*t[au],\s*m[au]\s+vle64\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m8,\s*t[au],\s*m[au]\s+vle64\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 3 } } */
diff --git a/gcc/testsuite/g++.target/riscv/rvv/base/vle_tu-1.C b/gcc/testsuite/g++.target/riscv/rvv/base/vle_tu-1.C
new file mode 100644
index 00000000000..1408f988081
--- /dev/null
+++ b/gcc/testsuite/g++.target/riscv/rvv/base/vle_tu-1.C
@@ -0,0 +1,345 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv32gcv -mabi=ilp32d -O3 -fno-schedule-insns -fno-schedule-insns2" } */
+
+#include "riscv_vector.h"
+
+vint8mf8_t
+test___riscv_vle8_tu(vint8mf8_t merge,int8_t* base,size_t vl)
+{
+  return __riscv_vle8_tu(merge,base,vl);
+}
+
+vint8mf4_t
+test___riscv_vle8_tu(vint8mf4_t merge,int8_t* base,size_t vl)
+{
+  return __riscv_vle8_tu(merge,base,vl);
+}
+
+vint8mf2_t
+test___riscv_vle8_tu(vint8mf2_t merge,int8_t* base,size_t vl)
+{
+  return __riscv_vle8_tu(merge,base,vl);
+}
+
+vint8m1_t
+test___riscv_vle8_tu(vint8m1_t merge,int8_t* base,size_t vl)
+{
+  return __riscv_vle8_tu(merge,base,vl);
+}
+
+vint8m2_t
+test___riscv_vle8_tu(vint8m2_t merge,int8_t* base,size_t vl)
+{
+  return __riscv_vle8_tu(merge,base,vl);
+}
+
+vint8m4_t
+test___riscv_vle8_tu(vint8m4_t merge,int8_t* base,size_t vl)
+{
+  return __riscv_vle8_tu(merge,base,vl);
+}
+
+vint8m8_t
+test___riscv_vle8_tu(vint8m8_t merge,int8_t* base,size_t vl)
+{
+  return __riscv_vle8_tu(merge,base,vl);
+}
+
+vuint8mf8_t
+test___riscv_vle8_tu(vuint8mf8_t merge,uint8_t* base,size_t vl)
+{
+  return __riscv_vle8_tu(merge,base,vl);
+}
+
+vuint8mf4_t
+test___riscv_vle8_tu(vuint8mf4_t merge,uint8_t* base,size_t vl)
+{
+  return __riscv_vle8_tu(merge,base,vl);
+}
+
+vuint8mf2_t
+test___riscv_vle8_tu(vuint8mf2_t merge,uint8_t* base,size_t vl)
+{
+  return __riscv_vle8_tu(merge,base,vl);
+}
+
+vuint8m1_t
+test___riscv_vle8_tu(vuint8m1_t merge,uint8_t* base,size_t vl)
+{
+  return __riscv_vle8_tu(merge,base,vl);
+}
+
+vuint8m2_t
+test___riscv_vle8_tu(vuint8m2_t merge,uint8_t* base,size_t vl)
+{
+  return __riscv_vle8_tu(merge,base,vl);
+}
+
+vuint8m4_t
+test___riscv_vle8_tu(vuint8m4_t merge,uint8_t* base,size_t vl)
+{
+  return __riscv_vle8_tu(merge,base,vl);
+}
+
+vuint8m8_t
+test___riscv_vle8_tu(vuint8m8_t merge,uint8_t* base,size_t vl)
+{
+  return __riscv_vle8_tu(merge,base,vl);
+}
+
+vint16mf4_t
+test___riscv_vle16_tu(vint16mf4_t merge,int16_t* base,size_t vl)
+{
+  return __riscv_vle16_tu(merge,base,vl);
+}
+
+vint16mf2_t
+test___riscv_vle16_tu(vint16mf2_t merge,int16_t* base,size_t vl)
+{
+  return __riscv_vle16_tu(merge,base,vl);
+}
+
+vint16m1_t
+test___riscv_vle16_tu(vint16m1_t merge,int16_t* base,size_t vl)
+{
+  return __riscv_vle16_tu(merge,base,vl);
+}
+
+vint16m2_t
+test___riscv_vle16_tu(vint16m2_t merge,int16_t* base,size_t vl)
+{
+  return __riscv_vle16_tu(merge,base,vl);
+}
+
+vint16m4_t
+test___riscv_vle16_tu(vint16m4_t merge,int16_t* base,size_t vl)
+{
+  return __riscv_vle16_tu(merge,base,vl);
+}
+
+vint16m8_t
+test___riscv_vle16_tu(vint16m8_t merge,int16_t* base,size_t vl)
+{
+  return __riscv_vle16_tu(merge,base,vl);
+}
+
+vuint16mf4_t
+test___riscv_vle16_tu(vuint16mf4_t merge,uint16_t* base,size_t vl)
+{
+  return __riscv_vle16_tu(merge,base,vl);
+}
+
+vuint16mf2_t
+test___riscv_vle16_tu(vuint16mf2_t merge,uint16_t* base,size_t vl)
+{
+  return __riscv_vle16_tu(merge,base,vl);
+}
+
+vuint16m1_t
+test___riscv_vle16_tu(vuint16m1_t merge,uint16_t* base,size_t vl)
+{
+  return __riscv_vle16_tu(merge,base,vl);
+}
+
+vuint16m2_t
+test___riscv_vle16_tu(vuint16m2_t merge,uint16_t* base,size_t vl)
+{
+  return __riscv_vle16_tu(merge,base,vl);
+}
+
+vuint16m4_t
+test___riscv_vle16_tu(vuint16m4_t merge,uint16_t* base,size_t vl)
+{
+  return __riscv_vle16_tu(merge,base,vl);
+}
+
+vuint16m8_t
+test___riscv_vle16_tu(vuint16m8_t merge,uint16_t* base,size_t vl)
+{
+  return __riscv_vle16_tu(merge,base,vl);
+}
+
+vint32mf2_t
+test___riscv_vle32_tu(vint32mf2_t merge,int32_t* base,size_t vl)
+{
+  return __riscv_vle32_tu(merge,base,vl);
+}
+
+vint32m1_t
+test___riscv_vle32_tu(vint32m1_t merge,int32_t* base,size_t vl)
+{
+  return __riscv_vle32_tu(merge,base,vl);
+}
+
+vint32m2_t
+test___riscv_vle32_tu(vint32m2_t merge,int32_t* base,size_t vl)
+{
+  return __riscv_vle32_tu(merge,base,vl);
+}
+
+vint32m4_t
+test___riscv_vle32_tu(vint32m4_t merge,int32_t* base,size_t vl)
+{
+  return __riscv_vle32_tu(merge,base,vl);
+}
+
+vint32m8_t
+test___riscv_vle32_tu(vint32m8_t merge,int32_t* base,size_t vl)
+{
+  return __riscv_vle32_tu(merge,base,vl);
+}
+
+vuint32mf2_t
+test___riscv_vle32_tu(vuint32mf2_t merge,uint32_t* base,size_t vl)
+{
+  return __riscv_vle32_tu(merge,base,vl);
+}
+
+vuint32m1_t
+test___riscv_vle32_tu(vuint32m1_t merge,uint32_t* base,size_t vl)
+{
+  return __riscv_vle32_tu(merge,base,vl);
+}
+
+vuint32m2_t
+test___riscv_vle32_tu(vuint32m2_t merge,uint32_t* base,size_t vl)
+{
+  return __riscv_vle32_tu(merge,base,vl);
+}
+
+vuint32m4_t
+test___riscv_vle32_tu(vuint32m4_t merge,uint32_t* base,size_t vl)
+{
+  return __riscv_vle32_tu(merge,base,vl);
+}
+
+vuint32m8_t
+test___riscv_vle32_tu(vuint32m8_t merge,uint32_t* base,size_t vl)
+{
+  return __riscv_vle32_tu(merge,base,vl);
+}
+
+vfloat32mf2_t
+test___riscv_vle32_tu(vfloat32mf2_t merge,float* base,size_t vl)
+{
+  return __riscv_vle32_tu(merge,base,vl);
+}
+
+vfloat32m1_t
+test___riscv_vle32_tu(vfloat32m1_t merge,float* base,size_t vl)
+{
+  return __riscv_vle32_tu(merge,base,vl);
+}
+
+vfloat32m2_t
+test___riscv_vle32_tu(vfloat32m2_t merge,float* base,size_t vl)
+{
+  return __riscv_vle32_tu(merge,base,vl);
+}
+
+vfloat32m4_t
+test___riscv_vle32_tu(vfloat32m4_t merge,float* base,size_t vl)
+{
+  return __riscv_vle32_tu(merge,base,vl);
+}
+
+vfloat32m8_t
+test___riscv_vle32_tu(vfloat32m8_t merge,float* base,size_t vl)
+{
+  return __riscv_vle32_tu(merge,base,vl);
+}
+
+vint64m1_t
+test___riscv_vle64_tu(vint64m1_t merge,int64_t* base,size_t vl)
+{
+  return __riscv_vle64_tu(merge,base,vl);
+}
+
+vint64m2_t
+test___riscv_vle64_tu(vint64m2_t merge,int64_t* base,size_t vl)
+{
+  return __riscv_vle64_tu(merge,base,vl);
+}
+
+vint64m4_t
+test___riscv_vle64_tu(vint64m4_t merge,int64_t* base,size_t vl)
+{
+  return __riscv_vle64_tu(merge,base,vl);
+}
+
+vint64m8_t
+test___riscv_vle64_tu(vint64m8_t merge,int64_t* base,size_t vl)
+{
+  return __riscv_vle64_tu(merge,base,vl);
+}
+
+vuint64m1_t
+test___riscv_vle64_tu(vuint64m1_t merge,uint64_t* base,size_t vl)
+{
+  return __riscv_vle64_tu(merge,base,vl);
+}
+
+vuint64m2_t
+test___riscv_vle64_tu(vuint64m2_t merge,uint64_t* base,size_t vl)
+{
+  return __riscv_vle64_tu(merge,base,vl);
+}
+
+vuint64m4_t
+test___riscv_vle64_tu(vuint64m4_t merge,uint64_t* base,size_t vl)
+{
+  return __riscv_vle64_tu(merge,base,vl);
+}
+
+vuint64m8_t
+test___riscv_vle64_tu(vuint64m8_t merge,uint64_t* base,size_t vl)
+{
+  return __riscv_vle64_tu(merge,base,vl);
+}
+
+vfloat64m1_t
+test___riscv_vle64_tu(vfloat64m1_t merge,double* base,size_t vl)
+{
+  return __riscv_vle64_tu(merge,base,vl);
+}
+
+vfloat64m2_t
+test___riscv_vle64_tu(vfloat64m2_t merge,double* base,size_t vl)
+{
+  return __riscv_vle64_tu(merge,base,vl);
+}
+
+vfloat64m4_t
+test___riscv_vle64_tu(vfloat64m4_t merge,double* base,size_t vl)
+{
+  return __riscv_vle64_tu(merge,base,vl);
+}
+
+vfloat64m8_t
+test___riscv_vle64_tu(vfloat64m8_t merge,double* base,size_t vl)
+{
+  return __riscv_vle64_tu(merge,base,vl);
+}
+
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf8,\s*tu,\s*m[au]\s+vle8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf4,\s*tu,\s*m[au]\s+vle8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf2,\s*tu,\s*m[au]\s+vle8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m1,\s*tu,\s*m[au]\s+vle8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m2,\s*tu,\s*m[au]\s+vle8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m4,\s*tu,\s*m[au]\s+vle8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m8,\s*tu,\s*m[au]\s+vle8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf4,\s*tu,\s*m[au]\s+vle16\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf2,\s*tu,\s*m[au]\s+vle16\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m1,\s*tu,\s*m[au]\s+vle16\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m2,\s*tu,\s*m[au]\s+vle16\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m4,\s*tu,\s*m[au]\s+vle16\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m8,\s*tu,\s*m[au]\s+vle16\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*mf2,\s*tu,\s*m[au]\s+vle32\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m1,\s*tu,\s*m[au]\s+vle32\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m2,\s*tu,\s*m[au]\s+vle32\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m4,\s*tu,\s*m[au]\s+vle32\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m8,\s*tu,\s*m[au]\s+vle32\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m1,\s*tu,\s*m[au]\s+vle64\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m2,\s*tu,\s*m[au]\s+vle64\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m4,\s*tu,\s*m[au]\s+vle64\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m8,\s*tu,\s*m[au]\s+vle64\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)} 3 } } */
diff --git a/gcc/testsuite/g++.target/riscv/rvv/base/vle_tum-1.C b/gcc/testsuite/g++.target/riscv/rvv/base/vle_tum-1.C
new file mode 100644
index 00000000000..7449744663e
--- /dev/null
+++ b/gcc/testsuite/g++.target/riscv/rvv/base/vle_tum-1.C
@@ -0,0 +1,345 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv32gcv -mabi=ilp32d -O3 -fno-schedule-insns -fno-schedule-insns2" } */
+
+#include "riscv_vector.h"
+
+vint8mf8_t
+test___riscv_vle8_tum(vbool64_t mask,vint8mf8_t merge,int8_t* base,size_t vl)
+{
+  return __riscv_vle8_tum(mask,merge,base,vl);
+}
+
+vint8mf4_t
+test___riscv_vle8_tum(vbool32_t mask,vint8mf4_t merge,int8_t* base,size_t vl)
+{
+  return __riscv_vle8_tum(mask,merge,base,vl);
+}
+
+vint8mf2_t
+test___riscv_vle8_tum(vbool16_t mask,vint8mf2_t merge,int8_t* base,size_t vl)
+{
+  return __riscv_vle8_tum(mask,merge,base,vl);
+}
+
+vint8m1_t
+test___riscv_vle8_tum(vbool8_t mask,vint8m1_t merge,int8_t* base,size_t vl)
+{
+  return __riscv_vle8_tum(mask,merge,base,vl);
+}
+
+vint8m2_t
+test___riscv_vle8_tum(vbool4_t mask,vint8m2_t merge,int8_t* base,size_t vl)
+{
+  return __riscv_vle8_tum(mask,merge,base,vl);
+}
+
+vint8m4_t
+test___riscv_vle8_tum(vbool2_t mask,vint8m4_t merge,int8_t* base,size_t vl)
+{
+  return __riscv_vle8_tum(mask,merge,base,vl);
+}
+
+vint8m8_t
+test___riscv_vle8_tum(vbool1_t mask,vint8m8_t merge,int8_t* base,size_t vl)
+{
+  return __riscv_vle8_tum(mask,merge,base,vl);
+}
+
+vuint8mf8_t
+test___riscv_vle8_tum(vbool64_t mask,vuint8mf8_t merge,uint8_t* base,size_t vl)
+{
+  return __riscv_vle8_tum(mask,merge,base,vl);
+}
+
+vuint8mf4_t
+test___riscv_vle8_tum(vbool32_t mask,vuint8mf4_t merge,uint8_t* base,size_t vl)
+{
+  return __riscv_vle8_tum(mask,merge,base,vl);
+}
+
+vuint8mf2_t
+test___riscv_vle8_tum(vbool16_t mask,vuint8mf2_t merge,uint8_t* base,size_t vl)
+{
+  return __riscv_vle8_tum(mask,merge,base,vl);
+}
+
+vuint8m1_t
+test___riscv_vle8_tum(vbool8_t mask,vuint8m1_t merge,uint8_t* base,size_t vl)
+{
+  return __riscv_vle8_tum(mask,merge,base,vl);
+}
+
+vuint8m2_t
+test___riscv_vle8_tum(vbool4_t mask,vuint8m2_t merge,uint8_t* base,size_t vl)
+{
+  return __riscv_vle8_tum(mask,merge,base,vl);
+}
+
+vuint8m4_t
+test___riscv_vle8_tum(vbool2_t mask,vuint8m4_t merge,uint8_t* base,size_t vl)
+{
+  return __riscv_vle8_tum(mask,merge,base,vl);
+}
+
+vuint8m8_t
+test___riscv_vle8_tum(vbool1_t mask,vuint8m8_t merge,uint8_t* base,size_t vl)
+{
+  return __riscv_vle8_tum(mask,merge,base,vl);
+}
+
+vint16mf4_t
+test___riscv_vle16_tum(vbool64_t mask,vint16mf4_t merge,int16_t* base,size_t vl)
+{
+  return __riscv_vle16_tum(mask,merge,base,vl);
+}
+
+vint16mf2_t
+test___riscv_vle16_tum(vbool32_t mask,vint16mf2_t merge,int16_t* base,size_t vl)
+{
+  return __riscv_vle16_tum(mask,merge,base,vl);
+}
+
+vint16m1_t
+test___riscv_vle16_tum(vbool16_t mask,vint16m1_t merge,int16_t* base,size_t vl)
+{
+  return __riscv_vle16_tum(mask,merge,base,vl);
+}
+
+vint16m2_t
+test___riscv_vle16_tum(vbool8_t mask,vint16m2_t merge,int16_t* base,size_t vl)
+{
+  return __riscv_vle16_tum(mask,merge,base,vl);
+}
+
+vint16m4_t
+test___riscv_vle16_tum(vbool4_t mask,vint16m4_t merge,int16_t* base,size_t vl)
+{
+  return __riscv_vle16_tum(mask,merge,base,vl);
+}
+
+vint16m8_t
+test___riscv_vle16_tum(vbool2_t mask,vint16m8_t merge,int16_t* base,size_t vl)
+{
+  return __riscv_vle16_tum(mask,merge,base,vl);
+}
+
+vuint16mf4_t
+test___riscv_vle16_tum(vbool64_t mask,vuint16mf4_t merge,uint16_t* base,size_t vl)
+{
+  return __riscv_vle16_tum(mask,merge,base,vl);
+}
+
+vuint16mf2_t
+test___riscv_vle16_tum(vbool32_t mask,vuint16mf2_t merge,uint16_t* base,size_t vl)
+{
+  return __riscv_vle16_tum(mask,merge,base,vl);
+}
+
+vuint16m1_t
+test___riscv_vle16_tum(vbool16_t mask,vuint16m1_t merge,uint16_t* base,size_t vl)
+{
+  return __riscv_vle16_tum(mask,merge,base,vl);
+}
+
+vuint16m2_t
+test___riscv_vle16_tum(vbool8_t mask,vuint16m2_t merge,uint16_t* base,size_t vl)
+{
+  return __riscv_vle16_tum(mask,merge,base,vl);
+}
+
+vuint16m4_t
+test___riscv_vle16_tum(vbool4_t mask,vuint16m4_t merge,uint16_t* base,size_t vl)
+{
+  return __riscv_vle16_tum(mask,merge,base,vl);
+}
+
+vuint16m8_t
+test___riscv_vle16_tum(vbool2_t mask,vuint16m8_t merge,uint16_t* base,size_t vl)
+{
+  return __riscv_vle16_tum(mask,merge,base,vl);
+}
+
+vint32mf2_t
+test___riscv_vle32_tum(vbool64_t mask,vint32mf2_t merge,int32_t* base,size_t vl)
+{
+  return __riscv_vle32_tum(mask,merge,base,vl);
+}
+
+vint32m1_t
+test___riscv_vle32_tum(vbool32_t mask,vint32m1_t merge,int32_t* base,size_t vl)
+{
+  return __riscv_vle32_tum(mask,merge,base,vl);
+}
+
+vint32m2_t
+test___riscv_vle32_tum(vbool16_t mask,vint32m2_t merge,int32_t* base,size_t vl)
+{
+  return __riscv_vle32_tum(mask,merge,base,vl);
+}
+
+vint32m4_t
+test___riscv_vle32_tum(vbool8_t mask,vint32m4_t merge,int32_t* base,size_t vl)
+{
+  return __riscv_vle32_tum(mask,merge,base,vl);
+}
+
+vint32m8_t
+test___riscv_vle32_tum(vbool4_t mask,vint32m8_t merge,int32_t* base,size_t vl)
+{
+  return __riscv_vle32_tum(mask,merge,base,vl);
+}
+
+vuint32mf2_t
+test___riscv_vle32_tum(vbool64_t mask,vuint32mf2_t merge,uint32_t* base,size_t vl)
+{
+  return __riscv_vle32_tum(mask,merge,base,vl);
+}
+
+vuint32m1_t
+test___riscv_vle32_tum(vbool32_t mask,vuint32m1_t merge,uint32_t* base,size_t vl)
+{
+  return __riscv_vle32_tum(mask,merge,base,vl);
+}
+
+vuint32m2_t
+test___riscv_vle32_tum(vbool16_t mask,vuint32m2_t merge,uint32_t* base,size_t vl)
+{
+  return __riscv_vle32_tum(mask,merge,base,vl);
+}
+
+vuint32m4_t
+test___riscv_vle32_tum(vbool8_t mask,vuint32m4_t merge,uint32_t* base,size_t vl)
+{
+  return __riscv_vle32_tum(mask,merge,base,vl);
+}
+
+vuint32m8_t
+test___riscv_vle32_tum(vbool4_t mask,vuint32m8_t merge,uint32_t* base,size_t vl)
+{
+  return __riscv_vle32_tum(mask,merge,base,vl);
+}
+
+vfloat32mf2_t
+test___riscv_vle32_tum(vbool64_t mask,vfloat32mf2_t merge,float* base,size_t vl)
+{
+  return __riscv_vle32_tum(mask,merge,base,vl);
+}
+
+vfloat32m1_t
+test___riscv_vle32_tum(vbool32_t mask,vfloat32m1_t merge,float* base,size_t vl)
+{
+  return __riscv_vle32_tum(mask,merge,base,vl);
+}
+
+vfloat32m2_t
+test___riscv_vle32_tum(vbool16_t mask,vfloat32m2_t merge,float* base,size_t vl)
+{
+  return __riscv_vle32_tum(mask,merge,base,vl);
+}
+
+vfloat32m4_t
+test___riscv_vle32_tum(vbool8_t mask,vfloat32m4_t merge,float* base,size_t vl)
+{
+  return __riscv_vle32_tum(mask,merge,base,vl);
+}
+
+vfloat32m8_t
+test___riscv_vle32_tum(vbool4_t mask,vfloat32m8_t merge,float* base,size_t vl)
+{
+  return __riscv_vle32_tum(mask,merge,base,vl);
+}
+
+vint64m1_t
+test___riscv_vle64_tum(vbool64_t mask,vint64m1_t merge,int64_t* base,size_t vl)
+{
+  return __riscv_vle64_tum(mask,merge,base,vl);
+}
+
+vint64m2_t
+test___riscv_vle64_tum(vbool32_t mask,vint64m2_t merge,int64_t* base,size_t vl)
+{
+  return __riscv_vle64_tum(mask,merge,base,vl);
+}
+
+vint64m4_t
+test___riscv_vle64_tum(vbool16_t mask,vint64m4_t merge,int64_t* base,size_t vl)
+{
+  return __riscv_vle64_tum(mask,merge,base,vl);
+}
+
+vint64m8_t
+test___riscv_vle64_tum(vbool8_t mask,vint64m8_t merge,int64_t* base,size_t vl)
+{
+  return __riscv_vle64_tum(mask,merge,base,vl);
+}
+
+vuint64m1_t
+test___riscv_vle64_tum(vbool64_t mask,vuint64m1_t merge,uint64_t* base,size_t vl)
+{
+  return __riscv_vle64_tum(mask,merge,base,vl);
+}
+
+vuint64m2_t
+test___riscv_vle64_tum(vbool32_t mask,vuint64m2_t merge,uint64_t* base,size_t vl)
+{
+  return __riscv_vle64_tum(mask,merge,base,vl);
+}
+
+vuint64m4_t
+test___riscv_vle64_tum(vbool16_t mask,vuint64m4_t merge,uint64_t* base,size_t vl)
+{
+  return __riscv_vle64_tum(mask,merge,base,vl);
+}
+
+vuint64m8_t
+test___riscv_vle64_tum(vbool8_t mask,vuint64m8_t merge,uint64_t* base,size_t vl)
+{
+  return __riscv_vle64_tum(mask,merge,base,vl);
+}
+
+vfloat64m1_t
+test___riscv_vle64_tum(vbool64_t mask,vfloat64m1_t merge,double* base,size_t vl)
+{
+  return __riscv_vle64_tum(mask,merge,base,vl);
+}
+
+vfloat64m2_t
+test___riscv_vle64_tum(vbool32_t mask,vfloat64m2_t merge,double* base,size_t vl)
+{
+  return __riscv_vle64_tum(mask,merge,base,vl);
+}
+
+vfloat64m4_t
+test___riscv_vle64_tum(vbool16_t mask,vfloat64m4_t merge,double* base,size_t vl)
+{
+  return __riscv_vle64_tum(mask,merge,base,vl);
+}
+
+vfloat64m8_t
+test___riscv_vle64_tum(vbool8_t mask,vfloat64m8_t merge,double* base,size_t vl)
+{
+  return __riscv_vle64_tum(mask,merge,base,vl);
+}
+
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf8,\s*tu,\s*m[au]\s+vle8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf4,\s*tu,\s*m[au]\s+vle8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf2,\s*tu,\s*m[au]\s+vle8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m1,\s*tu,\s*m[au]\s+vle8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m2,\s*tu,\s*m[au]\s+vle8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m4,\s*tu,\s*m[au]\s+vle8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m8,\s*tu,\s*m[au]\s+vle8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf4,\s*tu,\s*m[au]\s+vle16\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf2,\s*tu,\s*m[au]\s+vle16\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m1,\s*tu,\s*m[au]\s+vle16\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m2,\s*tu,\s*m[au]\s+vle16\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m4,\s*tu,\s*m[au]\s+vle16\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m8,\s*tu,\s*m[au]\s+vle16\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*mf2,\s*tu,\s*m[au]\s+vle32\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m1,\s*tu,\s*m[au]\s+vle32\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m2,\s*tu,\s*m[au]\s+vle32\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m4,\s*tu,\s*m[au]\s+vle32\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m8,\s*tu,\s*m[au]\s+vle32\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m1,\s*tu,\s*m[au]\s+vle64\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m2,\s*tu,\s*m[au]\s+vle64\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m4,\s*tu,\s*m[au]\s+vle64\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m8,\s*tu,\s*m[au]\s+vle64\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 3 } } */
diff --git a/gcc/testsuite/g++.target/riscv/rvv/base/vle_tumu-1.C b/gcc/testsuite/g++.target/riscv/rvv/base/vle_tumu-1.C
new file mode 100644
index 00000000000..a9a260357d3
--- /dev/null
+++ b/gcc/testsuite/g++.target/riscv/rvv/base/vle_tumu-1.C
@@ -0,0 +1,345 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv32gcv -mabi=ilp32d -O3 -fno-schedule-insns -fno-schedule-insns2" } */
+
+#include "riscv_vector.h"
+
+vint8mf8_t
+test___riscv_vle8_tumu(vbool64_t mask,vint8mf8_t merge,int8_t* base,size_t vl)
+{
+  return __riscv_vle8_tumu(mask,merge,base,vl);
+}
+
+vint8mf4_t
+test___riscv_vle8_tumu(vbool32_t mask,vint8mf4_t merge,int8_t* base,size_t vl)
+{
+  return __riscv_vle8_tumu(mask,merge,base,vl);
+}
+
+vint8mf2_t
+test___riscv_vle8_tumu(vbool16_t mask,vint8mf2_t merge,int8_t* base,size_t vl)
+{
+  return __riscv_vle8_tumu(mask,merge,base,vl);
+}
+
+vint8m1_t
+test___riscv_vle8_tumu(vbool8_t mask,vint8m1_t merge,int8_t* base,size_t vl)
+{
+  return __riscv_vle8_tumu(mask,merge,base,vl);
+}
+
+vint8m2_t
+test___riscv_vle8_tumu(vbool4_t mask,vint8m2_t merge,int8_t* base,size_t vl)
+{
+  return __riscv_vle8_tumu(mask,merge,base,vl);
+}
+
+vint8m4_t
+test___riscv_vle8_tumu(vbool2_t mask,vint8m4_t merge,int8_t* base,size_t vl)
+{
+  return __riscv_vle8_tumu(mask,merge,base,vl);
+}
+
+vint8m8_t
+test___riscv_vle8_tumu(vbool1_t mask,vint8m8_t merge,int8_t* base,size_t vl)
+{
+  return __riscv_vle8_tumu(mask,merge,base,vl);
+}
+
+vuint8mf8_t
+test___riscv_vle8_tumu(vbool64_t mask,vuint8mf8_t merge,uint8_t* base,size_t vl)
+{
+  return __riscv_vle8_tumu(mask,merge,base,vl);
+}
+
+vuint8mf4_t
+test___riscv_vle8_tumu(vbool32_t mask,vuint8mf4_t merge,uint8_t* base,size_t vl)
+{
+  return __riscv_vle8_tumu(mask,merge,base,vl);
+}
+
+vuint8mf2_t
+test___riscv_vle8_tumu(vbool16_t mask,vuint8mf2_t merge,uint8_t* base,size_t vl)
+{
+  return __riscv_vle8_tumu(mask,merge,base,vl);
+}
+
+vuint8m1_t
+test___riscv_vle8_tumu(vbool8_t mask,vuint8m1_t merge,uint8_t* base,size_t vl)
+{
+  return __riscv_vle8_tumu(mask,merge,base,vl);
+}
+
+vuint8m2_t
+test___riscv_vle8_tumu(vbool4_t mask,vuint8m2_t merge,uint8_t* base,size_t vl)
+{
+  return __riscv_vle8_tumu(mask,merge,base,vl);
+}
+
+vuint8m4_t
+test___riscv_vle8_tumu(vbool2_t mask,vuint8m4_t merge,uint8_t* base,size_t vl)
+{
+  return __riscv_vle8_tumu(mask,merge,base,vl);
+}
+
+vuint8m8_t
+test___riscv_vle8_tumu(vbool1_t mask,vuint8m8_t merge,uint8_t* base,size_t vl)
+{
+  return __riscv_vle8_tumu(mask,merge,base,vl);
+}
+
+vint16mf4_t
+test___riscv_vle16_tumu(vbool64_t mask,vint16mf4_t merge,int16_t* base,size_t vl)
+{
+  return __riscv_vle16_tumu(mask,merge,base,vl);
+}
+
+vint16mf2_t
+test___riscv_vle16_tumu(vbool32_t mask,vint16mf2_t merge,int16_t* base,size_t vl)
+{
+  return __riscv_vle16_tumu(mask,merge,base,vl);
+}
+
+vint16m1_t
+test___riscv_vle16_tumu(vbool16_t mask,vint16m1_t merge,int16_t* base,size_t vl)
+{
+  return __riscv_vle16_tumu(mask,merge,base,vl);
+}
+
+vint16m2_t
+test___riscv_vle16_tumu(vbool8_t mask,vint16m2_t merge,int16_t* base,size_t vl)
+{
+  return __riscv_vle16_tumu(mask,merge,base,vl);
+}
+
+vint16m4_t
+test___riscv_vle16_tumu(vbool4_t mask,vint16m4_t merge,int16_t* base,size_t vl)
+{
+  return __riscv_vle16_tumu(mask,merge,base,vl);
+}
+
+vint16m8_t
+test___riscv_vle16_tumu(vbool2_t mask,vint16m8_t merge,int16_t* base,size_t vl)
+{
+  return __riscv_vle16_tumu(mask,merge,base,vl);
+}
+
+vuint16mf4_t
+test___riscv_vle16_tumu(vbool64_t mask,vuint16mf4_t merge,uint16_t* base,size_t vl)
+{
+  return __riscv_vle16_tumu(mask,merge,base,vl);
+}
+
+vuint16mf2_t
+test___riscv_vle16_tumu(vbool32_t mask,vuint16mf2_t merge,uint16_t* base,size_t vl)
+{
+  return __riscv_vle16_tumu(mask,merge,base,vl);
+}
+
+vuint16m1_t
+test___riscv_vle16_tumu(vbool16_t mask,vuint16m1_t merge,uint16_t* base,size_t vl)
+{
+  return __riscv_vle16_tumu(mask,merge,base,vl);
+}
+
+vuint16m2_t
+test___riscv_vle16_tumu(vbool8_t mask,vuint16m2_t merge,uint16_t* base,size_t vl)
+{
+  return __riscv_vle16_tumu(mask,merge,base,vl);
+}
+
+vuint16m4_t
+test___riscv_vle16_tumu(vbool4_t mask,vuint16m4_t merge,uint16_t* base,size_t vl)
+{
+  return __riscv_vle16_tumu(mask,merge,base,vl);
+}
+
+vuint16m8_t
+test___riscv_vle16_tumu(vbool2_t mask,vuint16m8_t merge,uint16_t* base,size_t vl)
+{
+  return __riscv_vle16_tumu(mask,merge,base,vl);
+}
+
+vint32mf2_t
+test___riscv_vle32_tumu(vbool64_t mask,vint32mf2_t merge,int32_t* base,size_t vl)
+{
+  return __riscv_vle32_tumu(mask,merge,base,vl);
+}
+
+vint32m1_t
+test___riscv_vle32_tumu(vbool32_t mask,vint32m1_t merge,int32_t* base,size_t vl)
+{
+  return __riscv_vle32_tumu(mask,merge,base,vl);
+}
+
+vint32m2_t
+test___riscv_vle32_tumu(vbool16_t mask,vint32m2_t merge,int32_t* base,size_t vl)
+{
+  return __riscv_vle32_tumu(mask,merge,base,vl);
+}
+
+vint32m4_t
+test___riscv_vle32_tumu(vbool8_t mask,vint32m4_t merge,int32_t* base,size_t vl)
+{
+  return __riscv_vle32_tumu(mask,merge,base,vl);
+}
+
+vint32m8_t
+test___riscv_vle32_tumu(vbool4_t mask,vint32m8_t merge,int32_t* base,size_t vl)
+{
+  return __riscv_vle32_tumu(mask,merge,base,vl);
+}
+
+vuint32mf2_t
+test___riscv_vle32_tumu(vbool64_t mask,vuint32mf2_t merge,uint32_t* base,size_t vl)
+{
+  return __riscv_vle32_tumu(mask,merge,base,vl);
+}
+
+vuint32m1_t
+test___riscv_vle32_tumu(vbool32_t mask,vuint32m1_t merge,uint32_t* base,size_t vl)
+{
+  return __riscv_vle32_tumu(mask,merge,base,vl);
+}
+
+vuint32m2_t
+test___riscv_vle32_tumu(vbool16_t mask,vuint32m2_t merge,uint32_t* base,size_t vl)
+{
+  return __riscv_vle32_tumu(mask,merge,base,vl);
+}
+
+vuint32m4_t
+test___riscv_vle32_tumu(vbool8_t mask,vuint32m4_t merge,uint32_t* base,size_t vl)
+{
+  return __riscv_vle32_tumu(mask,merge,base,vl);
+}
+
+vuint32m8_t
+test___riscv_vle32_tumu(vbool4_t mask,vuint32m8_t merge,uint32_t* base,size_t vl)
+{
+  return __riscv_vle32_tumu(mask,merge,base,vl);
+}
+
+vfloat32mf2_t
+test___riscv_vle32_tumu(vbool64_t mask,vfloat32mf2_t merge,float* base,size_t vl)
+{
+  return __riscv_vle32_tumu(mask,merge,base,vl);
+}
+
+vfloat32m1_t
+test___riscv_vle32_tumu(vbool32_t mask,vfloat32m1_t merge,float* base,size_t vl)
+{
+  return __riscv_vle32_tumu(mask,merge,base,vl);
+}
+
+vfloat32m2_t
+test___riscv_vle32_tumu(vbool16_t mask,vfloat32m2_t merge,float* base,size_t vl)
+{
+  return __riscv_vle32_tumu(mask,merge,base,vl);
+}
+
+vfloat32m4_t
+test___riscv_vle32_tumu(vbool8_t mask,vfloat32m4_t merge,float* base,size_t vl)
+{
+  return __riscv_vle32_tumu(mask,merge,base,vl);
+}
+
+vfloat32m8_t
+test___riscv_vle32_tumu(vbool4_t mask,vfloat32m8_t merge,float* base,size_t vl)
+{
+  return __riscv_vle32_tumu(mask,merge,base,vl);
+}
+
+vint64m1_t
+test___riscv_vle64_tumu(vbool64_t mask,vint64m1_t merge,int64_t* base,size_t vl)
+{
+  return __riscv_vle64_tumu(mask,merge,base,vl);
+}
+
+vint64m2_t
+test___riscv_vle64_tumu(vbool32_t mask,vint64m2_t merge,int64_t* base,size_t vl)
+{
+  return __riscv_vle64_tumu(mask,merge,base,vl);
+}
+
+vint64m4_t
+test___riscv_vle64_tumu(vbool16_t mask,vint64m4_t merge,int64_t* base,size_t vl)
+{
+  return __riscv_vle64_tumu(mask,merge,base,vl);
+}
+
+vint64m8_t
+test___riscv_vle64_tumu(vbool8_t mask,vint64m8_t merge,int64_t* base,size_t vl)
+{
+  return __riscv_vle64_tumu(mask,merge,base,vl);
+}
+
+vuint64m1_t
+test___riscv_vle64_tumu(vbool64_t mask,vuint64m1_t merge,uint64_t* base,size_t vl)
+{
+  return __riscv_vle64_tumu(mask,merge,base,vl);
+}
+
+vuint64m2_t
+test___riscv_vle64_tumu(vbool32_t mask,vuint64m2_t merge,uint64_t* base,size_t vl)
+{
+  return __riscv_vle64_tumu(mask,merge,base,vl);
+}
+
+vuint64m4_t
+test___riscv_vle64_tumu(vbool16_t mask,vuint64m4_t merge,uint64_t* base,size_t vl)
+{
+  return __riscv_vle64_tumu(mask,merge,base,vl);
+}
+
+vuint64m8_t
+test___riscv_vle64_tumu(vbool8_t mask,vuint64m8_t merge,uint64_t* base,size_t vl)
+{
+  return __riscv_vle64_tumu(mask,merge,base,vl);
+}
+
+vfloat64m1_t
+test___riscv_vle64_tumu(vbool64_t mask,vfloat64m1_t merge,double* base,size_t vl)
+{
+  return __riscv_vle64_tumu(mask,merge,base,vl);
+}
+
+vfloat64m2_t
+test___riscv_vle64_tumu(vbool32_t mask,vfloat64m2_t merge,double* base,size_t vl)
+{
+  return __riscv_vle64_tumu(mask,merge,base,vl);
+}
+
+vfloat64m4_t
+test___riscv_vle64_tumu(vbool16_t mask,vfloat64m4_t merge,double* base,size_t vl)
+{
+  return __riscv_vle64_tumu(mask,merge,base,vl);
+}
+
+vfloat64m8_t
+test___riscv_vle64_tumu(vbool8_t mask,vfloat64m8_t merge,double* base,size_t vl)
+{
+  return __riscv_vle64_tumu(mask,merge,base,vl);
+}
+
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf8,\s*tu,\s*mu\s+vle8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf4,\s*tu,\s*mu\s+vle8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf2,\s*tu,\s*mu\s+vle8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m1,\s*tu,\s*mu\s+vle8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m2,\s*tu,\s*mu\s+vle8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m4,\s*tu,\s*mu\s+vle8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m8,\s*tu,\s*mu\s+vle8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf4,\s*tu,\s*mu\s+vle16\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf2,\s*tu,\s*mu\s+vle16\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m1,\s*tu,\s*mu\s+vle16\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m2,\s*tu,\s*mu\s+vle16\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m4,\s*tu,\s*mu\s+vle16\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m8,\s*tu,\s*mu\s+vle16\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*mf2,\s*tu,\s*mu\s+vle32\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m1,\s*tu,\s*mu\s+vle32\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m2,\s*tu,\s*mu\s+vle32\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m4,\s*tu,\s*mu\s+vle32\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m8,\s*tu,\s*mu\s+vle32\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m1,\s*tu,\s*mu\s+vle64\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m2,\s*tu,\s*mu\s+vle64\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m4,\s*tu,\s*mu\s+vle64\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m8,\s*tu,\s*mu\s+vle64\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 3 } } */
diff --git a/gcc/testsuite/g++.target/riscv/rvv/base/vse-1.C b/gcc/testsuite/g++.target/riscv/rvv/base/vse-1.C
new file mode 100644
index 00000000000..8b969dc718f
--- /dev/null
+++ b/gcc/testsuite/g++.target/riscv/rvv/base/vse-1.C
@@ -0,0 +1,685 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv32gcv -mabi=ilp32d -O3 -fno-schedule-insns -fno-schedule-insns2" } */
+
+#include "riscv_vector.h"
+
+void
+test___riscv_vse8(int8_t* base,vint8mf8_t value,size_t vl)
+{
+  __riscv_vse8(base,value,vl);
+}
+
+void
+test___riscv_vse8(int8_t* base,vint8mf4_t value,size_t vl)
+{
+  __riscv_vse8(base,value,vl);
+}
+
+void
+test___riscv_vse8(int8_t* base,vint8mf2_t value,size_t vl)
+{
+  __riscv_vse8(base,value,vl);
+}
+
+void
+test___riscv_vse8(int8_t* base,vint8m1_t value,size_t vl)
+{
+  __riscv_vse8(base,value,vl);
+}
+
+void
+test___riscv_vse8(int8_t* base,vint8m2_t value,size_t vl)
+{
+  __riscv_vse8(base,value,vl);
+}
+
+void
+test___riscv_vse8(int8_t* base,vint8m4_t value,size_t vl)
+{
+  __riscv_vse8(base,value,vl);
+}
+
+void
+test___riscv_vse8(int8_t* base,vint8m8_t value,size_t vl)
+{
+  __riscv_vse8(base,value,vl);
+}
+
+void
+test___riscv_vse8(uint8_t* base,vuint8mf8_t value,size_t vl)
+{
+  __riscv_vse8(base,value,vl);
+}
+
+void
+test___riscv_vse8(uint8_t* base,vuint8mf4_t value,size_t vl)
+{
+  __riscv_vse8(base,value,vl);
+}
+
+void
+test___riscv_vse8(uint8_t* base,vuint8mf2_t value,size_t vl)
+{
+  __riscv_vse8(base,value,vl);
+}
+
+void
+test___riscv_vse8(uint8_t* base,vuint8m1_t value,size_t vl)
+{
+  __riscv_vse8(base,value,vl);
+}
+
+void
+test___riscv_vse8(uint8_t* base,vuint8m2_t value,size_t vl)
+{
+  __riscv_vse8(base,value,vl);
+}
+
+void
+test___riscv_vse8(uint8_t* base,vuint8m4_t value,size_t vl)
+{
+  __riscv_vse8(base,value,vl);
+}
+
+void
+test___riscv_vse8(uint8_t* base,vuint8m8_t value,size_t vl)
+{
+  __riscv_vse8(base,value,vl);
+}
+
+void
+test___riscv_vse8(vbool64_t mask,int8_t* base,vint8mf8_t value,size_t vl)
+{
+  __riscv_vse8(mask,base,value,vl);
+}
+
+void
+test___riscv_vse8(vbool32_t mask,int8_t* base,vint8mf4_t value,size_t vl)
+{
+  __riscv_vse8(mask,base,value,vl);
+}
+
+void
+test___riscv_vse8(vbool16_t mask,int8_t* base,vint8mf2_t value,size_t vl)
+{
+  __riscv_vse8(mask,base,value,vl);
+}
+
+void
+test___riscv_vse8(vbool8_t mask,int8_t* base,vint8m1_t value,size_t vl)
+{
+  __riscv_vse8(mask,base,value,vl);
+}
+
+void
+test___riscv_vse8(vbool4_t mask,int8_t* base,vint8m2_t value,size_t vl)
+{
+  __riscv_vse8(mask,base,value,vl);
+}
+
+void
+test___riscv_vse8(vbool2_t mask,int8_t* base,vint8m4_t value,size_t vl)
+{
+  __riscv_vse8(mask,base,value,vl);
+}
+
+void
+test___riscv_vse8(vbool1_t mask,int8_t* base,vint8m8_t value,size_t vl)
+{
+  __riscv_vse8(mask,base,value,vl);
+}
+
+void
+test___riscv_vse8(vbool64_t mask,uint8_t* base,vuint8mf8_t value,size_t vl)
+{
+  __riscv_vse8(mask,base,value,vl);
+}
+
+void
+test___riscv_vse8(vbool32_t mask,uint8_t* base,vuint8mf4_t value,size_t vl)
+{
+  __riscv_vse8(mask,base,value,vl);
+}
+
+void
+test___riscv_vse8(vbool16_t mask,uint8_t* base,vuint8mf2_t value,size_t vl)
+{
+  __riscv_vse8(mask,base,value,vl);
+}
+
+void
+test___riscv_vse8(vbool8_t mask,uint8_t* base,vuint8m1_t value,size_t vl)
+{
+  __riscv_vse8(mask,base,value,vl);
+}
+
+void
+test___riscv_vse8(vbool4_t mask,uint8_t* base,vuint8m2_t value,size_t vl)
+{
+  __riscv_vse8(mask,base,value,vl);
+}
+
+void
+test___riscv_vse8(vbool2_t mask,uint8_t* base,vuint8m4_t value,size_t vl)
+{
+  __riscv_vse8(mask,base,value,vl);
+}
+
+void
+test___riscv_vse8(vbool1_t mask,uint8_t* base,vuint8m8_t value,size_t vl)
+{
+  __riscv_vse8(mask,base,value,vl);
+}
+
+void
+test___riscv_vse16(int16_t* base,vint16mf4_t value,size_t vl)
+{
+  __riscv_vse16(base,value,vl);
+}
+
+void
+test___riscv_vse16(int16_t* base,vint16mf2_t value,size_t vl)
+{
+  __riscv_vse16(base,value,vl);
+}
+
+void
+test___riscv_vse16(int16_t* base,vint16m1_t value,size_t vl)
+{
+  __riscv_vse16(base,value,vl);
+}
+
+void
+test___riscv_vse16(int16_t* base,vint16m2_t value,size_t vl)
+{
+  __riscv_vse16(base,value,vl);
+}
+
+void
+test___riscv_vse16(int16_t* base,vint16m4_t value,size_t vl)
+{
+  __riscv_vse16(base,value,vl);
+}
+
+void
+test___riscv_vse16(int16_t* base,vint16m8_t value,size_t vl)
+{
+  __riscv_vse16(base,value,vl);
+}
+
+void
+test___riscv_vse16(uint16_t* base,vuint16mf4_t value,size_t vl)
+{
+  __riscv_vse16(base,value,vl);
+}
+
+void
+test___riscv_vse16(uint16_t* base,vuint16mf2_t value,size_t vl)
+{
+  __riscv_vse16(base,value,vl);
+}
+
+void
+test___riscv_vse16(uint16_t* base,vuint16m1_t value,size_t vl)
+{
+  __riscv_vse16(base,value,vl);
+}
+
+void
+test___riscv_vse16(uint16_t* base,vuint16m2_t value,size_t vl)
+{
+  __riscv_vse16(base,value,vl);
+}
+
+void
+test___riscv_vse16(uint16_t* base,vuint16m4_t value,size_t vl)
+{
+  __riscv_vse16(base,value,vl);
+}
+
+void
+test___riscv_vse16(uint16_t* base,vuint16m8_t value,size_t vl)
+{
+  __riscv_vse16(base,value,vl);
+}
+
+void
+test___riscv_vse16(vbool64_t mask,int16_t* base,vint16mf4_t value,size_t vl)
+{
+  __riscv_vse16(mask,base,value,vl);
+}
+
+void
+test___riscv_vse16(vbool32_t mask,int16_t* base,vint16mf2_t value,size_t vl)
+{
+  __riscv_vse16(mask,base,value,vl);
+}
+
+void
+test___riscv_vse16(vbool16_t mask,int16_t* base,vint16m1_t value,size_t vl)
+{
+  __riscv_vse16(mask,base,value,vl);
+}
+
+void
+test___riscv_vse16(vbool8_t mask,int16_t* base,vint16m2_t value,size_t vl)
+{
+  __riscv_vse16(mask,base,value,vl);
+}
+
+void
+test___riscv_vse16(vbool4_t mask,int16_t* base,vint16m4_t value,size_t vl)
+{
+  __riscv_vse16(mask,base,value,vl);
+}
+
+void
+test___riscv_vse16(vbool2_t mask,int16_t* base,vint16m8_t value,size_t vl)
+{
+  __riscv_vse16(mask,base,value,vl);
+}
+
+void
+test___riscv_vse16(vbool64_t mask,uint16_t* base,vuint16mf4_t value,size_t vl)
+{
+  __riscv_vse16(mask,base,value,vl);
+}
+
+void
+test___riscv_vse16(vbool32_t mask,uint16_t* base,vuint16mf2_t value,size_t vl)
+{
+  __riscv_vse16(mask,base,value,vl);
+}
+
+void
+test___riscv_vse16(vbool16_t mask,uint16_t* base,vuint16m1_t value,size_t vl)
+{
+  __riscv_vse16(mask,base,value,vl);
+}
+
+void
+test___riscv_vse16(vbool8_t mask,uint16_t* base,vuint16m2_t value,size_t vl)
+{
+  __riscv_vse16(mask,base,value,vl);
+}
+
+void
+test___riscv_vse16(vbool4_t mask,uint16_t* base,vuint16m4_t value,size_t vl)
+{
+  __riscv_vse16(mask,base,value,vl);
+}
+
+void
+test___riscv_vse16(vbool2_t mask,uint16_t* base,vuint16m8_t value,size_t vl)
+{
+  __riscv_vse16(mask,base,value,vl);
+}
+
+void
+test___riscv_vse32(int32_t* base,vint32mf2_t value,size_t vl)
+{
+  __riscv_vse32(base,value,vl);
+}
+
+void
+test___riscv_vse32(int32_t* base,vint32m1_t value,size_t vl)
+{
+  __riscv_vse32(base,value,vl);
+}
+
+void
+test___riscv_vse32(int32_t* base,vint32m2_t value,size_t vl)
+{
+  __riscv_vse32(base,value,vl);
+}
+
+void
+test___riscv_vse32(int32_t* base,vint32m4_t value,size_t vl)
+{
+  __riscv_vse32(base,value,vl);
+}
+
+void
+test___riscv_vse32(int32_t* base,vint32m8_t value,size_t vl)
+{
+  __riscv_vse32(base,value,vl);
+}
+
+void
+test___riscv_vse32(uint32_t* base,vuint32mf2_t value,size_t vl)
+{
+  __riscv_vse32(base,value,vl);
+}
+
+void
+test___riscv_vse32(uint32_t* base,vuint32m1_t value,size_t vl)
+{
+  __riscv_vse32(base,value,vl);
+}
+
+void
+test___riscv_vse32(uint32_t* base,vuint32m2_t value,size_t vl)
+{
+  __riscv_vse32(base,value,vl);
+}
+
+void
+test___riscv_vse32(uint32_t* base,vuint32m4_t value,size_t vl)
+{
+  __riscv_vse32(base,value,vl);
+}
+
+void
+test___riscv_vse32(uint32_t* base,vuint32m8_t value,size_t vl)
+{
+  __riscv_vse32(base,value,vl);
+}
+
+void
+test___riscv_vse32(float* base,vfloat32mf2_t value,size_t vl)
+{
+  __riscv_vse32(base,value,vl);
+}
+
+void
+test___riscv_vse32(float* base,vfloat32m1_t value,size_t vl)
+{
+  __riscv_vse32(base,value,vl);
+}
+
+void
+test___riscv_vse32(float* base,vfloat32m2_t value,size_t vl)
+{
+  __riscv_vse32(base,value,vl);
+}
+
+void
+test___riscv_vse32(float* base,vfloat32m4_t value,size_t vl)
+{
+  __riscv_vse32(base,value,vl);
+}
+
+void
+test___riscv_vse32(float* base,vfloat32m8_t value,size_t vl)
+{
+  __riscv_vse32(base,value,vl);
+}
+
+void
+test___riscv_vse32(vbool64_t mask,int32_t* base,vint32mf2_t value,size_t vl)
+{
+  __riscv_vse32(mask,base,value,vl);
+}
+
+void
+test___riscv_vse32(vbool32_t mask,int32_t* base,vint32m1_t value,size_t vl)
+{
+  __riscv_vse32(mask,base,value,vl);
+}
+
+void
+test___riscv_vse32(vbool16_t mask,int32_t* base,vint32m2_t value,size_t vl)
+{
+  __riscv_vse32(mask,base,value,vl);
+}
+
+void
+test___riscv_vse32(vbool8_t mask,int32_t* base,vint32m4_t value,size_t vl)
+{
+  __riscv_vse32(mask,base,value,vl);
+}
+
+void
+test___riscv_vse32(vbool4_t mask,int32_t* base,vint32m8_t value,size_t vl)
+{
+  __riscv_vse32(mask,base,value,vl);
+}
+
+void
+test___riscv_vse32(vbool64_t mask,uint32_t* base,vuint32mf2_t value,size_t vl)
+{
+  __riscv_vse32(mask,base,value,vl);
+}
+
+void
+test___riscv_vse32(vbool32_t mask,uint32_t* base,vuint32m1_t value,size_t vl)
+{
+  __riscv_vse32(mask,base,value,vl);
+}
+
+void
+test___riscv_vse32(vbool16_t mask,uint32_t* base,vuint32m2_t value,size_t vl)
+{
+  __riscv_vse32(mask,base,value,vl);
+}
+
+void
+test___riscv_vse32(vbool8_t mask,uint32_t* base,vuint32m4_t value,size_t vl)
+{
+  __riscv_vse32(mask,base,value,vl);
+}
+
+void
+test___riscv_vse32(vbool4_t mask,uint32_t* base,vuint32m8_t value,size_t vl)
+{
+  __riscv_vse32(mask,base,value,vl);
+}
+
+void
+test___riscv_vse32(vbool64_t mask,float* base,vfloat32mf2_t value,size_t vl)
+{
+  __riscv_vse32(mask,base,value,vl);
+}
+
+void
+test___riscv_vse32(vbool32_t mask,float* base,vfloat32m1_t value,size_t vl)
+{
+  __riscv_vse32(mask,base,value,vl);
+}
+
+void
+test___riscv_vse32(vbool16_t mask,float* base,vfloat32m2_t value,size_t vl)
+{
+  __riscv_vse32(mask,base,value,vl);
+}
+
+void
+test___riscv_vse32(vbool8_t mask,float* base,vfloat32m4_t value,size_t vl)
+{
+  __riscv_vse32(mask,base,value,vl);
+}
+
+void
+test___riscv_vse32(vbool4_t mask,float* base,vfloat32m8_t value,size_t vl)
+{
+  __riscv_vse32(mask,base,value,vl);
+}
+
+void
+test___riscv_vse64(int64_t* base,vint64m1_t value,size_t vl)
+{
+  __riscv_vse64(base,value,vl);
+}
+
+void
+test___riscv_vse64(int64_t* base,vint64m2_t value,size_t vl)
+{
+  __riscv_vse64(base,value,vl);
+}
+
+void
+test___riscv_vse64(int64_t* base,vint64m4_t value,size_t vl)
+{
+  __riscv_vse64(base,value,vl);
+}
+
+void
+test___riscv_vse64(int64_t* base,vint64m8_t value,size_t vl)
+{
+  __riscv_vse64(base,value,vl);
+}
+
+void
+test___riscv_vse64(uint64_t* base,vuint64m1_t value,size_t vl)
+{
+  __riscv_vse64(base,value,vl);
+}
+
+void
+test___riscv_vse64(uint64_t* base,vuint64m2_t value,size_t vl)
+{
+  __riscv_vse64(base,value,vl);
+}
+
+void
+test___riscv_vse64(uint64_t* base,vuint64m4_t value,size_t vl)
+{
+  __riscv_vse64(base,value,vl);
+}
+
+void
+test___riscv_vse64(uint64_t* base,vuint64m8_t value,size_t vl)
+{
+  __riscv_vse64(base,value,vl);
+}
+
+void
+test___riscv_vse64(double* base,vfloat64m1_t value,size_t vl)
+{
+  __riscv_vse64(base,value,vl);
+}
+
+void
+test___riscv_vse64(double* base,vfloat64m2_t value,size_t vl)
+{
+  __riscv_vse64(base,value,vl);
+}
+
+void
+test___riscv_vse64(double* base,vfloat64m4_t value,size_t vl)
+{
+  __riscv_vse64(base,value,vl);
+}
+
+void
+test___riscv_vse64(double* base,vfloat64m8_t value,size_t vl)
+{
+  __riscv_vse64(base,value,vl);
+}
+
+void
+test___riscv_vse64(vbool64_t mask,int64_t* base,vint64m1_t value,size_t vl)
+{
+  __riscv_vse64(mask,base,value,vl);
+}
+
+void
+test___riscv_vse64(vbool32_t mask,int64_t* base,vint64m2_t value,size_t vl)
+{
+  __riscv_vse64(mask,base,value,vl);
+}
+
+void
+test___riscv_vse64(vbool16_t mask,int64_t* base,vint64m4_t value,size_t vl)
+{
+  __riscv_vse64(mask,base,value,vl);
+}
+
+void
+test___riscv_vse64(vbool8_t mask,int64_t* base,vint64m8_t value,size_t vl)
+{
+  __riscv_vse64(mask,base,value,vl);
+}
+
+void
+test___riscv_vse64(vbool64_t mask,uint64_t* base,vuint64m1_t value,size_t vl)
+{
+  __riscv_vse64(mask,base,value,vl);
+}
+
+void
+test___riscv_vse64(vbool32_t mask,uint64_t* base,vuint64m2_t value,size_t vl)
+{
+  __riscv_vse64(mask,base,value,vl);
+}
+
+void
+test___riscv_vse64(vbool16_t mask,uint64_t* base,vuint64m4_t value,size_t vl)
+{
+  __riscv_vse64(mask,base,value,vl);
+}
+
+void
+test___riscv_vse64(vbool8_t mask,uint64_t* base,vuint64m8_t value,size_t vl)
+{
+  __riscv_vse64(mask,base,value,vl);
+}
+
+void
+test___riscv_vse64(vbool64_t mask,double* base,vfloat64m1_t value,size_t vl)
+{
+  __riscv_vse64(mask,base,value,vl);
+}
+
+void
+test___riscv_vse64(vbool32_t mask,double* base,vfloat64m2_t value,size_t vl)
+{
+  __riscv_vse64(mask,base,value,vl);
+}
+
+void
+test___riscv_vse64(vbool16_t mask,double* base,vfloat64m4_t value,size_t vl)
+{
+  __riscv_vse64(mask,base,value,vl);
+}
+
+void
+test___riscv_vse64(vbool8_t mask,double* base,vfloat64m8_t value,size_t vl)
+{
+  __riscv_vse64(mask,base,value,vl);
+}
+
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf8,\s*t[au],\s*m[au]\s+vse8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf4,\s*t[au],\s*m[au]\s+vse8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf2,\s*t[au],\s*m[au]\s+vse8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m1,\s*t[au],\s*m[au]\s+vse8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m2,\s*t[au],\s*m[au]\s+vse8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m4,\s*t[au],\s*m[au]\s+vse8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m8,\s*t[au],\s*m[au]\s+vse8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf8,\s*t[au],\s*m[au]\s+vse8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf4,\s*t[au],\s*m[au]\s+vse8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf2,\s*t[au],\s*m[au]\s+vse8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m1,\s*t[au],\s*m[au]\s+vse8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m2,\s*t[au],\s*m[au]\s+vse8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m4,\s*t[au],\s*m[au]\s+vse8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m8,\s*t[au],\s*m[au]\s+vse8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf4,\s*t[au],\s*m[au]\s+vse16\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf2,\s*t[au],\s*m[au]\s+vse16\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m1,\s*t[au],\s*m[au]\s+vse16\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m2,\s*t[au],\s*m[au]\s+vse16\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m4,\s*t[au],\s*m[au]\s+vse16\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m8,\s*t[au],\s*m[au]\s+vse16\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf4,\s*t[au],\s*m[au]\s+vse16\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf2,\s*t[au],\s*m[au]\s+vse16\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m1,\s*t[au],\s*m[au]\s+vse16\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m2,\s*t[au],\s*m[au]\s+vse16\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m4,\s*t[au],\s*m[au]\s+vse16\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m8,\s*t[au],\s*m[au]\s+vse16\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*mf2,\s*t[au],\s*m[au]\s+vse32\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)\s+} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m1,\s*t[au],\s*m[au]\s+vse32\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)\s+} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m2,\s*t[au],\s*m[au]\s+vse32\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)\s+} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m4,\s*t[au],\s*m[au]\s+vse32\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)\s+} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m8,\s*t[au],\s*m[au]\s+vse32\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)\s+} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*mf2,\s*t[au],\s*m[au]\s+vse32\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m1,\s*t[au],\s*m[au]\s+vse32\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m2,\s*t[au],\s*m[au]\s+vse32\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m4,\s*t[au],\s*m[au]\s+vse32\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m8,\s*t[au],\s*m[au]\s+vse32\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m1,\s*t[au],\s*m[au]\s+vse64\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)\s+} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m2,\s*t[au],\s*m[au]\s+vse64\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)\s+} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m4,\s*t[au],\s*m[au]\s+vse64\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)\s+} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m8,\s*t[au],\s*m[au]\s+vse64\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)\s+} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m1,\s*t[au],\s*m[au]\s+vse64\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m2,\s*t[au],\s*m[au]\s+vse64\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m4,\s*t[au],\s*m[au]\s+vse64\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 3 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m8,\s*t[au],\s*m[au]\s+vse64\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 3 } } */
-- 
2.36.3

Re: [PATCH] RISC-V: Add vle/vse C++ overloaded API intrinsic testcases

[Kito Cheng]

[-- Attachment #1: Type: text/plain, Size: 69911 bytes --]

committed, thanks!

On Fri, Jan 20, 2023 at 10:26 AM <juzhe.zhong@rivai.ai> wrote:

> From: Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
>
> gcc/testsuite/ChangeLog:
>
>         * g++.target/riscv/rvv/base/vle-1.C: New test.
>         * g++.target/riscv/rvv/base/vle_tu-1.C: New test.
>         * g++.target/riscv/rvv/base/vle_tum-1.C: New test.
>         * g++.target/riscv/rvv/base/vle_tumu-1.C: New test.
>         * g++.target/riscv/rvv/base/vse-1.C: New test.
>
> ---
>  .../g++.target/riscv/rvv/base/vle-1.C         | 345 +++++++++
>  .../g++.target/riscv/rvv/base/vle_tu-1.C      | 345 +++++++++
>  .../g++.target/riscv/rvv/base/vle_tum-1.C     | 345 +++++++++
>  .../g++.target/riscv/rvv/base/vle_tumu-1.C    | 345 +++++++++
>  .../g++.target/riscv/rvv/base/vse-1.C         | 685 ++++++++++++++++++
>  5 files changed, 2065 insertions(+)
>  create mode 100644 gcc/testsuite/g++.target/riscv/rvv/base/vle-1.C
>  create mode 100644 gcc/testsuite/g++.target/riscv/rvv/base/vle_tu-1.C
>  create mode 100644 gcc/testsuite/g++.target/riscv/rvv/base/vle_tum-1.C
>  create mode 100644 gcc/testsuite/g++.target/riscv/rvv/base/vle_tumu-1.C
>  create mode 100644 gcc/testsuite/g++.target/riscv/rvv/base/vse-1.C
>
> diff --git a/gcc/testsuite/g++.target/riscv/rvv/base/vle-1.C
> b/gcc/testsuite/g++.target/riscv/rvv/base/vle-1.C
> new file mode 100644
> index 00000000000..e06f62a8fb9
> --- /dev/null
> +++ b/gcc/testsuite/g++.target/riscv/rvv/base/vle-1.C
> @@ -0,0 +1,345 @@
> +/* { dg-do compile } */
> +/* { dg-options "-march=rv32gcv -mabi=ilp32d -O3 -fno-schedule-insns
> -fno-schedule-insns2" } */
> +
> +#include "riscv_vector.h"
> +
> +vint8mf8_t
> +test___riscv_vle8(vbool64_t mask,int8_t* base,size_t vl)
> +{
> +  return __riscv_vle8(mask,base,vl);
> +}
> +
> +vint8mf4_t
> +test___riscv_vle8(vbool32_t mask,int8_t* base,size_t vl)
> +{
> +  return __riscv_vle8(mask,base,vl);
> +}
> +
> +vint8mf2_t
> +test___riscv_vle8(vbool16_t mask,int8_t* base,size_t vl)
> +{
> +  return __riscv_vle8(mask,base,vl);
> +}
> +
> +vint8m1_t
> +test___riscv_vle8(vbool8_t mask,int8_t* base,size_t vl)
> +{
> +  return __riscv_vle8(mask,base,vl);
> +}
> +
> +vint8m2_t
> +test___riscv_vle8(vbool4_t mask,int8_t* base,size_t vl)
> +{
> +  return __riscv_vle8(mask,base,vl);
> +}
> +
> +vint8m4_t
> +test___riscv_vle8(vbool2_t mask,int8_t* base,size_t vl)
> +{
> +  return __riscv_vle8(mask,base,vl);
> +}
> +
> +vint8m8_t
> +test___riscv_vle8(vbool1_t mask,int8_t* base,size_t vl)
> +{
> +  return __riscv_vle8(mask,base,vl);
> +}
> +
> +vuint8mf8_t
> +test___riscv_vle8(vbool64_t mask,uint8_t* base,size_t vl)
> +{
> +  return __riscv_vle8(mask,base,vl);
> +}
> +
> +vuint8mf4_t
> +test___riscv_vle8(vbool32_t mask,uint8_t* base,size_t vl)
> +{
> +  return __riscv_vle8(mask,base,vl);
> +}
> +
> +vuint8mf2_t
> +test___riscv_vle8(vbool16_t mask,uint8_t* base,size_t vl)
> +{
> +  return __riscv_vle8(mask,base,vl);
> +}
> +
> +vuint8m1_t
> +test___riscv_vle8(vbool8_t mask,uint8_t* base,size_t vl)
> +{
> +  return __riscv_vle8(mask,base,vl);
> +}
> +
> +vuint8m2_t
> +test___riscv_vle8(vbool4_t mask,uint8_t* base,size_t vl)
> +{
> +  return __riscv_vle8(mask,base,vl);
> +}
> +
> +vuint8m4_t
> +test___riscv_vle8(vbool2_t mask,uint8_t* base,size_t vl)
> +{
> +  return __riscv_vle8(mask,base,vl);
> +}
> +
> +vuint8m8_t
> +test___riscv_vle8(vbool1_t mask,uint8_t* base,size_t vl)
> +{
> +  return __riscv_vle8(mask,base,vl);
> +}
> +
> +vint16mf4_t
> +test___riscv_vle16(vbool64_t mask,int16_t* base,size_t vl)
> +{
> +  return __riscv_vle16(mask,base,vl);
> +}
> +
> +vint16mf2_t
> +test___riscv_vle16(vbool32_t mask,int16_t* base,size_t vl)
> +{
> +  return __riscv_vle16(mask,base,vl);
> +}
> +
> +vint16m1_t
> +test___riscv_vle16(vbool16_t mask,int16_t* base,size_t vl)
> +{
> +  return __riscv_vle16(mask,base,vl);
> +}
> +
> +vint16m2_t
> +test___riscv_vle16(vbool8_t mask,int16_t* base,size_t vl)
> +{
> +  return __riscv_vle16(mask,base,vl);
> +}
> +
> +vint16m4_t
> +test___riscv_vle16(vbool4_t mask,int16_t* base,size_t vl)
> +{
> +  return __riscv_vle16(mask,base,vl);
> +}
> +
> +vint16m8_t
> +test___riscv_vle16(vbool2_t mask,int16_t* base,size_t vl)
> +{
> +  return __riscv_vle16(mask,base,vl);
> +}
> +
> +vuint16mf4_t
> +test___riscv_vle16(vbool64_t mask,uint16_t* base,size_t vl)
> +{
> +  return __riscv_vle16(mask,base,vl);
> +}
> +
> +vuint16mf2_t
> +test___riscv_vle16(vbool32_t mask,uint16_t* base,size_t vl)
> +{
> +  return __riscv_vle16(mask,base,vl);
> +}
> +
> +vuint16m1_t
> +test___riscv_vle16(vbool16_t mask,uint16_t* base,size_t vl)
> +{
> +  return __riscv_vle16(mask,base,vl);
> +}
> +
> +vuint16m2_t
> +test___riscv_vle16(vbool8_t mask,uint16_t* base,size_t vl)
> +{
> +  return __riscv_vle16(mask,base,vl);
> +}
> +
> +vuint16m4_t
> +test___riscv_vle16(vbool4_t mask,uint16_t* base,size_t vl)
> +{
> +  return __riscv_vle16(mask,base,vl);
> +}
> +
> +vuint16m8_t
> +test___riscv_vle16(vbool2_t mask,uint16_t* base,size_t vl)
> +{
> +  return __riscv_vle16(mask,base,vl);
> +}
> +
> +vint32mf2_t
> +test___riscv_vle32(vbool64_t mask,int32_t* base,size_t vl)
> +{
> +  return __riscv_vle32(mask,base,vl);
> +}
> +
> +vint32m1_t
> +test___riscv_vle32(vbool32_t mask,int32_t* base,size_t vl)
> +{
> +  return __riscv_vle32(mask,base,vl);
> +}
> +
> +vint32m2_t
> +test___riscv_vle32(vbool16_t mask,int32_t* base,size_t vl)
> +{
> +  return __riscv_vle32(mask,base,vl);
> +}
> +
> +vint32m4_t
> +test___riscv_vle32(vbool8_t mask,int32_t* base,size_t vl)
> +{
> +  return __riscv_vle32(mask,base,vl);
> +}
> +
> +vint32m8_t
> +test___riscv_vle32(vbool4_t mask,int32_t* base,size_t vl)
> +{
> +  return __riscv_vle32(mask,base,vl);
> +}
> +
> +vuint32mf2_t
> +test___riscv_vle32(vbool64_t mask,uint32_t* base,size_t vl)
> +{
> +  return __riscv_vle32(mask,base,vl);
> +}
> +
> +vuint32m1_t
> +test___riscv_vle32(vbool32_t mask,uint32_t* base,size_t vl)
> +{
> +  return __riscv_vle32(mask,base,vl);
> +}
> +
> +vuint32m2_t
> +test___riscv_vle32(vbool16_t mask,uint32_t* base,size_t vl)
> +{
> +  return __riscv_vle32(mask,base,vl);
> +}
> +
> +vuint32m4_t
> +test___riscv_vle32(vbool8_t mask,uint32_t* base,size_t vl)
> +{
> +  return __riscv_vle32(mask,base,vl);
> +}
> +
> +vuint32m8_t
> +test___riscv_vle32(vbool4_t mask,uint32_t* base,size_t vl)
> +{
> +  return __riscv_vle32(mask,base,vl);
> +}
> +
> +vfloat32mf2_t
> +test___riscv_vle32(vbool64_t mask,float* base,size_t vl)
> +{
> +  return __riscv_vle32(mask,base,vl);
> +}
> +
> +vfloat32m1_t
> +test___riscv_vle32(vbool32_t mask,float* base,size_t vl)
> +{
> +  return __riscv_vle32(mask,base,vl);
> +}
> +
> +vfloat32m2_t
> +test___riscv_vle32(vbool16_t mask,float* base,size_t vl)
> +{
> +  return __riscv_vle32(mask,base,vl);
> +}
> +
> +vfloat32m4_t
> +test___riscv_vle32(vbool8_t mask,float* base,size_t vl)
> +{
> +  return __riscv_vle32(mask,base,vl);
> +}
> +
> +vfloat32m8_t
> +test___riscv_vle32(vbool4_t mask,float* base,size_t vl)
> +{
> +  return __riscv_vle32(mask,base,vl);
> +}
> +
> +vint64m1_t
> +test___riscv_vle64(vbool64_t mask,int64_t* base,size_t vl)
> +{
> +  return __riscv_vle64(mask,base,vl);
> +}
> +
> +vint64m2_t
> +test___riscv_vle64(vbool32_t mask,int64_t* base,size_t vl)
> +{
> +  return __riscv_vle64(mask,base,vl);
> +}
> +
> +vint64m4_t
> +test___riscv_vle64(vbool16_t mask,int64_t* base,size_t vl)
> +{
> +  return __riscv_vle64(mask,base,vl);
> +}
> +
> +vint64m8_t
> +test___riscv_vle64(vbool8_t mask,int64_t* base,size_t vl)
> +{
> +  return __riscv_vle64(mask,base,vl);
> +}
> +
> +vuint64m1_t
> +test___riscv_vle64(vbool64_t mask,uint64_t* base,size_t vl)
> +{
> +  return __riscv_vle64(mask,base,vl);
> +}
> +
> +vuint64m2_t
> +test___riscv_vle64(vbool32_t mask,uint64_t* base,size_t vl)
> +{
> +  return __riscv_vle64(mask,base,vl);
> +}
> +
> +vuint64m4_t
> +test___riscv_vle64(vbool16_t mask,uint64_t* base,size_t vl)
> +{
> +  return __riscv_vle64(mask,base,vl);
> +}
> +
> +vuint64m8_t
> +test___riscv_vle64(vbool8_t mask,uint64_t* base,size_t vl)
> +{
> +  return __riscv_vle64(mask,base,vl);
> +}
> +
> +vfloat64m1_t
> +test___riscv_vle64(vbool64_t mask,double* base,size_t vl)
> +{
> +  return __riscv_vle64(mask,base,vl);
> +}
> +
> +vfloat64m2_t
> +test___riscv_vle64(vbool32_t mask,double* base,size_t vl)
> +{
> +  return __riscv_vle64(mask,base,vl);
> +}
> +
> +vfloat64m4_t
> +test___riscv_vle64(vbool16_t mask,double* base,size_t vl)
> +{
> +  return __riscv_vle64(mask,base,vl);
> +}
> +
> +vfloat64m8_t
> +test___riscv_vle64(vbool8_t mask,double* base,size_t vl)
> +{
> +  return __riscv_vle64(mask,base,vl);
> +}
> +
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf8,\s*t[au],\s*m[au]\s+vle8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t}
> 2 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf4,\s*t[au],\s*m[au]\s+vle8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t}
> 2 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf2,\s*t[au],\s*m[au]\s+vle8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t}
> 2 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m1,\s*t[au],\s*m[au]\s+vle8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t}
> 2 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m2,\s*t[au],\s*m[au]\s+vle8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t}
> 2 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m4,\s*t[au],\s*m[au]\s+vle8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t}
> 2 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m8,\s*t[au],\s*m[au]\s+vle8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t}
> 2 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf4,\s*t[au],\s*m[au]\s+vle16\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t}
> 2 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf2,\s*t[au],\s*m[au]\s+vle16\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t}
> 2 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m1,\s*t[au],\s*m[au]\s+vle16\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t}
> 2 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m2,\s*t[au],\s*m[au]\s+vle16\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t}
> 2 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m4,\s*t[au],\s*m[au]\s+vle16\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t}
> 2 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m8,\s*t[au],\s*m[au]\s+vle16\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t}
> 2 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*mf2,\s*t[au],\s*m[au]\s+vle32\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t}
> 3 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m1,\s*t[au],\s*m[au]\s+vle32\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t}
> 3 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m2,\s*t[au],\s*m[au]\s+vle32\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t}
> 3 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m4,\s*t[au],\s*m[au]\s+vle32\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t}
> 3 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m8,\s*t[au],\s*m[au]\s+vle32\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t}
> 3 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m1,\s*t[au],\s*m[au]\s+vle64\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t}
> 3 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m2,\s*t[au],\s*m[au]\s+vle64\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t}
> 3 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m4,\s*t[au],\s*m[au]\s+vle64\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t}
> 3 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m8,\s*t[au],\s*m[au]\s+vle64\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t}
> 3 } } */
> diff --git a/gcc/testsuite/g++.target/riscv/rvv/base/vle_tu-1.C
> b/gcc/testsuite/g++.target/riscv/rvv/base/vle_tu-1.C
> new file mode 100644
> index 00000000000..1408f988081
> --- /dev/null
> +++ b/gcc/testsuite/g++.target/riscv/rvv/base/vle_tu-1.C
> @@ -0,0 +1,345 @@
> +/* { dg-do compile } */
> +/* { dg-options "-march=rv32gcv -mabi=ilp32d -O3 -fno-schedule-insns
> -fno-schedule-insns2" } */
> +
> +#include "riscv_vector.h"
> +
> +vint8mf8_t
> +test___riscv_vle8_tu(vint8mf8_t merge,int8_t* base,size_t vl)
> +{
> +  return __riscv_vle8_tu(merge,base,vl);
> +}
> +
> +vint8mf4_t
> +test___riscv_vle8_tu(vint8mf4_t merge,int8_t* base,size_t vl)
> +{
> +  return __riscv_vle8_tu(merge,base,vl);
> +}
> +
> +vint8mf2_t
> +test___riscv_vle8_tu(vint8mf2_t merge,int8_t* base,size_t vl)
> +{
> +  return __riscv_vle8_tu(merge,base,vl);
> +}
> +
> +vint8m1_t
> +test___riscv_vle8_tu(vint8m1_t merge,int8_t* base,size_t vl)
> +{
> +  return __riscv_vle8_tu(merge,base,vl);
> +}
> +
> +vint8m2_t
> +test___riscv_vle8_tu(vint8m2_t merge,int8_t* base,size_t vl)
> +{
> +  return __riscv_vle8_tu(merge,base,vl);
> +}
> +
> +vint8m4_t
> +test___riscv_vle8_tu(vint8m4_t merge,int8_t* base,size_t vl)
> +{
> +  return __riscv_vle8_tu(merge,base,vl);
> +}
> +
> +vint8m8_t
> +test___riscv_vle8_tu(vint8m8_t merge,int8_t* base,size_t vl)
> +{
> +  return __riscv_vle8_tu(merge,base,vl);
> +}
> +
> +vuint8mf8_t
> +test___riscv_vle8_tu(vuint8mf8_t merge,uint8_t* base,size_t vl)
> +{
> +  return __riscv_vle8_tu(merge,base,vl);
> +}
> +
> +vuint8mf4_t
> +test___riscv_vle8_tu(vuint8mf4_t merge,uint8_t* base,size_t vl)
> +{
> +  return __riscv_vle8_tu(merge,base,vl);
> +}
> +
> +vuint8mf2_t
> +test___riscv_vle8_tu(vuint8mf2_t merge,uint8_t* base,size_t vl)
> +{
> +  return __riscv_vle8_tu(merge,base,vl);
> +}
> +
> +vuint8m1_t
> +test___riscv_vle8_tu(vuint8m1_t merge,uint8_t* base,size_t vl)
> +{
> +  return __riscv_vle8_tu(merge,base,vl);
> +}
> +
> +vuint8m2_t
> +test___riscv_vle8_tu(vuint8m2_t merge,uint8_t* base,size_t vl)
> +{
> +  return __riscv_vle8_tu(merge,base,vl);
> +}
> +
> +vuint8m4_t
> +test___riscv_vle8_tu(vuint8m4_t merge,uint8_t* base,size_t vl)
> +{
> +  return __riscv_vle8_tu(merge,base,vl);
> +}
> +
> +vuint8m8_t
> +test___riscv_vle8_tu(vuint8m8_t merge,uint8_t* base,size_t vl)
> +{
> +  return __riscv_vle8_tu(merge,base,vl);
> +}
> +
> +vint16mf4_t
> +test___riscv_vle16_tu(vint16mf4_t merge,int16_t* base,size_t vl)
> +{
> +  return __riscv_vle16_tu(merge,base,vl);
> +}
> +
> +vint16mf2_t
> +test___riscv_vle16_tu(vint16mf2_t merge,int16_t* base,size_t vl)
> +{
> +  return __riscv_vle16_tu(merge,base,vl);
> +}
> +
> +vint16m1_t
> +test___riscv_vle16_tu(vint16m1_t merge,int16_t* base,size_t vl)
> +{
> +  return __riscv_vle16_tu(merge,base,vl);
> +}
> +
> +vint16m2_t
> +test___riscv_vle16_tu(vint16m2_t merge,int16_t* base,size_t vl)
> +{
> +  return __riscv_vle16_tu(merge,base,vl);
> +}
> +
> +vint16m4_t
> +test___riscv_vle16_tu(vint16m4_t merge,int16_t* base,size_t vl)
> +{
> +  return __riscv_vle16_tu(merge,base,vl);
> +}
> +
> +vint16m8_t
> +test___riscv_vle16_tu(vint16m8_t merge,int16_t* base,size_t vl)
> +{
> +  return __riscv_vle16_tu(merge,base,vl);
> +}
> +
> +vuint16mf4_t
> +test___riscv_vle16_tu(vuint16mf4_t merge,uint16_t* base,size_t vl)
> +{
> +  return __riscv_vle16_tu(merge,base,vl);
> +}
> +
> +vuint16mf2_t
> +test___riscv_vle16_tu(vuint16mf2_t merge,uint16_t* base,size_t vl)
> +{
> +  return __riscv_vle16_tu(merge,base,vl);
> +}
> +
> +vuint16m1_t
> +test___riscv_vle16_tu(vuint16m1_t merge,uint16_t* base,size_t vl)
> +{
> +  return __riscv_vle16_tu(merge,base,vl);
> +}
> +
> +vuint16m2_t
> +test___riscv_vle16_tu(vuint16m2_t merge,uint16_t* base,size_t vl)
> +{
> +  return __riscv_vle16_tu(merge,base,vl);
> +}
> +
> +vuint16m4_t
> +test___riscv_vle16_tu(vuint16m4_t merge,uint16_t* base,size_t vl)
> +{
> +  return __riscv_vle16_tu(merge,base,vl);
> +}
> +
> +vuint16m8_t
> +test___riscv_vle16_tu(vuint16m8_t merge,uint16_t* base,size_t vl)
> +{
> +  return __riscv_vle16_tu(merge,base,vl);
> +}
> +
> +vint32mf2_t
> +test___riscv_vle32_tu(vint32mf2_t merge,int32_t* base,size_t vl)
> +{
> +  return __riscv_vle32_tu(merge,base,vl);
> +}
> +
> +vint32m1_t
> +test___riscv_vle32_tu(vint32m1_t merge,int32_t* base,size_t vl)
> +{
> +  return __riscv_vle32_tu(merge,base,vl);
> +}
> +
> +vint32m2_t
> +test___riscv_vle32_tu(vint32m2_t merge,int32_t* base,size_t vl)
> +{
> +  return __riscv_vle32_tu(merge,base,vl);
> +}
> +
> +vint32m4_t
> +test___riscv_vle32_tu(vint32m4_t merge,int32_t* base,size_t vl)
> +{
> +  return __riscv_vle32_tu(merge,base,vl);
> +}
> +
> +vint32m8_t
> +test___riscv_vle32_tu(vint32m8_t merge,int32_t* base,size_t vl)
> +{
> +  return __riscv_vle32_tu(merge,base,vl);
> +}
> +
> +vuint32mf2_t
> +test___riscv_vle32_tu(vuint32mf2_t merge,uint32_t* base,size_t vl)
> +{
> +  return __riscv_vle32_tu(merge,base,vl);
> +}
> +
> +vuint32m1_t
> +test___riscv_vle32_tu(vuint32m1_t merge,uint32_t* base,size_t vl)
> +{
> +  return __riscv_vle32_tu(merge,base,vl);
> +}
> +
> +vuint32m2_t
> +test___riscv_vle32_tu(vuint32m2_t merge,uint32_t* base,size_t vl)
> +{
> +  return __riscv_vle32_tu(merge,base,vl);
> +}
> +
> +vuint32m4_t
> +test___riscv_vle32_tu(vuint32m4_t merge,uint32_t* base,size_t vl)
> +{
> +  return __riscv_vle32_tu(merge,base,vl);
> +}
> +
> +vuint32m8_t
> +test___riscv_vle32_tu(vuint32m8_t merge,uint32_t* base,size_t vl)
> +{
> +  return __riscv_vle32_tu(merge,base,vl);
> +}
> +
> +vfloat32mf2_t
> +test___riscv_vle32_tu(vfloat32mf2_t merge,float* base,size_t vl)
> +{
> +  return __riscv_vle32_tu(merge,base,vl);
> +}
> +
> +vfloat32m1_t
> +test___riscv_vle32_tu(vfloat32m1_t merge,float* base,size_t vl)
> +{
> +  return __riscv_vle32_tu(merge,base,vl);
> +}
> +
> +vfloat32m2_t
> +test___riscv_vle32_tu(vfloat32m2_t merge,float* base,size_t vl)
> +{
> +  return __riscv_vle32_tu(merge,base,vl);
> +}
> +
> +vfloat32m4_t
> +test___riscv_vle32_tu(vfloat32m4_t merge,float* base,size_t vl)
> +{
> +  return __riscv_vle32_tu(merge,base,vl);
> +}
> +
> +vfloat32m8_t
> +test___riscv_vle32_tu(vfloat32m8_t merge,float* base,size_t vl)
> +{
> +  return __riscv_vle32_tu(merge,base,vl);
> +}
> +
> +vint64m1_t
> +test___riscv_vle64_tu(vint64m1_t merge,int64_t* base,size_t vl)
> +{
> +  return __riscv_vle64_tu(merge,base,vl);
> +}
> +
> +vint64m2_t
> +test___riscv_vle64_tu(vint64m2_t merge,int64_t* base,size_t vl)
> +{
> +  return __riscv_vle64_tu(merge,base,vl);
> +}
> +
> +vint64m4_t
> +test___riscv_vle64_tu(vint64m4_t merge,int64_t* base,size_t vl)
> +{
> +  return __riscv_vle64_tu(merge,base,vl);
> +}
> +
> +vint64m8_t
> +test___riscv_vle64_tu(vint64m8_t merge,int64_t* base,size_t vl)
> +{
> +  return __riscv_vle64_tu(merge,base,vl);
> +}
> +
> +vuint64m1_t
> +test___riscv_vle64_tu(vuint64m1_t merge,uint64_t* base,size_t vl)
> +{
> +  return __riscv_vle64_tu(merge,base,vl);
> +}
> +
> +vuint64m2_t
> +test___riscv_vle64_tu(vuint64m2_t merge,uint64_t* base,size_t vl)
> +{
> +  return __riscv_vle64_tu(merge,base,vl);
> +}
> +
> +vuint64m4_t
> +test___riscv_vle64_tu(vuint64m4_t merge,uint64_t* base,size_t vl)
> +{
> +  return __riscv_vle64_tu(merge,base,vl);
> +}
> +
> +vuint64m8_t
> +test___riscv_vle64_tu(vuint64m8_t merge,uint64_t* base,size_t vl)
> +{
> +  return __riscv_vle64_tu(merge,base,vl);
> +}
> +
> +vfloat64m1_t
> +test___riscv_vle64_tu(vfloat64m1_t merge,double* base,size_t vl)
> +{
> +  return __riscv_vle64_tu(merge,base,vl);
> +}
> +
> +vfloat64m2_t
> +test___riscv_vle64_tu(vfloat64m2_t merge,double* base,size_t vl)
> +{
> +  return __riscv_vle64_tu(merge,base,vl);
> +}
> +
> +vfloat64m4_t
> +test___riscv_vle64_tu(vfloat64m4_t merge,double* base,size_t vl)
> +{
> +  return __riscv_vle64_tu(merge,base,vl);
> +}
> +
> +vfloat64m8_t
> +test___riscv_vle64_tu(vfloat64m8_t merge,double* base,size_t vl)
> +{
> +  return __riscv_vle64_tu(merge,base,vl);
> +}
> +
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf8,\s*tu,\s*m[au]\s+vle8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)}
> 2 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf4,\s*tu,\s*m[au]\s+vle8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)}
> 2 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf2,\s*tu,\s*m[au]\s+vle8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)}
> 2 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m1,\s*tu,\s*m[au]\s+vle8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)}
> 2 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m2,\s*tu,\s*m[au]\s+vle8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)}
> 2 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m4,\s*tu,\s*m[au]\s+vle8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)}
> 2 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m8,\s*tu,\s*m[au]\s+vle8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)}
> 2 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf4,\s*tu,\s*m[au]\s+vle16\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)}
> 2 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf2,\s*tu,\s*m[au]\s+vle16\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)}
> 2 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m1,\s*tu,\s*m[au]\s+vle16\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)}
> 2 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m2,\s*tu,\s*m[au]\s+vle16\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)}
> 2 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m4,\s*tu,\s*m[au]\s+vle16\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)}
> 2 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m8,\s*tu,\s*m[au]\s+vle16\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)}
> 2 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*mf2,\s*tu,\s*m[au]\s+vle32\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)}
> 3 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m1,\s*tu,\s*m[au]\s+vle32\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)}
> 3 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m2,\s*tu,\s*m[au]\s+vle32\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)}
> 3 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m4,\s*tu,\s*m[au]\s+vle32\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)}
> 3 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m8,\s*tu,\s*m[au]\s+vle32\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)}
> 3 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m1,\s*tu,\s*m[au]\s+vle64\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)}
> 3 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m2,\s*tu,\s*m[au]\s+vle64\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)}
> 3 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m4,\s*tu,\s*m[au]\s+vle64\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)}
> 3 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m8,\s*tu,\s*m[au]\s+vle64\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)}
> 3 } } */
> diff --git a/gcc/testsuite/g++.target/riscv/rvv/base/vle_tum-1.C
> b/gcc/testsuite/g++.target/riscv/rvv/base/vle_tum-1.C
> new file mode 100644
> index 00000000000..7449744663e
> --- /dev/null
> +++ b/gcc/testsuite/g++.target/riscv/rvv/base/vle_tum-1.C
> @@ -0,0 +1,345 @@
> +/* { dg-do compile } */
> +/* { dg-options "-march=rv32gcv -mabi=ilp32d -O3 -fno-schedule-insns
> -fno-schedule-insns2" } */
> +
> +#include "riscv_vector.h"
> +
> +vint8mf8_t
> +test___riscv_vle8_tum(vbool64_t mask,vint8mf8_t merge,int8_t* base,size_t
> vl)
> +{
> +  return __riscv_vle8_tum(mask,merge,base,vl);
> +}
> +
> +vint8mf4_t
> +test___riscv_vle8_tum(vbool32_t mask,vint8mf4_t merge,int8_t* base,size_t
> vl)
> +{
> +  return __riscv_vle8_tum(mask,merge,base,vl);
> +}
> +
> +vint8mf2_t
> +test___riscv_vle8_tum(vbool16_t mask,vint8mf2_t merge,int8_t* base,size_t
> vl)
> +{
> +  return __riscv_vle8_tum(mask,merge,base,vl);
> +}
> +
> +vint8m1_t
> +test___riscv_vle8_tum(vbool8_t mask,vint8m1_t merge,int8_t* base,size_t
> vl)
> +{
> +  return __riscv_vle8_tum(mask,merge,base,vl);
> +}
> +
> +vint8m2_t
> +test___riscv_vle8_tum(vbool4_t mask,vint8m2_t merge,int8_t* base,size_t
> vl)
> +{
> +  return __riscv_vle8_tum(mask,merge,base,vl);
> +}
> +
> +vint8m4_t
> +test___riscv_vle8_tum(vbool2_t mask,vint8m4_t merge,int8_t* base,size_t
> vl)
> +{
> +  return __riscv_vle8_tum(mask,merge,base,vl);
> +}
> +
> +vint8m8_t
> +test___riscv_vle8_tum(vbool1_t mask,vint8m8_t merge,int8_t* base,size_t
> vl)
> +{
> +  return __riscv_vle8_tum(mask,merge,base,vl);
> +}
> +
> +vuint8mf8_t
> +test___riscv_vle8_tum(vbool64_t mask,vuint8mf8_t merge,uint8_t*
> base,size_t vl)
> +{
> +  return __riscv_vle8_tum(mask,merge,base,vl);
> +}
> +
> +vuint8mf4_t
> +test___riscv_vle8_tum(vbool32_t mask,vuint8mf4_t merge,uint8_t*
> base,size_t vl)
> +{
> +  return __riscv_vle8_tum(mask,merge,base,vl);
> +}
> +
> +vuint8mf2_t
> +test___riscv_vle8_tum(vbool16_t mask,vuint8mf2_t merge,uint8_t*
> base,size_t vl)
> +{
> +  return __riscv_vle8_tum(mask,merge,base,vl);
> +}
> +
> +vuint8m1_t
> +test___riscv_vle8_tum(vbool8_t mask,vuint8m1_t merge,uint8_t* base,size_t
> vl)
> +{
> +  return __riscv_vle8_tum(mask,merge,base,vl);
> +}
> +
> +vuint8m2_t
> +test___riscv_vle8_tum(vbool4_t mask,vuint8m2_t merge,uint8_t* base,size_t
> vl)
> +{
> +  return __riscv_vle8_tum(mask,merge,base,vl);
> +}
> +
> +vuint8m4_t
> +test___riscv_vle8_tum(vbool2_t mask,vuint8m4_t merge,uint8_t* base,size_t
> vl)
> +{
> +  return __riscv_vle8_tum(mask,merge,base,vl);
> +}
> +
> +vuint8m8_t
> +test___riscv_vle8_tum(vbool1_t mask,vuint8m8_t merge,uint8_t* base,size_t
> vl)
> +{
> +  return __riscv_vle8_tum(mask,merge,base,vl);
> +}
> +
> +vint16mf4_t
> +test___riscv_vle16_tum(vbool64_t mask,vint16mf4_t merge,int16_t*
> base,size_t vl)
> +{
> +  return __riscv_vle16_tum(mask,merge,base,vl);
> +}
> +
> +vint16mf2_t
> +test___riscv_vle16_tum(vbool32_t mask,vint16mf2_t merge,int16_t*
> base,size_t vl)
> +{
> +  return __riscv_vle16_tum(mask,merge,base,vl);
> +}
> +
> +vint16m1_t
> +test___riscv_vle16_tum(vbool16_t mask,vint16m1_t merge,int16_t*
> base,size_t vl)
> +{
> +  return __riscv_vle16_tum(mask,merge,base,vl);
> +}
> +
> +vint16m2_t
> +test___riscv_vle16_tum(vbool8_t mask,vint16m2_t merge,int16_t*
> base,size_t vl)
> +{
> +  return __riscv_vle16_tum(mask,merge,base,vl);
> +}
> +
> +vint16m4_t
> +test___riscv_vle16_tum(vbool4_t mask,vint16m4_t merge,int16_t*
> base,size_t vl)
> +{
> +  return __riscv_vle16_tum(mask,merge,base,vl);
> +}
> +
> +vint16m8_t
> +test___riscv_vle16_tum(vbool2_t mask,vint16m8_t merge,int16_t*
> base,size_t vl)
> +{
> +  return __riscv_vle16_tum(mask,merge,base,vl);
> +}
> +
> +vuint16mf4_t
> +test___riscv_vle16_tum(vbool64_t mask,vuint16mf4_t merge,uint16_t*
> base,size_t vl)
> +{
> +  return __riscv_vle16_tum(mask,merge,base,vl);
> +}
> +
> +vuint16mf2_t
> +test___riscv_vle16_tum(vbool32_t mask,vuint16mf2_t merge,uint16_t*
> base,size_t vl)
> +{
> +  return __riscv_vle16_tum(mask,merge,base,vl);
> +}
> +
> +vuint16m1_t
> +test___riscv_vle16_tum(vbool16_t mask,vuint16m1_t merge,uint16_t*
> base,size_t vl)
> +{
> +  return __riscv_vle16_tum(mask,merge,base,vl);
> +}
> +
> +vuint16m2_t
> +test___riscv_vle16_tum(vbool8_t mask,vuint16m2_t merge,uint16_t*
> base,size_t vl)
> +{
> +  return __riscv_vle16_tum(mask,merge,base,vl);
> +}
> +
> +vuint16m4_t
> +test___riscv_vle16_tum(vbool4_t mask,vuint16m4_t merge,uint16_t*
> base,size_t vl)
> +{
> +  return __riscv_vle16_tum(mask,merge,base,vl);
> +}
> +
> +vuint16m8_t
> +test___riscv_vle16_tum(vbool2_t mask,vuint16m8_t merge,uint16_t*
> base,size_t vl)
> +{
> +  return __riscv_vle16_tum(mask,merge,base,vl);
> +}
> +
> +vint32mf2_t
> +test___riscv_vle32_tum(vbool64_t mask,vint32mf2_t merge,int32_t*
> base,size_t vl)
> +{
> +  return __riscv_vle32_tum(mask,merge,base,vl);
> +}
> +
> +vint32m1_t
> +test___riscv_vle32_tum(vbool32_t mask,vint32m1_t merge,int32_t*
> base,size_t vl)
> +{
> +  return __riscv_vle32_tum(mask,merge,base,vl);
> +}
> +
> +vint32m2_t
> +test___riscv_vle32_tum(vbool16_t mask,vint32m2_t merge,int32_t*
> base,size_t vl)
> +{
> +  return __riscv_vle32_tum(mask,merge,base,vl);
> +}
> +
> +vint32m4_t
> +test___riscv_vle32_tum(vbool8_t mask,vint32m4_t merge,int32_t*
> base,size_t vl)
> +{
> +  return __riscv_vle32_tum(mask,merge,base,vl);
> +}
> +
> +vint32m8_t
> +test___riscv_vle32_tum(vbool4_t mask,vint32m8_t merge,int32_t*
> base,size_t vl)
> +{
> +  return __riscv_vle32_tum(mask,merge,base,vl);
> +}
> +
> +vuint32mf2_t
> +test___riscv_vle32_tum(vbool64_t mask,vuint32mf2_t merge,uint32_t*
> base,size_t vl)
> +{
> +  return __riscv_vle32_tum(mask,merge,base,vl);
> +}
> +
> +vuint32m1_t
> +test___riscv_vle32_tum(vbool32_t mask,vuint32m1_t merge,uint32_t*
> base,size_t vl)
> +{
> +  return __riscv_vle32_tum(mask,merge,base,vl);
> +}
> +
> +vuint32m2_t
> +test___riscv_vle32_tum(vbool16_t mask,vuint32m2_t merge,uint32_t*
> base,size_t vl)
> +{
> +  return __riscv_vle32_tum(mask,merge,base,vl);
> +}
> +
> +vuint32m4_t
> +test___riscv_vle32_tum(vbool8_t mask,vuint32m4_t merge,uint32_t*
> base,size_t vl)
> +{
> +  return __riscv_vle32_tum(mask,merge,base,vl);
> +}
> +
> +vuint32m8_t
> +test___riscv_vle32_tum(vbool4_t mask,vuint32m8_t merge,uint32_t*
> base,size_t vl)
> +{
> +  return __riscv_vle32_tum(mask,merge,base,vl);
> +}
> +
> +vfloat32mf2_t
> +test___riscv_vle32_tum(vbool64_t mask,vfloat32mf2_t merge,float*
> base,size_t vl)
> +{
> +  return __riscv_vle32_tum(mask,merge,base,vl);
> +}
> +
> +vfloat32m1_t
> +test___riscv_vle32_tum(vbool32_t mask,vfloat32m1_t merge,float*
> base,size_t vl)
> +{
> +  return __riscv_vle32_tum(mask,merge,base,vl);
> +}
> +
> +vfloat32m2_t
> +test___riscv_vle32_tum(vbool16_t mask,vfloat32m2_t merge,float*
> base,size_t vl)
> +{
> +  return __riscv_vle32_tum(mask,merge,base,vl);
> +}
> +
> +vfloat32m4_t
> +test___riscv_vle32_tum(vbool8_t mask,vfloat32m4_t merge,float*
> base,size_t vl)
> +{
> +  return __riscv_vle32_tum(mask,merge,base,vl);
> +}
> +
> +vfloat32m8_t
> +test___riscv_vle32_tum(vbool4_t mask,vfloat32m8_t merge,float*
> base,size_t vl)
> +{
> +  return __riscv_vle32_tum(mask,merge,base,vl);
> +}
> +
> +vint64m1_t
> +test___riscv_vle64_tum(vbool64_t mask,vint64m1_t merge,int64_t*
> base,size_t vl)
> +{
> +  return __riscv_vle64_tum(mask,merge,base,vl);
> +}
> +
> +vint64m2_t
> +test___riscv_vle64_tum(vbool32_t mask,vint64m2_t merge,int64_t*
> base,size_t vl)
> +{
> +  return __riscv_vle64_tum(mask,merge,base,vl);
> +}
> +
> +vint64m4_t
> +test___riscv_vle64_tum(vbool16_t mask,vint64m4_t merge,int64_t*
> base,size_t vl)
> +{
> +  return __riscv_vle64_tum(mask,merge,base,vl);
> +}
> +
> +vint64m8_t
> +test___riscv_vle64_tum(vbool8_t mask,vint64m8_t merge,int64_t*
> base,size_t vl)
> +{
> +  return __riscv_vle64_tum(mask,merge,base,vl);
> +}
> +
> +vuint64m1_t
> +test___riscv_vle64_tum(vbool64_t mask,vuint64m1_t merge,uint64_t*
> base,size_t vl)
> +{
> +  return __riscv_vle64_tum(mask,merge,base,vl);
> +}
> +
> +vuint64m2_t
> +test___riscv_vle64_tum(vbool32_t mask,vuint64m2_t merge,uint64_t*
> base,size_t vl)
> +{
> +  return __riscv_vle64_tum(mask,merge,base,vl);
> +}
> +
> +vuint64m4_t
> +test___riscv_vle64_tum(vbool16_t mask,vuint64m4_t merge,uint64_t*
> base,size_t vl)
> +{
> +  return __riscv_vle64_tum(mask,merge,base,vl);
> +}
> +
> +vuint64m8_t
> +test___riscv_vle64_tum(vbool8_t mask,vuint64m8_t merge,uint64_t*
> base,size_t vl)
> +{
> +  return __riscv_vle64_tum(mask,merge,base,vl);
> +}
> +
> +vfloat64m1_t
> +test___riscv_vle64_tum(vbool64_t mask,vfloat64m1_t merge,double*
> base,size_t vl)
> +{
> +  return __riscv_vle64_tum(mask,merge,base,vl);
> +}
> +
> +vfloat64m2_t
> +test___riscv_vle64_tum(vbool32_t mask,vfloat64m2_t merge,double*
> base,size_t vl)
> +{
> +  return __riscv_vle64_tum(mask,merge,base,vl);
> +}
> +
> +vfloat64m4_t
> +test___riscv_vle64_tum(vbool16_t mask,vfloat64m4_t merge,double*
> base,size_t vl)
> +{
> +  return __riscv_vle64_tum(mask,merge,base,vl);
> +}
> +
> +vfloat64m8_t
> +test___riscv_vle64_tum(vbool8_t mask,vfloat64m8_t merge,double*
> base,size_t vl)
> +{
> +  return __riscv_vle64_tum(mask,merge,base,vl);
> +}
> +
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf8,\s*tu,\s*m[au]\s+vle8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t}
> 2 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf4,\s*tu,\s*m[au]\s+vle8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t}
> 2 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf2,\s*tu,\s*m[au]\s+vle8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t}
> 2 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m1,\s*tu,\s*m[au]\s+vle8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t}
> 2 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m2,\s*tu,\s*m[au]\s+vle8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t}
> 2 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m4,\s*tu,\s*m[au]\s+vle8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t}
> 2 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m8,\s*tu,\s*m[au]\s+vle8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t}
> 2 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf4,\s*tu,\s*m[au]\s+vle16\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t}
> 2 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf2,\s*tu,\s*m[au]\s+vle16\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t}
> 2 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m1,\s*tu,\s*m[au]\s+vle16\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t}
> 2 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m2,\s*tu,\s*m[au]\s+vle16\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t}
> 2 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m4,\s*tu,\s*m[au]\s+vle16\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t}
> 2 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m8,\s*tu,\s*m[au]\s+vle16\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t}
> 2 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*mf2,\s*tu,\s*m[au]\s+vle32\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t}
> 3 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m1,\s*tu,\s*m[au]\s+vle32\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t}
> 3 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m2,\s*tu,\s*m[au]\s+vle32\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t}
> 3 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m4,\s*tu,\s*m[au]\s+vle32\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t}
> 3 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m8,\s*tu,\s*m[au]\s+vle32\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t}
> 3 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m1,\s*tu,\s*m[au]\s+vle64\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t}
> 3 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m2,\s*tu,\s*m[au]\s+vle64\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t}
> 3 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m4,\s*tu,\s*m[au]\s+vle64\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t}
> 3 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m8,\s*tu,\s*m[au]\s+vle64\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t}
> 3 } } */
> diff --git a/gcc/testsuite/g++.target/riscv/rvv/base/vle_tumu-1.C
> b/gcc/testsuite/g++.target/riscv/rvv/base/vle_tumu-1.C
> new file mode 100644
> index 00000000000..a9a260357d3
> --- /dev/null
> +++ b/gcc/testsuite/g++.target/riscv/rvv/base/vle_tumu-1.C
> @@ -0,0 +1,345 @@
> +/* { dg-do compile } */
> +/* { dg-options "-march=rv32gcv -mabi=ilp32d -O3 -fno-schedule-insns
> -fno-schedule-insns2" } */
> +
> +#include "riscv_vector.h"
> +
> +vint8mf8_t
> +test___riscv_vle8_tumu(vbool64_t mask,vint8mf8_t merge,int8_t*
> base,size_t vl)
> +{
> +  return __riscv_vle8_tumu(mask,merge,base,vl);
> +}
> +
> +vint8mf4_t
> +test___riscv_vle8_tumu(vbool32_t mask,vint8mf4_t merge,int8_t*
> base,size_t vl)
> +{
> +  return __riscv_vle8_tumu(mask,merge,base,vl);
> +}
> +
> +vint8mf2_t
> +test___riscv_vle8_tumu(vbool16_t mask,vint8mf2_t merge,int8_t*
> base,size_t vl)
> +{
> +  return __riscv_vle8_tumu(mask,merge,base,vl);
> +}
> +
> +vint8m1_t
> +test___riscv_vle8_tumu(vbool8_t mask,vint8m1_t merge,int8_t* base,size_t
> vl)
> +{
> +  return __riscv_vle8_tumu(mask,merge,base,vl);
> +}
> +
> +vint8m2_t
> +test___riscv_vle8_tumu(vbool4_t mask,vint8m2_t merge,int8_t* base,size_t
> vl)
> +{
> +  return __riscv_vle8_tumu(mask,merge,base,vl);
> +}
> +
> +vint8m4_t
> +test___riscv_vle8_tumu(vbool2_t mask,vint8m4_t merge,int8_t* base,size_t
> vl)
> +{
> +  return __riscv_vle8_tumu(mask,merge,base,vl);
> +}
> +
> +vint8m8_t
> +test___riscv_vle8_tumu(vbool1_t mask,vint8m8_t merge,int8_t* base,size_t
> vl)
> +{
> +  return __riscv_vle8_tumu(mask,merge,base,vl);
> +}
> +
> +vuint8mf8_t
> +test___riscv_vle8_tumu(vbool64_t mask,vuint8mf8_t merge,uint8_t*
> base,size_t vl)
> +{
> +  return __riscv_vle8_tumu(mask,merge,base,vl);
> +}
> +
> +vuint8mf4_t
> +test___riscv_vle8_tumu(vbool32_t mask,vuint8mf4_t merge,uint8_t*
> base,size_t vl)
> +{
> +  return __riscv_vle8_tumu(mask,merge,base,vl);
> +}
> +
> +vuint8mf2_t
> +test___riscv_vle8_tumu(vbool16_t mask,vuint8mf2_t merge,uint8_t*
> base,size_t vl)
> +{
> +  return __riscv_vle8_tumu(mask,merge,base,vl);
> +}
> +
> +vuint8m1_t
> +test___riscv_vle8_tumu(vbool8_t mask,vuint8m1_t merge,uint8_t*
> base,size_t vl)
> +{
> +  return __riscv_vle8_tumu(mask,merge,base,vl);
> +}
> +
> +vuint8m2_t
> +test___riscv_vle8_tumu(vbool4_t mask,vuint8m2_t merge,uint8_t*
> base,size_t vl)
> +{
> +  return __riscv_vle8_tumu(mask,merge,base,vl);
> +}
> +
> +vuint8m4_t
> +test___riscv_vle8_tumu(vbool2_t mask,vuint8m4_t merge,uint8_t*
> base,size_t vl)
> +{
> +  return __riscv_vle8_tumu(mask,merge,base,vl);
> +}
> +
> +vuint8m8_t
> +test___riscv_vle8_tumu(vbool1_t mask,vuint8m8_t merge,uint8_t*
> base,size_t vl)
> +{
> +  return __riscv_vle8_tumu(mask,merge,base,vl);
> +}
> +
> +vint16mf4_t
> +test___riscv_vle16_tumu(vbool64_t mask,vint16mf4_t merge,int16_t*
> base,size_t vl)
> +{
> +  return __riscv_vle16_tumu(mask,merge,base,vl);
> +}
> +
> +vint16mf2_t
> +test___riscv_vle16_tumu(vbool32_t mask,vint16mf2_t merge,int16_t*
> base,size_t vl)
> +{
> +  return __riscv_vle16_tumu(mask,merge,base,vl);
> +}
> +
> +vint16m1_t
> +test___riscv_vle16_tumu(vbool16_t mask,vint16m1_t merge,int16_t*
> base,size_t vl)
> +{
> +  return __riscv_vle16_tumu(mask,merge,base,vl);
> +}
> +
> +vint16m2_t
> +test___riscv_vle16_tumu(vbool8_t mask,vint16m2_t merge,int16_t*
> base,size_t vl)
> +{
> +  return __riscv_vle16_tumu(mask,merge,base,vl);
> +}
> +
> +vint16m4_t
> +test___riscv_vle16_tumu(vbool4_t mask,vint16m4_t merge,int16_t*
> base,size_t vl)
> +{
> +  return __riscv_vle16_tumu(mask,merge,base,vl);
> +}
> +
> +vint16m8_t
> +test___riscv_vle16_tumu(vbool2_t mask,vint16m8_t merge,int16_t*
> base,size_t vl)
> +{
> +  return __riscv_vle16_tumu(mask,merge,base,vl);
> +}
> +
> +vuint16mf4_t
> +test___riscv_vle16_tumu(vbool64_t mask,vuint16mf4_t merge,uint16_t*
> base,size_t vl)
> +{
> +  return __riscv_vle16_tumu(mask,merge,base,vl);
> +}
> +
> +vuint16mf2_t
> +test___riscv_vle16_tumu(vbool32_t mask,vuint16mf2_t merge,uint16_t*
> base,size_t vl)
> +{
> +  return __riscv_vle16_tumu(mask,merge,base,vl);
> +}
> +
> +vuint16m1_t
> +test___riscv_vle16_tumu(vbool16_t mask,vuint16m1_t merge,uint16_t*
> base,size_t vl)
> +{
> +  return __riscv_vle16_tumu(mask,merge,base,vl);
> +}
> +
> +vuint16m2_t
> +test___riscv_vle16_tumu(vbool8_t mask,vuint16m2_t merge,uint16_t*
> base,size_t vl)
> +{
> +  return __riscv_vle16_tumu(mask,merge,base,vl);
> +}
> +
> +vuint16m4_t
> +test___riscv_vle16_tumu(vbool4_t mask,vuint16m4_t merge,uint16_t*
> base,size_t vl)
> +{
> +  return __riscv_vle16_tumu(mask,merge,base,vl);
> +}
> +
> +vuint16m8_t
> +test___riscv_vle16_tumu(vbool2_t mask,vuint16m8_t merge,uint16_t*
> base,size_t vl)
> +{
> +  return __riscv_vle16_tumu(mask,merge,base,vl);
> +}
> +
> +vint32mf2_t
> +test___riscv_vle32_tumu(vbool64_t mask,vint32mf2_t merge,int32_t*
> base,size_t vl)
> +{
> +  return __riscv_vle32_tumu(mask,merge,base,vl);
> +}
> +
> +vint32m1_t
> +test___riscv_vle32_tumu(vbool32_t mask,vint32m1_t merge,int32_t*
> base,size_t vl)
> +{
> +  return __riscv_vle32_tumu(mask,merge,base,vl);
> +}
> +
> +vint32m2_t
> +test___riscv_vle32_tumu(vbool16_t mask,vint32m2_t merge,int32_t*
> base,size_t vl)
> +{
> +  return __riscv_vle32_tumu(mask,merge,base,vl);
> +}
> +
> +vint32m4_t
> +test___riscv_vle32_tumu(vbool8_t mask,vint32m4_t merge,int32_t*
> base,size_t vl)
> +{
> +  return __riscv_vle32_tumu(mask,merge,base,vl);
> +}
> +
> +vint32m8_t
> +test___riscv_vle32_tumu(vbool4_t mask,vint32m8_t merge,int32_t*
> base,size_t vl)
> +{
> +  return __riscv_vle32_tumu(mask,merge,base,vl);
> +}
> +
> +vuint32mf2_t
> +test___riscv_vle32_tumu(vbool64_t mask,vuint32mf2_t merge,uint32_t*
> base,size_t vl)
> +{
> +  return __riscv_vle32_tumu(mask,merge,base,vl);
> +}
> +
> +vuint32m1_t
> +test___riscv_vle32_tumu(vbool32_t mask,vuint32m1_t merge,uint32_t*
> base,size_t vl)
> +{
> +  return __riscv_vle32_tumu(mask,merge,base,vl);
> +}
> +
> +vuint32m2_t
> +test___riscv_vle32_tumu(vbool16_t mask,vuint32m2_t merge,uint32_t*
> base,size_t vl)
> +{
> +  return __riscv_vle32_tumu(mask,merge,base,vl);
> +}
> +
> +vuint32m4_t
> +test___riscv_vle32_tumu(vbool8_t mask,vuint32m4_t merge,uint32_t*
> base,size_t vl)
> +{
> +  return __riscv_vle32_tumu(mask,merge,base,vl);
> +}
> +
> +vuint32m8_t
> +test___riscv_vle32_tumu(vbool4_t mask,vuint32m8_t merge,uint32_t*
> base,size_t vl)
> +{
> +  return __riscv_vle32_tumu(mask,merge,base,vl);
> +}
> +
> +vfloat32mf2_t
> +test___riscv_vle32_tumu(vbool64_t mask,vfloat32mf2_t merge,float*
> base,size_t vl)
> +{
> +  return __riscv_vle32_tumu(mask,merge,base,vl);
> +}
> +
> +vfloat32m1_t
> +test___riscv_vle32_tumu(vbool32_t mask,vfloat32m1_t merge,float*
> base,size_t vl)
> +{
> +  return __riscv_vle32_tumu(mask,merge,base,vl);
> +}
> +
> +vfloat32m2_t
> +test___riscv_vle32_tumu(vbool16_t mask,vfloat32m2_t merge,float*
> base,size_t vl)
> +{
> +  return __riscv_vle32_tumu(mask,merge,base,vl);
> +}
> +
> +vfloat32m4_t
> +test___riscv_vle32_tumu(vbool8_t mask,vfloat32m4_t merge,float*
> base,size_t vl)
> +{
> +  return __riscv_vle32_tumu(mask,merge,base,vl);
> +}
> +
> +vfloat32m8_t
> +test___riscv_vle32_tumu(vbool4_t mask,vfloat32m8_t merge,float*
> base,size_t vl)
> +{
> +  return __riscv_vle32_tumu(mask,merge,base,vl);
> +}
> +
> +vint64m1_t
> +test___riscv_vle64_tumu(vbool64_t mask,vint64m1_t merge,int64_t*
> base,size_t vl)
> +{
> +  return __riscv_vle64_tumu(mask,merge,base,vl);
> +}
> +
> +vint64m2_t
> +test___riscv_vle64_tumu(vbool32_t mask,vint64m2_t merge,int64_t*
> base,size_t vl)
> +{
> +  return __riscv_vle64_tumu(mask,merge,base,vl);
> +}
> +
> +vint64m4_t
> +test___riscv_vle64_tumu(vbool16_t mask,vint64m4_t merge,int64_t*
> base,size_t vl)
> +{
> +  return __riscv_vle64_tumu(mask,merge,base,vl);
> +}
> +
> +vint64m8_t
> +test___riscv_vle64_tumu(vbool8_t mask,vint64m8_t merge,int64_t*
> base,size_t vl)
> +{
> +  return __riscv_vle64_tumu(mask,merge,base,vl);
> +}
> +
> +vuint64m1_t
> +test___riscv_vle64_tumu(vbool64_t mask,vuint64m1_t merge,uint64_t*
> base,size_t vl)
> +{
> +  return __riscv_vle64_tumu(mask,merge,base,vl);
> +}
> +
> +vuint64m2_t
> +test___riscv_vle64_tumu(vbool32_t mask,vuint64m2_t merge,uint64_t*
> base,size_t vl)
> +{
> +  return __riscv_vle64_tumu(mask,merge,base,vl);
> +}
> +
> +vuint64m4_t
> +test___riscv_vle64_tumu(vbool16_t mask,vuint64m4_t merge,uint64_t*
> base,size_t vl)
> +{
> +  return __riscv_vle64_tumu(mask,merge,base,vl);
> +}
> +
> +vuint64m8_t
> +test___riscv_vle64_tumu(vbool8_t mask,vuint64m8_t merge,uint64_t*
> base,size_t vl)
> +{
> +  return __riscv_vle64_tumu(mask,merge,base,vl);
> +}
> +
> +vfloat64m1_t
> +test___riscv_vle64_tumu(vbool64_t mask,vfloat64m1_t merge,double*
> base,size_t vl)
> +{
> +  return __riscv_vle64_tumu(mask,merge,base,vl);
> +}
> +
> +vfloat64m2_t
> +test___riscv_vle64_tumu(vbool32_t mask,vfloat64m2_t merge,double*
> base,size_t vl)
> +{
> +  return __riscv_vle64_tumu(mask,merge,base,vl);
> +}
> +
> +vfloat64m4_t
> +test___riscv_vle64_tumu(vbool16_t mask,vfloat64m4_t merge,double*
> base,size_t vl)
> +{
> +  return __riscv_vle64_tumu(mask,merge,base,vl);
> +}
> +
> +vfloat64m8_t
> +test___riscv_vle64_tumu(vbool8_t mask,vfloat64m8_t merge,double*
> base,size_t vl)
> +{
> +  return __riscv_vle64_tumu(mask,merge,base,vl);
> +}
> +
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf8,\s*tu,\s*mu\s+vle8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t}
> 2 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf4,\s*tu,\s*mu\s+vle8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t}
> 2 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf2,\s*tu,\s*mu\s+vle8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t}
> 2 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m1,\s*tu,\s*mu\s+vle8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t}
> 2 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m2,\s*tu,\s*mu\s+vle8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t}
> 2 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m4,\s*tu,\s*mu\s+vle8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t}
> 2 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m8,\s*tu,\s*mu\s+vle8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t}
> 2 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf4,\s*tu,\s*mu\s+vle16\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t}
> 2 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf2,\s*tu,\s*mu\s+vle16\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t}
> 2 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m1,\s*tu,\s*mu\s+vle16\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t}
> 2 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m2,\s*tu,\s*mu\s+vle16\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t}
> 2 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m4,\s*tu,\s*mu\s+vle16\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t}
> 2 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m8,\s*tu,\s*mu\s+vle16\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t}
> 2 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*mf2,\s*tu,\s*mu\s+vle32\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t}
> 3 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m1,\s*tu,\s*mu\s+vle32\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t}
> 3 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m2,\s*tu,\s*mu\s+vle32\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t}
> 3 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m4,\s*tu,\s*mu\s+vle32\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t}
> 3 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m8,\s*tu,\s*mu\s+vle32\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t}
> 3 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m1,\s*tu,\s*mu\s+vle64\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t}
> 3 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m2,\s*tu,\s*mu\s+vle64\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t}
> 3 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m4,\s*tu,\s*mu\s+vle64\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t}
> 3 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m8,\s*tu,\s*mu\s+vle64\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t}
> 3 } } */
> diff --git a/gcc/testsuite/g++.target/riscv/rvv/base/vse-1.C
> b/gcc/testsuite/g++.target/riscv/rvv/base/vse-1.C
> new file mode 100644
> index 00000000000..8b969dc718f
> --- /dev/null
> +++ b/gcc/testsuite/g++.target/riscv/rvv/base/vse-1.C
> @@ -0,0 +1,685 @@
> +/* { dg-do compile } */
> +/* { dg-options "-march=rv32gcv -mabi=ilp32d -O3 -fno-schedule-insns
> -fno-schedule-insns2" } */
> +
> +#include "riscv_vector.h"
> +
> +void
> +test___riscv_vse8(int8_t* base,vint8mf8_t value,size_t vl)
> +{
> +  __riscv_vse8(base,value,vl);
> +}
> +
> +void
> +test___riscv_vse8(int8_t* base,vint8mf4_t value,size_t vl)
> +{
> +  __riscv_vse8(base,value,vl);
> +}
> +
> +void
> +test___riscv_vse8(int8_t* base,vint8mf2_t value,size_t vl)
> +{
> +  __riscv_vse8(base,value,vl);
> +}
> +
> +void
> +test___riscv_vse8(int8_t* base,vint8m1_t value,size_t vl)
> +{
> +  __riscv_vse8(base,value,vl);
> +}
> +
> +void
> +test___riscv_vse8(int8_t* base,vint8m2_t value,size_t vl)
> +{
> +  __riscv_vse8(base,value,vl);
> +}
> +
> +void
> +test___riscv_vse8(int8_t* base,vint8m4_t value,size_t vl)
> +{
> +  __riscv_vse8(base,value,vl);
> +}
> +
> +void
> +test___riscv_vse8(int8_t* base,vint8m8_t value,size_t vl)
> +{
> +  __riscv_vse8(base,value,vl);
> +}
> +
> +void
> +test___riscv_vse8(uint8_t* base,vuint8mf8_t value,size_t vl)
> +{
> +  __riscv_vse8(base,value,vl);
> +}
> +
> +void
> +test___riscv_vse8(uint8_t* base,vuint8mf4_t value,size_t vl)
> +{
> +  __riscv_vse8(base,value,vl);
> +}
> +
> +void
> +test___riscv_vse8(uint8_t* base,vuint8mf2_t value,size_t vl)
> +{
> +  __riscv_vse8(base,value,vl);
> +}
> +
> +void
> +test___riscv_vse8(uint8_t* base,vuint8m1_t value,size_t vl)
> +{
> +  __riscv_vse8(base,value,vl);
> +}
> +
> +void
> +test___riscv_vse8(uint8_t* base,vuint8m2_t value,size_t vl)
> +{
> +  __riscv_vse8(base,value,vl);
> +}
> +
> +void
> +test___riscv_vse8(uint8_t* base,vuint8m4_t value,size_t vl)
> +{
> +  __riscv_vse8(base,value,vl);
> +}
> +
> +void
> +test___riscv_vse8(uint8_t* base,vuint8m8_t value,size_t vl)
> +{
> +  __riscv_vse8(base,value,vl);
> +}
> +
> +void
> +test___riscv_vse8(vbool64_t mask,int8_t* base,vint8mf8_t value,size_t vl)
> +{
> +  __riscv_vse8(mask,base,value,vl);
> +}
> +
> +void
> +test___riscv_vse8(vbool32_t mask,int8_t* base,vint8mf4_t value,size_t vl)
> +{
> +  __riscv_vse8(mask,base,value,vl);
> +}
> +
> +void
> +test___riscv_vse8(vbool16_t mask,int8_t* base,vint8mf2_t value,size_t vl)
> +{
> +  __riscv_vse8(mask,base,value,vl);
> +}
> +
> +void
> +test___riscv_vse8(vbool8_t mask,int8_t* base,vint8m1_t value,size_t vl)
> +{
> +  __riscv_vse8(mask,base,value,vl);
> +}
> +
> +void
> +test___riscv_vse8(vbool4_t mask,int8_t* base,vint8m2_t value,size_t vl)
> +{
> +  __riscv_vse8(mask,base,value,vl);
> +}
> +
> +void
> +test___riscv_vse8(vbool2_t mask,int8_t* base,vint8m4_t value,size_t vl)
> +{
> +  __riscv_vse8(mask,base,value,vl);
> +}
> +
> +void
> +test___riscv_vse8(vbool1_t mask,int8_t* base,vint8m8_t value,size_t vl)
> +{
> +  __riscv_vse8(mask,base,value,vl);
> +}
> +
> +void
> +test___riscv_vse8(vbool64_t mask,uint8_t* base,vuint8mf8_t value,size_t
> vl)
> +{
> +  __riscv_vse8(mask,base,value,vl);
> +}
> +
> +void
> +test___riscv_vse8(vbool32_t mask,uint8_t* base,vuint8mf4_t value,size_t
> vl)
> +{
> +  __riscv_vse8(mask,base,value,vl);
> +}
> +
> +void
> +test___riscv_vse8(vbool16_t mask,uint8_t* base,vuint8mf2_t value,size_t
> vl)
> +{
> +  __riscv_vse8(mask,base,value,vl);
> +}
> +
> +void
> +test___riscv_vse8(vbool8_t mask,uint8_t* base,vuint8m1_t value,size_t vl)
> +{
> +  __riscv_vse8(mask,base,value,vl);
> +}
> +
> +void
> +test___riscv_vse8(vbool4_t mask,uint8_t* base,vuint8m2_t value,size_t vl)
> +{
> +  __riscv_vse8(mask,base,value,vl);
> +}
> +
> +void
> +test___riscv_vse8(vbool2_t mask,uint8_t* base,vuint8m4_t value,size_t vl)
> +{
> +  __riscv_vse8(mask,base,value,vl);
> +}
> +
> +void
> +test___riscv_vse8(vbool1_t mask,uint8_t* base,vuint8m8_t value,size_t vl)
> +{
> +  __riscv_vse8(mask,base,value,vl);
> +}
> +
> +void
> +test___riscv_vse16(int16_t* base,vint16mf4_t value,size_t vl)
> +{
> +  __riscv_vse16(base,value,vl);
> +}
> +
> +void
> +test___riscv_vse16(int16_t* base,vint16mf2_t value,size_t vl)
> +{
> +  __riscv_vse16(base,value,vl);
> +}
> +
> +void
> +test___riscv_vse16(int16_t* base,vint16m1_t value,size_t vl)
> +{
> +  __riscv_vse16(base,value,vl);
> +}
> +
> +void
> +test___riscv_vse16(int16_t* base,vint16m2_t value,size_t vl)
> +{
> +  __riscv_vse16(base,value,vl);
> +}
> +
> +void
> +test___riscv_vse16(int16_t* base,vint16m4_t value,size_t vl)
> +{
> +  __riscv_vse16(base,value,vl);
> +}
> +
> +void
> +test___riscv_vse16(int16_t* base,vint16m8_t value,size_t vl)
> +{
> +  __riscv_vse16(base,value,vl);
> +}
> +
> +void
> +test___riscv_vse16(uint16_t* base,vuint16mf4_t value,size_t vl)
> +{
> +  __riscv_vse16(base,value,vl);
> +}
> +
> +void
> +test___riscv_vse16(uint16_t* base,vuint16mf2_t value,size_t vl)
> +{
> +  __riscv_vse16(base,value,vl);
> +}
> +
> +void
> +test___riscv_vse16(uint16_t* base,vuint16m1_t value,size_t vl)
> +{
> +  __riscv_vse16(base,value,vl);
> +}
> +
> +void
> +test___riscv_vse16(uint16_t* base,vuint16m2_t value,size_t vl)
> +{
> +  __riscv_vse16(base,value,vl);
> +}
> +
> +void
> +test___riscv_vse16(uint16_t* base,vuint16m4_t value,size_t vl)
> +{
> +  __riscv_vse16(base,value,vl);
> +}
> +
> +void
> +test___riscv_vse16(uint16_t* base,vuint16m8_t value,size_t vl)
> +{
> +  __riscv_vse16(base,value,vl);
> +}
> +
> +void
> +test___riscv_vse16(vbool64_t mask,int16_t* base,vint16mf4_t value,size_t
> vl)
> +{
> +  __riscv_vse16(mask,base,value,vl);
> +}
> +
> +void
> +test___riscv_vse16(vbool32_t mask,int16_t* base,vint16mf2_t value,size_t
> vl)
> +{
> +  __riscv_vse16(mask,base,value,vl);
> +}
> +
> +void
> +test___riscv_vse16(vbool16_t mask,int16_t* base,vint16m1_t value,size_t
> vl)
> +{
> +  __riscv_vse16(mask,base,value,vl);
> +}
> +
> +void
> +test___riscv_vse16(vbool8_t mask,int16_t* base,vint16m2_t value,size_t vl)
> +{
> +  __riscv_vse16(mask,base,value,vl);
> +}
> +
> +void
> +test___riscv_vse16(vbool4_t mask,int16_t* base,vint16m4_t value,size_t vl)
> +{
> +  __riscv_vse16(mask,base,value,vl);
> +}
> +
> +void
> +test___riscv_vse16(vbool2_t mask,int16_t* base,vint16m8_t value,size_t vl)
> +{
> +  __riscv_vse16(mask,base,value,vl);
> +}
> +
> +void
> +test___riscv_vse16(vbool64_t mask,uint16_t* base,vuint16mf4_t
> value,size_t vl)
> +{
> +  __riscv_vse16(mask,base,value,vl);
> +}
> +
> +void
> +test___riscv_vse16(vbool32_t mask,uint16_t* base,vuint16mf2_t
> value,size_t vl)
> +{
> +  __riscv_vse16(mask,base,value,vl);
> +}
> +
> +void
> +test___riscv_vse16(vbool16_t mask,uint16_t* base,vuint16m1_t value,size_t
> vl)
> +{
> +  __riscv_vse16(mask,base,value,vl);
> +}
> +
> +void
> +test___riscv_vse16(vbool8_t mask,uint16_t* base,vuint16m2_t value,size_t
> vl)
> +{
> +  __riscv_vse16(mask,base,value,vl);
> +}
> +
> +void
> +test___riscv_vse16(vbool4_t mask,uint16_t* base,vuint16m4_t value,size_t
> vl)
> +{
> +  __riscv_vse16(mask,base,value,vl);
> +}
> +
> +void
> +test___riscv_vse16(vbool2_t mask,uint16_t* base,vuint16m8_t value,size_t
> vl)
> +{
> +  __riscv_vse16(mask,base,value,vl);
> +}
> +
> +void
> +test___riscv_vse32(int32_t* base,vint32mf2_t value,size_t vl)
> +{
> +  __riscv_vse32(base,value,vl);
> +}
> +
> +void
> +test___riscv_vse32(int32_t* base,vint32m1_t value,size_t vl)
> +{
> +  __riscv_vse32(base,value,vl);
> +}
> +
> +void
> +test___riscv_vse32(int32_t* base,vint32m2_t value,size_t vl)
> +{
> +  __riscv_vse32(base,value,vl);
> +}
> +
> +void
> +test___riscv_vse32(int32_t* base,vint32m4_t value,size_t vl)
> +{
> +  __riscv_vse32(base,value,vl);
> +}
> +
> +void
> +test___riscv_vse32(int32_t* base,vint32m8_t value,size_t vl)
> +{
> +  __riscv_vse32(base,value,vl);
> +}
> +
> +void
> +test___riscv_vse32(uint32_t* base,vuint32mf2_t value,size_t vl)
> +{
> +  __riscv_vse32(base,value,vl);
> +}
> +
> +void
> +test___riscv_vse32(uint32_t* base,vuint32m1_t value,size_t vl)
> +{
> +  __riscv_vse32(base,value,vl);
> +}
> +
> +void
> +test___riscv_vse32(uint32_t* base,vuint32m2_t value,size_t vl)
> +{
> +  __riscv_vse32(base,value,vl);
> +}
> +
> +void
> +test___riscv_vse32(uint32_t* base,vuint32m4_t value,size_t vl)
> +{
> +  __riscv_vse32(base,value,vl);
> +}
> +
> +void
> +test___riscv_vse32(uint32_t* base,vuint32m8_t value,size_t vl)
> +{
> +  __riscv_vse32(base,value,vl);
> +}
> +
> +void
> +test___riscv_vse32(float* base,vfloat32mf2_t value,size_t vl)
> +{
> +  __riscv_vse32(base,value,vl);
> +}
> +
> +void
> +test___riscv_vse32(float* base,vfloat32m1_t value,size_t vl)
> +{
> +  __riscv_vse32(base,value,vl);
> +}
> +
> +void
> +test___riscv_vse32(float* base,vfloat32m2_t value,size_t vl)
> +{
> +  __riscv_vse32(base,value,vl);
> +}
> +
> +void
> +test___riscv_vse32(float* base,vfloat32m4_t value,size_t vl)
> +{
> +  __riscv_vse32(base,value,vl);
> +}
> +
> +void
> +test___riscv_vse32(float* base,vfloat32m8_t value,size_t vl)
> +{
> +  __riscv_vse32(base,value,vl);
> +}
> +
> +void
> +test___riscv_vse32(vbool64_t mask,int32_t* base,vint32mf2_t value,size_t
> vl)
> +{
> +  __riscv_vse32(mask,base,value,vl);
> +}
> +
> +void
> +test___riscv_vse32(vbool32_t mask,int32_t* base,vint32m1_t value,size_t
> vl)
> +{
> +  __riscv_vse32(mask,base,value,vl);
> +}
> +
> +void
> +test___riscv_vse32(vbool16_t mask,int32_t* base,vint32m2_t value,size_t
> vl)
> +{
> +  __riscv_vse32(mask,base,value,vl);
> +}
> +
> +void
> +test___riscv_vse32(vbool8_t mask,int32_t* base,vint32m4_t value,size_t vl)
> +{
> +  __riscv_vse32(mask,base,value,vl);
> +}
> +
> +void
> +test___riscv_vse32(vbool4_t mask,int32_t* base,vint32m8_t value,size_t vl)
> +{
> +  __riscv_vse32(mask,base,value,vl);
> +}
> +
> +void
> +test___riscv_vse32(vbool64_t mask,uint32_t* base,vuint32mf2_t
> value,size_t vl)
> +{
> +  __riscv_vse32(mask,base,value,vl);
> +}
> +
> +void
> +test___riscv_vse32(vbool32_t mask,uint32_t* base,vuint32m1_t value,size_t
> vl)
> +{
> +  __riscv_vse32(mask,base,value,vl);
> +}
> +
> +void
> +test___riscv_vse32(vbool16_t mask,uint32_t* base,vuint32m2_t value,size_t
> vl)
> +{
> +  __riscv_vse32(mask,base,value,vl);
> +}
> +
> +void
> +test___riscv_vse32(vbool8_t mask,uint32_t* base,vuint32m4_t value,size_t
> vl)
> +{
> +  __riscv_vse32(mask,base,value,vl);
> +}
> +
> +void
> +test___riscv_vse32(vbool4_t mask,uint32_t* base,vuint32m8_t value,size_t
> vl)
> +{
> +  __riscv_vse32(mask,base,value,vl);
> +}
> +
> +void
> +test___riscv_vse32(vbool64_t mask,float* base,vfloat32mf2_t value,size_t
> vl)
> +{
> +  __riscv_vse32(mask,base,value,vl);
> +}
> +
> +void
> +test___riscv_vse32(vbool32_t mask,float* base,vfloat32m1_t value,size_t
> vl)
> +{
> +  __riscv_vse32(mask,base,value,vl);
> +}
> +
> +void
> +test___riscv_vse32(vbool16_t mask,float* base,vfloat32m2_t value,size_t
> vl)
> +{
> +  __riscv_vse32(mask,base,value,vl);
> +}
> +
> +void
> +test___riscv_vse32(vbool8_t mask,float* base,vfloat32m4_t value,size_t vl)
> +{
> +  __riscv_vse32(mask,base,value,vl);
> +}
> +
> +void
> +test___riscv_vse32(vbool4_t mask,float* base,vfloat32m8_t value,size_t vl)
> +{
> +  __riscv_vse32(mask,base,value,vl);
> +}
> +
> +void
> +test___riscv_vse64(int64_t* base,vint64m1_t value,size_t vl)
> +{
> +  __riscv_vse64(base,value,vl);
> +}
> +
> +void
> +test___riscv_vse64(int64_t* base,vint64m2_t value,size_t vl)
> +{
> +  __riscv_vse64(base,value,vl);
> +}
> +
> +void
> +test___riscv_vse64(int64_t* base,vint64m4_t value,size_t vl)
> +{
> +  __riscv_vse64(base,value,vl);
> +}
> +
> +void
> +test___riscv_vse64(int64_t* base,vint64m8_t value,size_t vl)
> +{
> +  __riscv_vse64(base,value,vl);
> +}
> +
> +void
> +test___riscv_vse64(uint64_t* base,vuint64m1_t value,size_t vl)
> +{
> +  __riscv_vse64(base,value,vl);
> +}
> +
> +void
> +test___riscv_vse64(uint64_t* base,vuint64m2_t value,size_t vl)
> +{
> +  __riscv_vse64(base,value,vl);
> +}
> +
> +void
> +test___riscv_vse64(uint64_t* base,vuint64m4_t value,size_t vl)
> +{
> +  __riscv_vse64(base,value,vl);
> +}
> +
> +void
> +test___riscv_vse64(uint64_t* base,vuint64m8_t value,size_t vl)
> +{
> +  __riscv_vse64(base,value,vl);
> +}
> +
> +void
> +test___riscv_vse64(double* base,vfloat64m1_t value,size_t vl)
> +{
> +  __riscv_vse64(base,value,vl);
> +}
> +
> +void
> +test___riscv_vse64(double* base,vfloat64m2_t value,size_t vl)
> +{
> +  __riscv_vse64(base,value,vl);
> +}
> +
> +void
> +test___riscv_vse64(double* base,vfloat64m4_t value,size_t vl)
> +{
> +  __riscv_vse64(base,value,vl);
> +}
> +
> +void
> +test___riscv_vse64(double* base,vfloat64m8_t value,size_t vl)
> +{
> +  __riscv_vse64(base,value,vl);
> +}
> +
> +void
> +test___riscv_vse64(vbool64_t mask,int64_t* base,vint64m1_t value,size_t
> vl)
> +{
> +  __riscv_vse64(mask,base,value,vl);
> +}
> +
> +void
> +test___riscv_vse64(vbool32_t mask,int64_t* base,vint64m2_t value,size_t
> vl)
> +{
> +  __riscv_vse64(mask,base,value,vl);
> +}
> +
> +void
> +test___riscv_vse64(vbool16_t mask,int64_t* base,vint64m4_t value,size_t
> vl)
> +{
> +  __riscv_vse64(mask,base,value,vl);
> +}
> +
> +void
> +test___riscv_vse64(vbool8_t mask,int64_t* base,vint64m8_t value,size_t vl)
> +{
> +  __riscv_vse64(mask,base,value,vl);
> +}
> +
> +void
> +test___riscv_vse64(vbool64_t mask,uint64_t* base,vuint64m1_t value,size_t
> vl)
> +{
> +  __riscv_vse64(mask,base,value,vl);
> +}
> +
> +void
> +test___riscv_vse64(vbool32_t mask,uint64_t* base,vuint64m2_t value,size_t
> vl)
> +{
> +  __riscv_vse64(mask,base,value,vl);
> +}
> +
> +void
> +test___riscv_vse64(vbool16_t mask,uint64_t* base,vuint64m4_t value,size_t
> vl)
> +{
> +  __riscv_vse64(mask,base,value,vl);
> +}
> +
> +void
> +test___riscv_vse64(vbool8_t mask,uint64_t* base,vuint64m8_t value,size_t
> vl)
> +{
> +  __riscv_vse64(mask,base,value,vl);
> +}
> +
> +void
> +test___riscv_vse64(vbool64_t mask,double* base,vfloat64m1_t value,size_t
> vl)
> +{
> +  __riscv_vse64(mask,base,value,vl);
> +}
> +
> +void
> +test___riscv_vse64(vbool32_t mask,double* base,vfloat64m2_t value,size_t
> vl)
> +{
> +  __riscv_vse64(mask,base,value,vl);
> +}
> +
> +void
> +test___riscv_vse64(vbool16_t mask,double* base,vfloat64m4_t value,size_t
> vl)
> +{
> +  __riscv_vse64(mask,base,value,vl);
> +}
> +
> +void
> +test___riscv_vse64(vbool8_t mask,double* base,vfloat64m8_t value,size_t
> vl)
> +{
> +  __riscv_vse64(mask,base,value,vl);
> +}
> +
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf8,\s*t[au],\s*m[au]\s+vse8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)\s+}
> 2 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf4,\s*t[au],\s*m[au]\s+vse8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)\s+}
> 2 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf2,\s*t[au],\s*m[au]\s+vse8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)\s+}
> 2 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m1,\s*t[au],\s*m[au]\s+vse8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)\s+}
> 2 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m2,\s*t[au],\s*m[au]\s+vse8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)\s+}
> 2 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m4,\s*t[au],\s*m[au]\s+vse8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)\s+}
> 2 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m8,\s*t[au],\s*m[au]\s+vse8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)\s+}
> 2 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf8,\s*t[au],\s*m[au]\s+vse8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t}
> 2 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf4,\s*t[au],\s*m[au]\s+vse8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t}
> 2 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf2,\s*t[au],\s*m[au]\s+vse8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t}
> 2 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m1,\s*t[au],\s*m[au]\s+vse8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t}
> 2 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m2,\s*t[au],\s*m[au]\s+vse8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t}
> 2 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m4,\s*t[au],\s*m[au]\s+vse8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t}
> 2 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m8,\s*t[au],\s*m[au]\s+vse8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t}
> 2 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf4,\s*t[au],\s*m[au]\s+vse16\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)\s+}
> 2 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf2,\s*t[au],\s*m[au]\s+vse16\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)\s+}
> 2 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m1,\s*t[au],\s*m[au]\s+vse16\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)\s+}
> 2 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m2,\s*t[au],\s*m[au]\s+vse16\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)\s+}
> 2 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m4,\s*t[au],\s*m[au]\s+vse16\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)\s+}
> 2 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m8,\s*t[au],\s*m[au]\s+vse16\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)\s+}
> 2 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf4,\s*t[au],\s*m[au]\s+vse16\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t}
> 2 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf2,\s*t[au],\s*m[au]\s+vse16\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t}
> 2 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m1,\s*t[au],\s*m[au]\s+vse16\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t}
> 2 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m2,\s*t[au],\s*m[au]\s+vse16\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t}
> 2 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m4,\s*t[au],\s*m[au]\s+vse16\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t}
> 2 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m8,\s*t[au],\s*m[au]\s+vse16\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t}
> 2 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*mf2,\s*t[au],\s*m[au]\s+vse32\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)\s+}
> 3 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m1,\s*t[au],\s*m[au]\s+vse32\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)\s+}
> 3 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m2,\s*t[au],\s*m[au]\s+vse32\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)\s+}
> 3 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m4,\s*t[au],\s*m[au]\s+vse32\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)\s+}
> 3 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m8,\s*t[au],\s*m[au]\s+vse32\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)\s+}
> 3 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*mf2,\s*t[au],\s*m[au]\s+vse32\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t}
> 3 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m1,\s*t[au],\s*m[au]\s+vse32\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t}
> 3 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m2,\s*t[au],\s*m[au]\s+vse32\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t}
> 3 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m4,\s*t[au],\s*m[au]\s+vse32\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t}
> 3 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m8,\s*t[au],\s*m[au]\s+vse32\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t}
> 3 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m1,\s*t[au],\s*m[au]\s+vse64\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)\s+}
> 3 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m2,\s*t[au],\s*m[au]\s+vse64\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)\s+}
> 3 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m4,\s*t[au],\s*m[au]\s+vse64\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)\s+}
> 3 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m8,\s*t[au],\s*m[au]\s+vse64\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)\s+}
> 3 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m1,\s*t[au],\s*m[au]\s+vse64\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t}
> 3 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m2,\s*t[au],\s*m[au]\s+vse64\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t}
> 3 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m4,\s*t[au],\s*m[au]\s+vse64\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t}
> 3 } } */
> +/* { dg-final { scan-assembler-times
> {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m8,\s*t[au],\s*m[au]\s+vse64\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t}
> 3 } } */
> --
> 2.36.3
>
>