* [PATCH] RISC-V: Add testcases for RVV auto-vectorization
@ 2023-04-07 1:37 juzhe.zhong
2023-04-28 22:02 ` Jeff Law
0 siblings, 1 reply; 2+ messages in thread
From: juzhe.zhong @ 2023-04-07 1:37 UTC (permalink / raw)
To: gcc-patches; +Cc: kito.cheng, palmer, jeffreyalaw, Juzhe-Zhong
From: Juzhe-Zhong <juzhe.zhong@rivai.ai>
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/rvv.exp: Add auto-vectorization testing.
* gcc.target/riscv/rvv/vsetvl/vsetvl-17.c: Adapt testcase.
* gcc.target/riscv/rvv/autovec/partial/multiple_rgroup-1.c: New test.
* gcc.target/riscv/rvv/autovec/partial/multiple_rgroup-1.h: New test.
* gcc.target/riscv/rvv/autovec/partial/multiple_rgroup-2.c: New test.
* gcc.target/riscv/rvv/autovec/partial/multiple_rgroup-2.h: New test.
* gcc.target/riscv/rvv/autovec/partial/multiple_rgroup_run-1.c: New test.
* gcc.target/riscv/rvv/autovec/partial/multiple_rgroup_run-2.c: New test.
* gcc.target/riscv/rvv/autovec/partial/single_rgroup-1.c: New test.
* gcc.target/riscv/rvv/autovec/partial/single_rgroup-1.h: New test.
* gcc.target/riscv/rvv/autovec/partial/single_rgroup_run-1.c: New test.
* gcc.target/riscv/rvv/autovec/template-1.h: New test.
* gcc.target/riscv/rvv/autovec/v-1.c: New test.
* gcc.target/riscv/rvv/autovec/v-2.c: New test.
* gcc.target/riscv/rvv/autovec/zve32f-1.c: New test.
* gcc.target/riscv/rvv/autovec/zve32f-2.c: New test.
* gcc.target/riscv/rvv/autovec/zve32f-3.c: New test.
* gcc.target/riscv/rvv/autovec/zve32f_zvl128b-1.c: New test.
* gcc.target/riscv/rvv/autovec/zve32f_zvl128b-2.c: New test.
* gcc.target/riscv/rvv/autovec/zve32x-1.c: New test.
* gcc.target/riscv/rvv/autovec/zve32x-2.c: New test.
* gcc.target/riscv/rvv/autovec/zve32x-3.c: New test.
* gcc.target/riscv/rvv/autovec/zve32x_zvl128b-1.c: New test.
* gcc.target/riscv/rvv/autovec/zve32x_zvl128b-2.c: New test.
* gcc.target/riscv/rvv/autovec/zve64d-1.c: New test.
* gcc.target/riscv/rvv/autovec/zve64d-2.c: New test.
* gcc.target/riscv/rvv/autovec/zve64d-3.c: New test.
* gcc.target/riscv/rvv/autovec/zve64d_zvl128b-1.c: New test.
* gcc.target/riscv/rvv/autovec/zve64d_zvl128b-2.c: New test.
* gcc.target/riscv/rvv/autovec/zve64f-1.c: New test.
* gcc.target/riscv/rvv/autovec/zve64f-2.c: New test.
* gcc.target/riscv/rvv/autovec/zve64f-3.c: New test.
* gcc.target/riscv/rvv/autovec/zve64f_zvl128b-1.c: New test.
* gcc.target/riscv/rvv/autovec/zve64f_zvl128b-2.c: New test.
* gcc.target/riscv/rvv/autovec/zve64x-1.c: New test.
* gcc.target/riscv/rvv/autovec/zve64x-2.c: New test.
* gcc.target/riscv/rvv/autovec/zve64x-3.c: New test.
* gcc.target/riscv/rvv/autovec/zve64x_zvl128b-1.c: New test.
* gcc.target/riscv/rvv/autovec/zve64x_zvl128b-2.c: New test.
---
.../rvv/autovec/partial/multiple_rgroup-1.c | 6 +
.../rvv/autovec/partial/multiple_rgroup-1.h | 304 ++++++++++
.../rvv/autovec/partial/multiple_rgroup-2.c | 6 +
.../rvv/autovec/partial/multiple_rgroup-2.h | 546 ++++++++++++++++++
.../autovec/partial/multiple_rgroup_run-1.c | 19 +
.../autovec/partial/multiple_rgroup_run-2.c | 19 +
.../rvv/autovec/partial/single_rgroup-1.c | 8 +
.../rvv/autovec/partial/single_rgroup-1.h | 106 ++++
.../rvv/autovec/partial/single_rgroup_run-1.c | 19 +
.../gcc.target/riscv/rvv/autovec/template-1.h | 68 +++
.../gcc.target/riscv/rvv/autovec/v-1.c | 4 +
.../gcc.target/riscv/rvv/autovec/v-2.c | 6 +
.../gcc.target/riscv/rvv/autovec/zve32f-1.c | 4 +
.../gcc.target/riscv/rvv/autovec/zve32f-2.c | 5 +
.../gcc.target/riscv/rvv/autovec/zve32f-3.c | 6 +
.../riscv/rvv/autovec/zve32f_zvl128b-1.c | 4 +
.../riscv/rvv/autovec/zve32f_zvl128b-2.c | 6 +
.../gcc.target/riscv/rvv/autovec/zve32x-1.c | 4 +
.../gcc.target/riscv/rvv/autovec/zve32x-2.c | 6 +
.../gcc.target/riscv/rvv/autovec/zve32x-3.c | 6 +
.../riscv/rvv/autovec/zve32x_zvl128b-1.c | 5 +
.../riscv/rvv/autovec/zve32x_zvl128b-2.c | 6 +
.../gcc.target/riscv/rvv/autovec/zve64d-1.c | 4 +
.../gcc.target/riscv/rvv/autovec/zve64d-2.c | 4 +
.../gcc.target/riscv/rvv/autovec/zve64d-3.c | 6 +
.../riscv/rvv/autovec/zve64d_zvl128b-1.c | 4 +
.../riscv/rvv/autovec/zve64d_zvl128b-2.c | 6 +
.../gcc.target/riscv/rvv/autovec/zve64f-1.c | 4 +
.../gcc.target/riscv/rvv/autovec/zve64f-2.c | 4 +
.../gcc.target/riscv/rvv/autovec/zve64f-3.c | 6 +
.../riscv/rvv/autovec/zve64f_zvl128b-1.c | 4 +
.../riscv/rvv/autovec/zve64f_zvl128b-2.c | 6 +
.../gcc.target/riscv/rvv/autovec/zve64x-1.c | 4 +
.../gcc.target/riscv/rvv/autovec/zve64x-2.c | 4 +
.../gcc.target/riscv/rvv/autovec/zve64x-3.c | 6 +
.../riscv/rvv/autovec/zve64x_zvl128b-1.c | 4 +
.../riscv/rvv/autovec/zve64x_zvl128b-2.c | 6 +
gcc/testsuite/gcc.target/riscv/rvv/rvv.exp | 16 +
.../gcc.target/riscv/rvv/vsetvl/vsetvl-17.c | 2 +-
39 files changed, 1252 insertions(+), 1 deletion(-)
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/multiple_rgroup-1.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/multiple_rgroup-1.h
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/multiple_rgroup-2.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/multiple_rgroup-2.h
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/multiple_rgroup_run-1.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/multiple_rgroup_run-2.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/single_rgroup-1.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/single_rgroup-1.h
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/single_rgroup_run-1.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/template-1.h
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/v-1.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/v-2.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/zve32f-1.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/zve32f-2.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/zve32f-3.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/zve32f_zvl128b-1.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/zve32f_zvl128b-2.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/zve32x-1.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/zve32x-2.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/zve32x-3.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/zve32x_zvl128b-1.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/zve32x_zvl128b-2.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/zve64d-1.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/zve64d-2.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/zve64d-3.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/zve64d_zvl128b-1.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/zve64d_zvl128b-2.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/zve64f-1.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/zve64f-2.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/zve64f-3.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/zve64f_zvl128b-1.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/zve64f_zvl128b-2.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/zve64x-1.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/zve64x-2.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/zve64x-3.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/zve64x_zvl128b-1.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/zve64x_zvl128b-2.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/multiple_rgroup-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/multiple_rgroup-1.c
new file mode 100644
index 00000000000..69cc3be78f7
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/multiple_rgroup-1.c
@@ -0,0 +1,6 @@
+/* { dg-do compile } */
+/* { dg-additional-options "-march=rv32gcv -mabi=ilp32d --param riscv-autovec-preference=fixed-vlmax" } */
+
+#include "multiple_rgroup-1.h"
+
+TEST_ALL (test_1)
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/multiple_rgroup-1.h b/gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/multiple_rgroup-1.h
new file mode 100644
index 00000000000..755ee2b3616
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/multiple_rgroup-1.h
@@ -0,0 +1,304 @@
+#include <stddef.h>
+#include <stdint.h>
+
+#define test_1(TYPE1, TYPE2) \
+ void __attribute__ ((noinline, noclone)) \
+ test_1_##TYPE1_##TYPE2 (TYPE1 *__restrict f, TYPE2 *__restrict d, TYPE1 x, \
+ TYPE1 x2, TYPE2 y, int n) \
+ { \
+ for (int i = 0; i < n; ++i) \
+ { \
+ f[i * 2 + 0] = x; \
+ f[i * 2 + 1] = x2; \
+ d[i] = y; \
+ } \
+ }
+
+#define run_1(TYPE1, TYPE2) \
+ int n_1_##TYPE1_##TYPE2 = 1; \
+ TYPE1 x_1_##TYPE1 = 117; \
+ TYPE1 x2_1_##TYPE1 = 232; \
+ TYPE2 y_1_##TYPE2 = 9762; \
+ TYPE1 f_1_##TYPE1[2 * 2 + 1] = {0}; \
+ TYPE2 d_1_##TYPE2[2] = {0}; \
+ test_1_##TYPE1_##TYPE2 (f_1_##TYPE1, d_1_##TYPE2, x_1_##TYPE1, x2_1_##TYPE1, \
+ y_1_##TYPE2, n_1_##TYPE1_##TYPE2); \
+ for (int i = 0; i < n_1_##TYPE1_##TYPE2; ++i) \
+ { \
+ if (f_1_##TYPE1[i * 2 + 0] != x_1_##TYPE1) \
+ __builtin_abort (); \
+ if (f_1_##TYPE1[i * 2 + 1] != x2_1_##TYPE1) \
+ __builtin_abort (); \
+ if (d_1_##TYPE2[i] != y_1_##TYPE2) \
+ __builtin_abort (); \
+ } \
+ for (int i = n_1_##TYPE1_##TYPE2; i < n_1_##TYPE1_##TYPE2 + 1; ++i) \
+ { \
+ if (f_1_##TYPE1[i * 2 + 0] != 0) \
+ __builtin_abort (); \
+ if (f_1_##TYPE1[i * 2 + 1] != 0) \
+ __builtin_abort (); \
+ if (d_1_##TYPE2[i] != 0) \
+ __builtin_abort (); \
+ }
+
+#define run_2(TYPE1, TYPE2) \
+ int n_2_##TYPE1_##TYPE2 = 17; \
+ TYPE1 x_2_##TYPE1 = 133; \
+ TYPE1 x2_2_##TYPE1 = 94; \
+ TYPE2 y_2_##TYPE2 = 8672; \
+ TYPE1 f_2_##TYPE1[18 * 2 + 1] = {0}; \
+ TYPE2 d_2_##TYPE2[18] = {0}; \
+ test_1_##TYPE1_##TYPE2 (f_2_##TYPE1, d_2_##TYPE2, x_2_##TYPE1, x2_2_##TYPE1, \
+ y_2_##TYPE2, n_2_##TYPE1_##TYPE2); \
+ for (int i = 0; i < n_2_##TYPE1_##TYPE2; ++i) \
+ { \
+ if (f_2_##TYPE1[i * 2 + 0] != x_2_##TYPE1) \
+ __builtin_abort (); \
+ if (f_2_##TYPE1[i * 2 + 1] != x2_2_##TYPE1) \
+ __builtin_abort (); \
+ if (d_2_##TYPE2[i] != y_2_##TYPE2) \
+ __builtin_abort (); \
+ } \
+ for (int i = n_2_##TYPE1_##TYPE2; i < n_2_##TYPE1_##TYPE2 + 1; ++i) \
+ { \
+ if (f_2_##TYPE1[i * 2 + 0] != 0) \
+ __builtin_abort (); \
+ if (f_2_##TYPE1[i * 2 + 1] != 0) \
+ __builtin_abort (); \
+ if (d_2_##TYPE2[i] != 0) \
+ __builtin_abort (); \
+ }
+
+#define run_3(TYPE1, TYPE2) \
+ int n_3_##TYPE1_##TYPE2 = 32; \
+ TYPE1 x_3_##TYPE1 = 233; \
+ TYPE1 x2_3_##TYPE1 = 78; \
+ TYPE2 y_3_##TYPE2 = 1234; \
+ TYPE1 f_3_##TYPE1[33 * 2 + 1] = {0}; \
+ TYPE2 d_3_##TYPE2[33] = {0}; \
+ test_1_##TYPE1_##TYPE2 (f_3_##TYPE1, d_3_##TYPE2, x_3_##TYPE1, x2_3_##TYPE1, \
+ y_3_##TYPE2, n_3_##TYPE1_##TYPE2); \
+ for (int i = 0; i < n_3_##TYPE1_##TYPE2; ++i) \
+ { \
+ if (f_3_##TYPE1[i * 2 + 0] != x_3_##TYPE1) \
+ __builtin_abort (); \
+ if (f_3_##TYPE1[i * 2 + 1] != x2_3_##TYPE1) \
+ __builtin_abort (); \
+ if (d_3_##TYPE2[i] != y_3_##TYPE2) \
+ __builtin_abort (); \
+ } \
+ for (int i = n_3_##TYPE1_##TYPE2; i < n_3_##TYPE1_##TYPE2 + 1; ++i) \
+ { \
+ if (f_3_##TYPE1[i * 2 + 0] != 0) \
+ __builtin_abort (); \
+ if (f_3_##TYPE1[i * 2 + 1] != 0) \
+ __builtin_abort (); \
+ if (d_3_##TYPE2[i] != 0) \
+ __builtin_abort (); \
+ }
+
+#define run_4(TYPE1, TYPE2) \
+ int n_4_##TYPE1_##TYPE2 = 128; \
+ TYPE1 x_4_##TYPE1 = 222; \
+ TYPE1 x2_4_##TYPE1 = 59; \
+ TYPE2 y_4_##TYPE2 = 4321; \
+ TYPE1 f_4_##TYPE1[129 * 2 + 1] = {0}; \
+ TYPE2 d_4_##TYPE2[129] = {0}; \
+ test_1_##TYPE1_##TYPE2 (f_4_##TYPE1, d_4_##TYPE2, x_4_##TYPE1, x2_4_##TYPE1, \
+ y_4_##TYPE2, n_4_##TYPE1_##TYPE2); \
+ for (int i = 0; i < n_4_##TYPE1_##TYPE2; ++i) \
+ { \
+ if (f_4_##TYPE1[i * 2 + 0] != x_4_##TYPE1) \
+ __builtin_abort (); \
+ if (f_4_##TYPE1[i * 2 + 1] != x2_4_##TYPE1) \
+ __builtin_abort (); \
+ if (d_4_##TYPE2[i] != y_4_##TYPE2) \
+ __builtin_abort (); \
+ } \
+ for (int i = n_4_##TYPE1_##TYPE2; i < n_4_##TYPE1_##TYPE2 + 1; ++i) \
+ { \
+ if (f_4_##TYPE1[i * 2 + 0] != 0) \
+ __builtin_abort (); \
+ if (f_4_##TYPE1[i * 2 + 1] != 0) \
+ __builtin_abort (); \
+ if (d_4_##TYPE2[i] != 0) \
+ __builtin_abort (); \
+ }
+
+#define run_5(TYPE1, TYPE2) \
+ int n_5_##TYPE1_##TYPE2 = 177; \
+ TYPE1 x_5_##TYPE1 = 111; \
+ TYPE1 x2_5_##TYPE1 = 189; \
+ TYPE2 y_5_##TYPE2 = 5555; \
+ TYPE1 f_5_##TYPE1[178 * 2 + 1] = {0}; \
+ TYPE2 d_5_##TYPE2[178] = {0}; \
+ test_1_##TYPE1_##TYPE2 (f_5_##TYPE1, d_5_##TYPE2, x_5_##TYPE1, x2_5_##TYPE1, \
+ y_5_##TYPE2, n_5_##TYPE1_##TYPE2); \
+ for (int i = 0; i < n_5_##TYPE1_##TYPE2; ++i) \
+ { \
+ if (f_5_##TYPE1[i * 2 + 0] != x_5_##TYPE1) \
+ __builtin_abort (); \
+ if (f_5_##TYPE1[i * 2 + 1] != x2_5_##TYPE1) \
+ __builtin_abort (); \
+ if (d_5_##TYPE2[i] != y_5_##TYPE2) \
+ __builtin_abort (); \
+ } \
+ for (int i = n_5_##TYPE1_##TYPE2; i < n_5_##TYPE1_##TYPE2 + 1; ++i) \
+ { \
+ if (f_5_##TYPE1[i * 2 + 0] != 0) \
+ __builtin_abort (); \
+ if (f_5_##TYPE1[i * 2 + 1] != 0) \
+ __builtin_abort (); \
+ if (d_5_##TYPE2[i] != 0) \
+ __builtin_abort (); \
+ }
+
+#define run_6(TYPE1, TYPE2) \
+ int n_6_##TYPE1_##TYPE2 = 255; \
+ TYPE1 x_6_##TYPE1 = 123; \
+ TYPE1 x2_6_##TYPE1 = 132; \
+ TYPE2 y_6_##TYPE2 = 6655; \
+ TYPE1 f_6_##TYPE1[256 * 2 + 1] = {0}; \
+ TYPE2 d_6_##TYPE2[256] = {0}; \
+ test_1_##TYPE1_##TYPE2 (f_6_##TYPE1, d_6_##TYPE2, x_6_##TYPE1, x2_6_##TYPE1, \
+ y_6_##TYPE2, n_6_##TYPE1_##TYPE2); \
+ for (int i = 0; i < n_6_##TYPE1_##TYPE2; ++i) \
+ { \
+ if (f_6_##TYPE1[i * 2 + 0] != x_6_##TYPE1) \
+ __builtin_abort (); \
+ if (f_6_##TYPE1[i * 2 + 1] != x2_6_##TYPE1) \
+ __builtin_abort (); \
+ if (d_6_##TYPE2[i] != y_6_##TYPE2) \
+ __builtin_abort (); \
+ } \
+ for (int i = n_6_##TYPE1_##TYPE2; i < n_6_##TYPE1_##TYPE2 + 1; ++i) \
+ { \
+ if (f_6_##TYPE1[i * 2 + 0] != 0) \
+ __builtin_abort (); \
+ if (f_6_##TYPE1[i * 2 + 1] != 0) \
+ __builtin_abort (); \
+ if (d_6_##TYPE2[i] != 0) \
+ __builtin_abort (); \
+ }
+
+#define run_7(TYPE1, TYPE2) \
+ int n_7_##TYPE1_##TYPE2 = 333; \
+ TYPE1 x_7_##TYPE1 = 39; \
+ TYPE1 x2_7_##TYPE1 = 59; \
+ TYPE2 y_7_##TYPE2 = 5968; \
+ TYPE1 f_7_##TYPE1[334 * 2 + 1] = {0}; \
+ TYPE2 d_7_##TYPE2[334] = {0}; \
+ test_1_##TYPE1_##TYPE2 (f_7_##TYPE1, d_7_##TYPE2, x_7_##TYPE1, x2_7_##TYPE1, \
+ y_7_##TYPE2, n_7_##TYPE1_##TYPE2); \
+ for (int i = 0; i < n_7_##TYPE1_##TYPE2; ++i) \
+ { \
+ if (f_7_##TYPE1[i * 2 + 0] != x_7_##TYPE1) \
+ __builtin_abort (); \
+ if (f_7_##TYPE1[i * 2 + 1] != x2_7_##TYPE1) \
+ __builtin_abort (); \
+ if (d_7_##TYPE2[i] != y_7_##TYPE2) \
+ __builtin_abort (); \
+ } \
+ for (int i = n_7_##TYPE1_##TYPE2; i < n_7_##TYPE1_##TYPE2 + 1; ++i) \
+ { \
+ if (f_7_##TYPE1[i * 2 + 0] != 0) \
+ __builtin_abort (); \
+ if (f_7_##TYPE1[i * 2 + 1] != 0) \
+ __builtin_abort (); \
+ if (d_7_##TYPE2[i] != 0) \
+ __builtin_abort (); \
+ }
+
+#define run_8(TYPE1, TYPE2) \
+ int n_8_##TYPE1_##TYPE2 = 512; \
+ TYPE1 x_8_##TYPE1 = 71; \
+ TYPE1 x2_8_##TYPE1 = 255; \
+ TYPE2 y_8_##TYPE2 = 3366; \
+ TYPE1 f_8_##TYPE1[513 * 2 + 1] = {0}; \
+ TYPE2 d_8_##TYPE2[513] = {0}; \
+ test_1_##TYPE1_##TYPE2 (f_8_##TYPE1, d_8_##TYPE2, x_8_##TYPE1, x2_8_##TYPE1, \
+ y_8_##TYPE2, n_8_##TYPE1_##TYPE2); \
+ for (int i = 0; i < n_8_##TYPE1_##TYPE2; ++i) \
+ { \
+ if (f_8_##TYPE1[i * 2 + 0] != x_8_##TYPE1) \
+ __builtin_abort (); \
+ if (f_8_##TYPE1[i * 2 + 1] != x2_8_##TYPE1) \
+ __builtin_abort (); \
+ if (d_8_##TYPE2[i] != y_8_##TYPE2) \
+ __builtin_abort (); \
+ } \
+ for (int i = n_8_##TYPE1_##TYPE2; i < n_8_##TYPE1_##TYPE2 + 1; ++i) \
+ { \
+ if (f_8_##TYPE1[i * 2 + 0] != 0) \
+ __builtin_abort (); \
+ if (f_8_##TYPE1[i * 2 + 1] != 0) \
+ __builtin_abort (); \
+ if (d_8_##TYPE2[i] != 0) \
+ __builtin_abort (); \
+ }
+
+#define run_9(TYPE1, TYPE2) \
+ int n_9_##TYPE1_##TYPE2 = 637; \
+ TYPE1 x_9_##TYPE1 = 157; \
+ TYPE1 x2_9_##TYPE1 = 89; \
+ TYPE2 y_9_##TYPE2 = 5511; \
+ TYPE1 f_9_##TYPE1[638 * 2 + 1] = {0}; \
+ TYPE2 d_9_##TYPE2[638] = {0}; \
+ test_1_##TYPE1_##TYPE2 (f_9_##TYPE1, d_9_##TYPE2, x_9_##TYPE1, x2_9_##TYPE1, \
+ y_9_##TYPE2, n_9_##TYPE1_##TYPE2); \
+ for (int i = 0; i < n_9_##TYPE1_##TYPE2; ++i) \
+ { \
+ if (f_9_##TYPE1[i * 2 + 0] != x_9_##TYPE1) \
+ __builtin_abort (); \
+ if (f_9_##TYPE1[i * 2 + 1] != x2_9_##TYPE1) \
+ __builtin_abort (); \
+ if (d_9_##TYPE2[i] != y_9_##TYPE2) \
+ __builtin_abort (); \
+ } \
+ for (int i = n_9_##TYPE1_##TYPE2; i < n_9_##TYPE1_##TYPE2 + 1; ++i) \
+ { \
+ if (f_9_##TYPE1[i * 2 + 0] != 0) \
+ __builtin_abort (); \
+ if (f_9_##TYPE1[i * 2 + 1] != 0) \
+ __builtin_abort (); \
+ if (d_9_##TYPE2[i] != 0) \
+ __builtin_abort (); \
+ }
+
+#define run_10(TYPE1, TYPE2) \
+ int n_10_##TYPE1_##TYPE2 = 777; \
+ TYPE1 x_10_##TYPE1 = 203; \
+ TYPE1 x2_10_##TYPE1 = 200; \
+ TYPE2 y_10_##TYPE2 = 2023; \
+ TYPE1 f_10_##TYPE1[778 * 2 + 1] = {0}; \
+ TYPE2 d_10_##TYPE2[778] = {0}; \
+ test_1_##TYPE1_##TYPE2 (f_10_##TYPE1, d_10_##TYPE2, x_10_##TYPE1, \
+ x2_10_##TYPE1, y_10_##TYPE2, n_10_##TYPE1_##TYPE2); \
+ for (int i = 0; i < n_10_##TYPE1_##TYPE2; ++i) \
+ { \
+ if (f_10_##TYPE1[i * 2 + 0] != x_10_##TYPE1) \
+ __builtin_abort (); \
+ if (f_10_##TYPE1[i * 2 + 1] != x2_10_##TYPE1) \
+ __builtin_abort (); \
+ if (d_10_##TYPE2[i] != y_10_##TYPE2) \
+ __builtin_abort (); \
+ } \
+ for (int i = n_10_##TYPE1_##TYPE2; i < n_10_##TYPE1_##TYPE2 + 1; ++i) \
+ { \
+ if (f_10_##TYPE1[i * 2 + 0] != 0) \
+ __builtin_abort (); \
+ if (f_10_##TYPE1[i * 2 + 1] != 0) \
+ __builtin_abort (); \
+ if (d_10_##TYPE2[i] != 0) \
+ __builtin_abort (); \
+ }
+
+#define TEST_ALL(T) \
+ T (int8_t, int16_t) \
+ T (uint8_t, uint16_t) \
+ T (int16_t, int32_t) \
+ T (uint16_t, uint32_t) \
+ T (int32_t, int64_t) \
+ T (uint32_t, uint64_t) \
+ T (float, double)
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/multiple_rgroup-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/multiple_rgroup-2.c
new file mode 100644
index 00000000000..d1c41907547
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/multiple_rgroup-2.c
@@ -0,0 +1,6 @@
+/* { dg-do compile } */
+/* { dg-additional-options "-march=rv32gcv -mabi=ilp32d --param riscv-autovec-preference=fixed-vlmax" } */
+
+#include "multiple_rgroup-2.h"
+
+TEST_ALL (test_1)
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/multiple_rgroup-2.h b/gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/multiple_rgroup-2.h
new file mode 100644
index 00000000000..aa50726697c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/multiple_rgroup-2.h
@@ -0,0 +1,546 @@
+#include <stddef.h>
+#include <stdint.h>
+
+#define test_1(TYPE1, TYPE2, TYPE3) \
+ void __attribute__ ((noinline, noclone)) \
+ test_1_##TYPE1_##TYPE2 (TYPE1 *__restrict f, TYPE2 *__restrict d, \
+ TYPE3 *__restrict e, TYPE1 x, TYPE1 x2, TYPE1 x3, \
+ TYPE1 x4, TYPE2 y, TYPE2 y2, TYPE3 z, int n) \
+ { \
+ for (int i = 0; i < n; ++i) \
+ { \
+ f[i * 4 + 0] = x; \
+ f[i * 4 + 1] = x2; \
+ f[i * 4 + 2] = x3; \
+ f[i * 4 + 3] = x4; \
+ d[i * 2 + 0] = y; \
+ d[i * 2 + 1] = y2; \
+ e[i] = z; \
+ } \
+ }
+
+#define run_1(TYPE1, TYPE2, TYPE3) \
+ int n_1_##TYPE1_##TYPE2_##TYPE3 = 1; \
+ TYPE1 x_1_##TYPE1 = 117; \
+ TYPE1 x2_1_##TYPE1 = 232; \
+ TYPE1 x3_1_##TYPE1 = 127; \
+ TYPE1 x4_1_##TYPE1 = 11; \
+ TYPE2 y_1_##TYPE2 = 9762; \
+ TYPE2 y2_1_##TYPE2 = 6279; \
+ TYPE3 z_1_##TYPE3 = 5891663; \
+ TYPE1 f_1_##TYPE1[2 * 4 + 1] = {0}; \
+ TYPE2 d_1_##TYPE2[2 * 2 + 1] = {0}; \
+ TYPE3 e_1_##TYPE3[2] = {0}; \
+ test_1_##TYPE1_##TYPE2 (f_1_##TYPE1, d_1_##TYPE2, e_1_##TYPE3, x_1_##TYPE1, \
+ x2_1_##TYPE1, x3_1_##TYPE1, x4_1_##TYPE1, \
+ y_1_##TYPE2, y2_1_##TYPE2, z_1_##TYPE3, \
+ n_1_##TYPE1_##TYPE2_##TYPE3); \
+ for (int i = 0; i < n_1_##TYPE1_##TYPE2_##TYPE3; ++i) \
+ { \
+ if (f_1_##TYPE1[i * 4 + 0] != x_1_##TYPE1) \
+ __builtin_abort (); \
+ if (f_1_##TYPE1[i * 4 + 1] != x2_1_##TYPE1) \
+ __builtin_abort (); \
+ if (f_1_##TYPE1[i * 4 + 2] != x3_1_##TYPE1) \
+ __builtin_abort (); \
+ if (f_1_##TYPE1[i * 4 + 3] != x4_1_##TYPE1) \
+ __builtin_abort (); \
+ if (d_1_##TYPE2[i * 2 + 0] != y_1_##TYPE2) \
+ __builtin_abort (); \
+ if (d_1_##TYPE2[i * 2 + 1] != y2_1_##TYPE2) \
+ __builtin_abort (); \
+ if (e_1_##TYPE3[i] != z_1_##TYPE3) \
+ __builtin_abort (); \
+ } \
+ for (int i = n_1_##TYPE1_##TYPE2_##TYPE3; \
+ i < n_1_##TYPE1_##TYPE2_##TYPE3 + 1; ++i) \
+ { \
+ if (f_1_##TYPE1[i * 4 + 0] != 0) \
+ __builtin_abort (); \
+ if (f_1_##TYPE1[i * 4 + 1] != 0) \
+ __builtin_abort (); \
+ if (f_1_##TYPE1[i * 4 + 2] != 0) \
+ __builtin_abort (); \
+ if (f_1_##TYPE1[i * 4 + 3] != 0) \
+ __builtin_abort (); \
+ if (d_1_##TYPE2[i * 2 + 0] != 0) \
+ __builtin_abort (); \
+ if (d_1_##TYPE2[i * 2 + 1] != 0) \
+ __builtin_abort (); \
+ if (e_1_##TYPE3[i] != 0) \
+ __builtin_abort (); \
+ }
+
+#define run_2(TYPE1, TYPE2, TYPE3) \
+ int n_2_##TYPE1_##TYPE2_##TYPE3 = 17; \
+ TYPE1 x_2_##TYPE1 = 107; \
+ TYPE1 x2_2_##TYPE1 = 202; \
+ TYPE1 x3_2_##TYPE1 = 17; \
+ TYPE1 x4_2_##TYPE1 = 53; \
+ TYPE2 y_2_##TYPE2 = 5566; \
+ TYPE2 y2_2_##TYPE2 = 7926; \
+ TYPE3 z_2_##TYPE3 = 781545971; \
+ TYPE1 f_2_##TYPE1[18 * 4 + 1] = {0}; \
+ TYPE2 d_2_##TYPE2[18 * 2 + 1] = {0}; \
+ TYPE3 e_2_##TYPE3[18] = {0}; \
+ test_1_##TYPE1_##TYPE2 (f_2_##TYPE1, d_2_##TYPE2, e_2_##TYPE3, x_2_##TYPE1, \
+ x2_2_##TYPE1, x3_2_##TYPE1, x4_2_##TYPE1, \
+ y_2_##TYPE2, y2_2_##TYPE2, z_2_##TYPE3, \
+ n_2_##TYPE1_##TYPE2_##TYPE3); \
+ for (int i = 0; i < n_2_##TYPE1_##TYPE2_##TYPE3; ++i) \
+ { \
+ if (f_2_##TYPE1[i * 4 + 0] != x_2_##TYPE1) \
+ __builtin_abort (); \
+ if (f_2_##TYPE1[i * 4 + 1] != x2_2_##TYPE1) \
+ __builtin_abort (); \
+ if (f_2_##TYPE1[i * 4 + 2] != x3_2_##TYPE1) \
+ __builtin_abort (); \
+ if (f_2_##TYPE1[i * 4 + 3] != x4_2_##TYPE1) \
+ __builtin_abort (); \
+ if (d_2_##TYPE2[i * 2 + 0] != y_2_##TYPE2) \
+ __builtin_abort (); \
+ if (d_2_##TYPE2[i * 2 + 1] != y2_2_##TYPE2) \
+ __builtin_abort (); \
+ if (e_2_##TYPE3[i] != z_2_##TYPE3) \
+ __builtin_abort (); \
+ } \
+ for (int i = n_2_##TYPE1_##TYPE2_##TYPE3; \
+ i < n_2_##TYPE1_##TYPE2_##TYPE3 + 1; ++i) \
+ { \
+ if (f_2_##TYPE1[i * 4 + 0] != 0) \
+ __builtin_abort (); \
+ if (f_2_##TYPE1[i * 4 + 1] != 0) \
+ __builtin_abort (); \
+ if (f_2_##TYPE1[i * 4 + 2] != 0) \
+ __builtin_abort (); \
+ if (f_2_##TYPE1[i * 4 + 3] != 0) \
+ __builtin_abort (); \
+ if (d_2_##TYPE2[i * 2 + 0] != 0) \
+ __builtin_abort (); \
+ if (d_2_##TYPE2[i * 2 + 1] != 0) \
+ __builtin_abort (); \
+ if (e_2_##TYPE3[i] != 0) \
+ __builtin_abort (); \
+ }
+
+#define run_3(TYPE1, TYPE2, TYPE3) \
+ int n_3_##TYPE1_##TYPE2_##TYPE3 = 32; \
+ TYPE1 x_3_##TYPE1 = 109; \
+ TYPE1 x2_3_##TYPE1 = 239; \
+ TYPE1 x3_3_##TYPE1 = 151; \
+ TYPE1 x4_3_##TYPE1 = 3; \
+ TYPE2 y_3_##TYPE2 = 1234; \
+ TYPE2 y2_3_##TYPE2 = 4321; \
+ TYPE3 z_3_##TYPE3 = 145615615; \
+ TYPE1 f_3_##TYPE1[33 * 4 + 1] = {0}; \
+ TYPE2 d_3_##TYPE2[33 * 2 + 1] = {0}; \
+ TYPE3 e_3_##TYPE3[33] = {0}; \
+ test_1_##TYPE1_##TYPE2 (f_3_##TYPE1, d_3_##TYPE2, e_3_##TYPE3, x_3_##TYPE1, \
+ x2_3_##TYPE1, x3_3_##TYPE1, x4_3_##TYPE1, \
+ y_3_##TYPE2, y2_3_##TYPE2, z_3_##TYPE3, \
+ n_3_##TYPE1_##TYPE2_##TYPE3); \
+ for (int i = 0; i < n_3_##TYPE1_##TYPE2_##TYPE3; ++i) \
+ { \
+ if (f_3_##TYPE1[i * 4 + 0] != x_3_##TYPE1) \
+ __builtin_abort (); \
+ if (f_3_##TYPE1[i * 4 + 1] != x2_3_##TYPE1) \
+ __builtin_abort (); \
+ if (f_3_##TYPE1[i * 4 + 2] != x3_3_##TYPE1) \
+ __builtin_abort (); \
+ if (f_3_##TYPE1[i * 4 + 3] != x4_3_##TYPE1) \
+ __builtin_abort (); \
+ if (d_3_##TYPE2[i * 2 + 0] != y_3_##TYPE2) \
+ __builtin_abort (); \
+ if (d_3_##TYPE2[i * 2 + 1] != y2_3_##TYPE2) \
+ __builtin_abort (); \
+ if (e_3_##TYPE3[i] != z_3_##TYPE3) \
+ __builtin_abort (); \
+ } \
+ for (int i = n_3_##TYPE1_##TYPE2_##TYPE3; \
+ i < n_3_##TYPE1_##TYPE2_##TYPE3 + 1; ++i) \
+ { \
+ if (f_3_##TYPE1[i * 4 + 0] != 0) \
+ __builtin_abort (); \
+ if (f_3_##TYPE1[i * 4 + 1] != 0) \
+ __builtin_abort (); \
+ if (f_3_##TYPE1[i * 4 + 2] != 0) \
+ __builtin_abort (); \
+ if (f_3_##TYPE1[i * 4 + 3] != 0) \
+ __builtin_abort (); \
+ if (d_3_##TYPE2[i * 2 + 0] != 0) \
+ __builtin_abort (); \
+ if (d_3_##TYPE2[i * 2 + 1] != 0) \
+ __builtin_abort (); \
+ if (e_3_##TYPE3[i] != 0) \
+ __builtin_abort (); \
+ }
+
+#define run_4(TYPE1, TYPE2, TYPE3) \
+ int n_4_##TYPE1_##TYPE2_##TYPE3 = 128; \
+ TYPE1 x_4_##TYPE1 = 239; \
+ TYPE1 x2_4_##TYPE1 = 132; \
+ TYPE1 x3_4_##TYPE1 = 39; \
+ TYPE1 x4_4_##TYPE1 = 48; \
+ TYPE2 y_4_##TYPE2 = 1036; \
+ TYPE2 y2_4_##TYPE2 = 3665; \
+ TYPE3 z_4_##TYPE3 = 5145656; \
+ TYPE1 f_4_##TYPE1[129 * 4 + 1] = {0}; \
+ TYPE2 d_4_##TYPE2[129 * 2 + 1] = {0}; \
+ TYPE3 e_4_##TYPE3[129] = {0}; \
+ test_1_##TYPE1_##TYPE2 (f_4_##TYPE1, d_4_##TYPE2, e_4_##TYPE3, x_4_##TYPE1, \
+ x2_4_##TYPE1, x3_4_##TYPE1, x4_4_##TYPE1, \
+ y_4_##TYPE2, y2_4_##TYPE2, z_4_##TYPE3, \
+ n_4_##TYPE1_##TYPE2_##TYPE3); \
+ for (int i = 0; i < n_4_##TYPE1_##TYPE2_##TYPE3; ++i) \
+ { \
+ if (f_4_##TYPE1[i * 4 + 0] != x_4_##TYPE1) \
+ __builtin_abort (); \
+ if (f_4_##TYPE1[i * 4 + 1] != x2_4_##TYPE1) \
+ __builtin_abort (); \
+ if (f_4_##TYPE1[i * 4 + 2] != x3_4_##TYPE1) \
+ __builtin_abort (); \
+ if (f_4_##TYPE1[i * 4 + 3] != x4_4_##TYPE1) \
+ __builtin_abort (); \
+ if (d_4_##TYPE2[i * 2 + 0] != y_4_##TYPE2) \
+ __builtin_abort (); \
+ if (d_4_##TYPE2[i * 2 + 1] != y2_4_##TYPE2) \
+ __builtin_abort (); \
+ if (e_4_##TYPE3[i] != z_4_##TYPE3) \
+ __builtin_abort (); \
+ } \
+ for (int i = n_4_##TYPE1_##TYPE2_##TYPE3; \
+ i < n_4_##TYPE1_##TYPE2_##TYPE3 + 1; ++i) \
+ { \
+ if (f_4_##TYPE1[i * 4 + 0] != 0) \
+ __builtin_abort (); \
+ if (f_4_##TYPE1[i * 4 + 1] != 0) \
+ __builtin_abort (); \
+ if (f_4_##TYPE1[i * 4 + 2] != 0) \
+ __builtin_abort (); \
+ if (f_4_##TYPE1[i * 4 + 3] != 0) \
+ __builtin_abort (); \
+ if (d_4_##TYPE2[i * 2 + 0] != 0) \
+ __builtin_abort (); \
+ if (d_4_##TYPE2[i * 2 + 1] != 0) \
+ __builtin_abort (); \
+ if (e_4_##TYPE3[i] != 0) \
+ __builtin_abort (); \
+ }
+
+#define run_5(TYPE1, TYPE2, TYPE3) \
+ int n_5_##TYPE1_##TYPE2_##TYPE3 = 177; \
+ TYPE1 x_5_##TYPE1 = 239; \
+ TYPE1 x2_5_##TYPE1 = 132; \
+ TYPE1 x3_5_##TYPE1 = 39; \
+ TYPE1 x4_5_##TYPE1 = 48; \
+ TYPE2 y_5_##TYPE2 = 1036; \
+ TYPE2 y2_5_##TYPE2 = 3665; \
+ TYPE3 z_5_##TYPE3 = 5145656; \
+ TYPE1 f_5_##TYPE1[178 * 4 + 1] = {0}; \
+ TYPE2 d_5_##TYPE2[178 * 2 + 1] = {0}; \
+ TYPE3 e_5_##TYPE3[178] = {0}; \
+ test_1_##TYPE1_##TYPE2 (f_5_##TYPE1, d_5_##TYPE2, e_5_##TYPE3, x_5_##TYPE1, \
+ x2_5_##TYPE1, x3_5_##TYPE1, x4_5_##TYPE1, \
+ y_5_##TYPE2, y2_5_##TYPE2, z_5_##TYPE3, \
+ n_5_##TYPE1_##TYPE2_##TYPE3); \
+ for (int i = 0; i < n_5_##TYPE1_##TYPE2_##TYPE3; ++i) \
+ { \
+ if (f_5_##TYPE1[i * 4 + 0] != x_5_##TYPE1) \
+ __builtin_abort (); \
+ if (f_5_##TYPE1[i * 4 + 1] != x2_5_##TYPE1) \
+ __builtin_abort (); \
+ if (f_5_##TYPE1[i * 4 + 2] != x3_5_##TYPE1) \
+ __builtin_abort (); \
+ if (f_5_##TYPE1[i * 4 + 3] != x4_5_##TYPE1) \
+ __builtin_abort (); \
+ if (d_5_##TYPE2[i * 2 + 0] != y_5_##TYPE2) \
+ __builtin_abort (); \
+ if (d_5_##TYPE2[i * 2 + 1] != y2_5_##TYPE2) \
+ __builtin_abort (); \
+ if (e_5_##TYPE3[i] != z_5_##TYPE3) \
+ __builtin_abort (); \
+ } \
+ for (int i = n_5_##TYPE1_##TYPE2_##TYPE3; \
+ i < n_5_##TYPE1_##TYPE2_##TYPE3 + 1; ++i) \
+ { \
+ if (f_5_##TYPE1[i * 4 + 0] != 0) \
+ __builtin_abort (); \
+ if (f_5_##TYPE1[i * 4 + 1] != 0) \
+ __builtin_abort (); \
+ if (f_5_##TYPE1[i * 4 + 2] != 0) \
+ __builtin_abort (); \
+ if (f_5_##TYPE1[i * 4 + 3] != 0) \
+ __builtin_abort (); \
+ if (d_5_##TYPE2[i * 2 + 0] != 0) \
+ __builtin_abort (); \
+ if (d_5_##TYPE2[i * 2 + 1] != 0) \
+ __builtin_abort (); \
+ if (e_5_##TYPE3[i] != 0) \
+ __builtin_abort (); \
+ }
+
+#define run_6(TYPE1, TYPE2, TYPE3) \
+ int n_6_##TYPE1_##TYPE2_##TYPE3 = 255; \
+ TYPE1 x_6_##TYPE1 = 239; \
+ TYPE1 x2_6_##TYPE1 = 132; \
+ TYPE1 x3_6_##TYPE1 = 39; \
+ TYPE1 x4_6_##TYPE1 = 48; \
+ TYPE2 y_6_##TYPE2 = 1036; \
+ TYPE2 y2_6_##TYPE2 = 3665; \
+ TYPE3 z_6_##TYPE3 = 5145656; \
+ TYPE1 f_6_##TYPE1[256 * 4 + 1] = {0}; \
+ TYPE2 d_6_##TYPE2[256 * 2 + 1] = {0}; \
+ TYPE3 e_6_##TYPE3[256] = {0}; \
+ test_1_##TYPE1_##TYPE2 (f_6_##TYPE1, d_6_##TYPE2, e_6_##TYPE3, x_6_##TYPE1, \
+ x2_6_##TYPE1, x3_6_##TYPE1, x4_6_##TYPE1, \
+ y_6_##TYPE2, y2_6_##TYPE2, z_6_##TYPE3, \
+ n_6_##TYPE1_##TYPE2_##TYPE3); \
+ for (int i = 0; i < n_6_##TYPE1_##TYPE2_##TYPE3; ++i) \
+ { \
+ if (f_6_##TYPE1[i * 4 + 0] != x_6_##TYPE1) \
+ __builtin_abort (); \
+ if (f_6_##TYPE1[i * 4 + 1] != x2_6_##TYPE1) \
+ __builtin_abort (); \
+ if (f_6_##TYPE1[i * 4 + 2] != x3_6_##TYPE1) \
+ __builtin_abort (); \
+ if (f_6_##TYPE1[i * 4 + 3] != x4_6_##TYPE1) \
+ __builtin_abort (); \
+ if (d_6_##TYPE2[i * 2 + 0] != y_6_##TYPE2) \
+ __builtin_abort (); \
+ if (d_6_##TYPE2[i * 2 + 1] != y2_6_##TYPE2) \
+ __builtin_abort (); \
+ if (e_6_##TYPE3[i] != z_6_##TYPE3) \
+ __builtin_abort (); \
+ } \
+ for (int i = n_6_##TYPE1_##TYPE2_##TYPE3; \
+ i < n_6_##TYPE1_##TYPE2_##TYPE3 + 1; ++i) \
+ { \
+ if (f_6_##TYPE1[i * 4 + 0] != 0) \
+ __builtin_abort (); \
+ if (f_6_##TYPE1[i * 4 + 1] != 0) \
+ __builtin_abort (); \
+ if (f_6_##TYPE1[i * 4 + 2] != 0) \
+ __builtin_abort (); \
+ if (f_6_##TYPE1[i * 4 + 3] != 0) \
+ __builtin_abort (); \
+ if (d_6_##TYPE2[i * 2 + 0] != 0) \
+ __builtin_abort (); \
+ if (d_6_##TYPE2[i * 2 + 1] != 0) \
+ __builtin_abort (); \
+ if (e_6_##TYPE3[i] != 0) \
+ __builtin_abort (); \
+ }
+
+#define run_7(TYPE1, TYPE2, TYPE3) \
+ int n_7_##TYPE1_##TYPE2_##TYPE3 = 333; \
+ TYPE1 x_7_##TYPE1 = 239; \
+ TYPE1 x2_7_##TYPE1 = 132; \
+ TYPE1 x3_7_##TYPE1 = 39; \
+ TYPE1 x4_7_##TYPE1 = 48; \
+ TYPE2 y_7_##TYPE2 = 1036; \
+ TYPE2 y2_7_##TYPE2 = 3665; \
+ TYPE3 z_7_##TYPE3 = 5145656; \
+ TYPE1 f_7_##TYPE1[334 * 4 + 1] = {0}; \
+ TYPE2 d_7_##TYPE2[334 * 2 + 1] = {0}; \
+ TYPE3 e_7_##TYPE3[334] = {0}; \
+ test_1_##TYPE1_##TYPE2 (f_7_##TYPE1, d_7_##TYPE2, e_7_##TYPE3, x_7_##TYPE1, \
+ x2_7_##TYPE1, x3_7_##TYPE1, x4_7_##TYPE1, \
+ y_7_##TYPE2, y2_7_##TYPE2, z_7_##TYPE3, \
+ n_7_##TYPE1_##TYPE2_##TYPE3); \
+ for (int i = 0; i < n_7_##TYPE1_##TYPE2_##TYPE3; ++i) \
+ { \
+ if (f_7_##TYPE1[i * 4 + 0] != x_7_##TYPE1) \
+ __builtin_abort (); \
+ if (f_7_##TYPE1[i * 4 + 1] != x2_7_##TYPE1) \
+ __builtin_abort (); \
+ if (f_7_##TYPE1[i * 4 + 2] != x3_7_##TYPE1) \
+ __builtin_abort (); \
+ if (f_7_##TYPE1[i * 4 + 3] != x4_7_##TYPE1) \
+ __builtin_abort (); \
+ if (d_7_##TYPE2[i * 2 + 0] != y_7_##TYPE2) \
+ __builtin_abort (); \
+ if (d_7_##TYPE2[i * 2 + 1] != y2_7_##TYPE2) \
+ __builtin_abort (); \
+ if (e_7_##TYPE3[i] != z_7_##TYPE3) \
+ __builtin_abort (); \
+ } \
+ for (int i = n_7_##TYPE1_##TYPE2_##TYPE3; \
+ i < n_7_##TYPE1_##TYPE2_##TYPE3 + 1; ++i) \
+ { \
+ if (f_7_##TYPE1[i * 4 + 0] != 0) \
+ __builtin_abort (); \
+ if (f_7_##TYPE1[i * 4 + 1] != 0) \
+ __builtin_abort (); \
+ if (f_7_##TYPE1[i * 4 + 2] != 0) \
+ __builtin_abort (); \
+ if (f_7_##TYPE1[i * 4 + 3] != 0) \
+ __builtin_abort (); \
+ if (d_7_##TYPE2[i * 2 + 0] != 0) \
+ __builtin_abort (); \
+ if (d_7_##TYPE2[i * 2 + 1] != 0) \
+ __builtin_abort (); \
+ if (e_7_##TYPE3[i] != 0) \
+ __builtin_abort (); \
+ }
+
+#define run_8(TYPE1, TYPE2, TYPE3) \
+ int n_8_##TYPE1_##TYPE2_##TYPE3 = 512; \
+ TYPE1 x_8_##TYPE1 = 239; \
+ TYPE1 x2_8_##TYPE1 = 132; \
+ TYPE1 x3_8_##TYPE1 = 39; \
+ TYPE1 x4_8_##TYPE1 = 48; \
+ TYPE2 y_8_##TYPE2 = 1036; \
+ TYPE2 y2_8_##TYPE2 = 3665; \
+ TYPE3 z_8_##TYPE3 = 5145656; \
+ TYPE1 f_8_##TYPE1[513 * 4 + 1] = {0}; \
+ TYPE2 d_8_##TYPE2[513 * 2 + 1] = {0}; \
+ TYPE3 e_8_##TYPE3[513] = {0}; \
+ test_1_##TYPE1_##TYPE2 (f_8_##TYPE1, d_8_##TYPE2, e_8_##TYPE3, x_8_##TYPE1, \
+ x2_8_##TYPE1, x3_8_##TYPE1, x4_8_##TYPE1, \
+ y_8_##TYPE2, y2_8_##TYPE2, z_8_##TYPE3, \
+ n_8_##TYPE1_##TYPE2_##TYPE3); \
+ for (int i = 0; i < n_8_##TYPE1_##TYPE2_##TYPE3; ++i) \
+ { \
+ if (f_8_##TYPE1[i * 4 + 0] != x_8_##TYPE1) \
+ __builtin_abort (); \
+ if (f_8_##TYPE1[i * 4 + 1] != x2_8_##TYPE1) \
+ __builtin_abort (); \
+ if (f_8_##TYPE1[i * 4 + 2] != x3_8_##TYPE1) \
+ __builtin_abort (); \
+ if (f_8_##TYPE1[i * 4 + 3] != x4_8_##TYPE1) \
+ __builtin_abort (); \
+ if (d_8_##TYPE2[i * 2 + 0] != y_8_##TYPE2) \
+ __builtin_abort (); \
+ if (d_8_##TYPE2[i * 2 + 1] != y2_8_##TYPE2) \
+ __builtin_abort (); \
+ if (e_8_##TYPE3[i] != z_8_##TYPE3) \
+ __builtin_abort (); \
+ } \
+ for (int i = n_8_##TYPE1_##TYPE2_##TYPE3; \
+ i < n_8_##TYPE1_##TYPE2_##TYPE3 + 1; ++i) \
+ { \
+ if (f_8_##TYPE1[i * 4 + 0] != 0) \
+ __builtin_abort (); \
+ if (f_8_##TYPE1[i * 4 + 1] != 0) \
+ __builtin_abort (); \
+ if (f_8_##TYPE1[i * 4 + 2] != 0) \
+ __builtin_abort (); \
+ if (f_8_##TYPE1[i * 4 + 3] != 0) \
+ __builtin_abort (); \
+ if (d_8_##TYPE2[i * 2 + 0] != 0) \
+ __builtin_abort (); \
+ if (d_8_##TYPE2[i * 2 + 1] != 0) \
+ __builtin_abort (); \
+ if (e_8_##TYPE3[i] != 0) \
+ __builtin_abort (); \
+ }
+
+#define run_9(TYPE1, TYPE2, TYPE3) \
+ int n_9_##TYPE1_##TYPE2_##TYPE3 = 637; \
+ TYPE1 x_9_##TYPE1 = 222; \
+ TYPE1 x2_9_##TYPE1 = 111; \
+ TYPE1 x3_9_##TYPE1 = 11; \
+ TYPE1 x4_9_##TYPE1 = 7; \
+ TYPE2 y_9_##TYPE2 = 2034; \
+ TYPE2 y2_9_##TYPE2 = 6987; \
+ TYPE3 z_9_##TYPE3 = 1564616; \
+ TYPE1 f_9_##TYPE1[638 * 4 + 1] = {0}; \
+ TYPE2 d_9_##TYPE2[638 * 2 + 1] = {0}; \
+ TYPE3 e_9_##TYPE3[638] = {0}; \
+ test_1_##TYPE1_##TYPE2 (f_9_##TYPE1, d_9_##TYPE2, e_9_##TYPE3, x_9_##TYPE1, \
+ x2_9_##TYPE1, x3_9_##TYPE1, x4_9_##TYPE1, \
+ y_9_##TYPE2, y2_9_##TYPE2, z_9_##TYPE3, \
+ n_9_##TYPE1_##TYPE2_##TYPE3); \
+ for (int i = 0; i < n_9_##TYPE1_##TYPE2_##TYPE3; ++i) \
+ { \
+ if (f_9_##TYPE1[i * 4 + 0] != x_9_##TYPE1) \
+ __builtin_abort (); \
+ if (f_9_##TYPE1[i * 4 + 1] != x2_9_##TYPE1) \
+ __builtin_abort (); \
+ if (f_9_##TYPE1[i * 4 + 2] != x3_9_##TYPE1) \
+ __builtin_abort (); \
+ if (f_9_##TYPE1[i * 4 + 3] != x4_9_##TYPE1) \
+ __builtin_abort (); \
+ if (d_9_##TYPE2[i * 2 + 0] != y_9_##TYPE2) \
+ __builtin_abort (); \
+ if (d_9_##TYPE2[i * 2 + 1] != y2_9_##TYPE2) \
+ __builtin_abort (); \
+ if (e_9_##TYPE3[i] != z_9_##TYPE3) \
+ __builtin_abort (); \
+ } \
+ for (int i = n_9_##TYPE1_##TYPE2_##TYPE3; \
+ i < n_9_##TYPE1_##TYPE2_##TYPE3 + 1; ++i) \
+ { \
+ if (f_9_##TYPE1[i * 4 + 0] != 0) \
+ __builtin_abort (); \
+ if (f_9_##TYPE1[i * 4 + 1] != 0) \
+ __builtin_abort (); \
+ if (f_9_##TYPE1[i * 4 + 2] != 0) \
+ __builtin_abort (); \
+ if (f_9_##TYPE1[i * 4 + 3] != 0) \
+ __builtin_abort (); \
+ if (d_9_##TYPE2[i * 2 + 0] != 0) \
+ __builtin_abort (); \
+ if (d_9_##TYPE2[i * 2 + 1] != 0) \
+ __builtin_abort (); \
+ if (e_9_##TYPE3[i] != 0) \
+ __builtin_abort (); \
+ }
+
+#define run_10(TYPE1, TYPE2, TYPE3) \
+ int n_10_##TYPE1_##TYPE2_##TYPE3 = 777; \
+ TYPE1 x_10_##TYPE1 = 222; \
+ TYPE1 x2_10_##TYPE1 = 111; \
+ TYPE1 x3_10_##TYPE1 = 11; \
+ TYPE1 x4_10_##TYPE1 = 7; \
+ TYPE2 y_10_##TYPE2 = 2034; \
+ TYPE2 y2_10_##TYPE2 = 6987; \
+ TYPE3 z_10_##TYPE3 = 1564616; \
+ TYPE1 f_10_##TYPE1[778 * 4 + 1] = {0}; \
+ TYPE2 d_10_##TYPE2[778 * 2 + 1] = {0}; \
+ TYPE3 e_10_##TYPE3[778] = {0}; \
+ test_1_##TYPE1_##TYPE2 (f_10_##TYPE1, d_10_##TYPE2, e_10_##TYPE3, x_10_##TYPE1, \
+ x2_10_##TYPE1, x3_10_##TYPE1, x4_10_##TYPE1, \
+ y_10_##TYPE2, y2_10_##TYPE2, z_10_##TYPE3, \
+ n_10_##TYPE1_##TYPE2_##TYPE3); \
+ for (int i = 0; i < n_10_##TYPE1_##TYPE2_##TYPE3; ++i) \
+ { \
+ if (f_10_##TYPE1[i * 4 + 0] != x_10_##TYPE1) \
+ __builtin_abort (); \
+ if (f_10_##TYPE1[i * 4 + 1] != x2_10_##TYPE1) \
+ __builtin_abort (); \
+ if (f_10_##TYPE1[i * 4 + 2] != x3_10_##TYPE1) \
+ __builtin_abort (); \
+ if (f_10_##TYPE1[i * 4 + 3] != x4_10_##TYPE1) \
+ __builtin_abort (); \
+ if (d_10_##TYPE2[i * 2 + 0] != y_10_##TYPE2) \
+ __builtin_abort (); \
+ if (d_10_##TYPE2[i * 2 + 1] != y2_10_##TYPE2) \
+ __builtin_abort (); \
+ if (e_10_##TYPE3[i] != z_10_##TYPE3) \
+ __builtin_abort (); \
+ } \
+ for (int i = n_10_##TYPE1_##TYPE2_##TYPE3; \
+ i < n_10_##TYPE1_##TYPE2_##TYPE3 + 1; ++i) \
+ { \
+ if (f_10_##TYPE1[i * 4 + 0] != 0) \
+ __builtin_abort (); \
+ if (f_10_##TYPE1[i * 4 + 1] != 0) \
+ __builtin_abort (); \
+ if (f_10_##TYPE1[i * 4 + 2] != 0) \
+ __builtin_abort (); \
+ if (f_10_##TYPE1[i * 4 + 3] != 0) \
+ __builtin_abort (); \
+ if (d_10_##TYPE2[i * 2 + 0] != 0) \
+ __builtin_abort (); \
+ if (d_10_##TYPE2[i * 2 + 1] != 0) \
+ __builtin_abort (); \
+ if (e_10_##TYPE3[i] != 0) \
+ __builtin_abort (); \
+ }
+
+#define TEST_ALL(T) \
+ T (int8_t, int16_t, int32_t) \
+ T (uint8_t, uint16_t, uint32_t) \
+ T (int16_t, int32_t, int64_t) \
+ T (uint16_t, uint32_t, uint64_t)
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/multiple_rgroup_run-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/multiple_rgroup_run-1.c
new file mode 100644
index 00000000000..d3e187eae68
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/multiple_rgroup_run-1.c
@@ -0,0 +1,19 @@
+/* { dg-do run { target { riscv_vector } } } */
+/* { dg-additional-options "--param riscv-autovec-preference=fixed-vlmax" } */
+
+#include "multiple_rgroup-1.c"
+
+int main (void)
+{
+ TEST_ALL (run_1)
+ TEST_ALL (run_2)
+ TEST_ALL (run_3)
+ TEST_ALL (run_4)
+ TEST_ALL (run_5)
+ TEST_ALL (run_6)
+ TEST_ALL (run_7)
+ TEST_ALL (run_8)
+ TEST_ALL (run_9)
+ TEST_ALL (run_10)
+ return 0;
+}
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/multiple_rgroup_run-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/multiple_rgroup_run-2.c
new file mode 100644
index 00000000000..5166c9e35a0
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/multiple_rgroup_run-2.c
@@ -0,0 +1,19 @@
+/* { dg-do run { target { riscv_vector } } } */
+/* { dg-additional-options "--param riscv-autovec-preference=fixed-vlmax" } */
+
+#include "multiple_rgroup-2.c"
+
+int main (void)
+{
+ TEST_ALL (run_1)
+ TEST_ALL (run_2)
+ TEST_ALL (run_3)
+ TEST_ALL (run_4)
+ TEST_ALL (run_5)
+ TEST_ALL (run_6)
+ TEST_ALL (run_7)
+ TEST_ALL (run_8)
+ TEST_ALL (run_9)
+ TEST_ALL (run_10)
+ return 0;
+}
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/single_rgroup-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/single_rgroup-1.c
new file mode 100644
index 00000000000..6384888dd03
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/single_rgroup-1.c
@@ -0,0 +1,8 @@
+/* { dg-do compile } */
+/* { dg-additional-options "-march=rv32gcv -mabi=ilp32d --param riscv-autovec-preference=scalable -fno-vect-cost-model -fno-tree-loop-distribute-patterns" } */
+
+#include "single_rgroup-1.h"
+
+TEST_ALL (test_1)
+
+/* { dg-final { scan-assembler-times {vsetvli} 10 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/single_rgroup-1.h b/gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/single_rgroup-1.h
new file mode 100644
index 00000000000..be6b4c641cb
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/single_rgroup-1.h
@@ -0,0 +1,106 @@
+#include <stddef.h>
+#include <stdint.h>
+
+#define N 777
+
+#define test_1(TYPE) \
+ TYPE a_##TYPE[N]; \
+ TYPE b_##TYPE[N]; \
+ void __attribute__ ((noinline, noclone)) test_1_##TYPE (unsigned int n) \
+ { \
+ unsigned int i = 0; \
+ for (i = 0; i < n; i++) \
+ b_##TYPE[i] = a_##TYPE[i]; \
+ }
+
+#define run_1(TYPE) \
+ for (unsigned int i = 0; i < N; i++) \
+ a_##TYPE[i] = i * 2 * 33 + 1 + 109; \
+ test_1_##TYPE (5); \
+ for (unsigned int i = 0; i < 5; i++) \
+ if (b_##TYPE[i] != a_##TYPE[i]) \
+ __builtin_abort ();
+
+#define run_2(TYPE) \
+ for (unsigned int i = 0; i < N; i++) \
+ a_##TYPE[i] = i * 2 * 57 + 1 + 999; \
+ test_1_##TYPE (17); \
+ for (unsigned int i = 0; i < 17; i++) \
+ if (b_##TYPE[i] != a_##TYPE[i]) \
+ __builtin_abort ();
+
+#define run_3(TYPE) \
+ for (unsigned int i = 0; i < N; i++) \
+ a_##TYPE[i] = i * 2 * 77 + 1 + 3; \
+ test_1_##TYPE (32); \
+ for (unsigned int i = 0; i < 32; i++) \
+ if (b_##TYPE[i] != a_##TYPE[i]) \
+ __builtin_abort ();
+
+#define run_4(TYPE) \
+ for (unsigned int i = 0; i < N; i++) \
+ a_##TYPE[i] = i * 2 * 45 + 1 + 11; \
+ test_1_##TYPE (128); \
+ for (unsigned int i = 0; i < 128; i++) \
+ if (b_##TYPE[i] != a_##TYPE[i]) \
+ __builtin_abort ();
+
+#define run_5(TYPE) \
+ for (unsigned int i = 0; i < N; i++) \
+ a_##TYPE[i] = i * 2 * 199 + 1 + 79; \
+ test_1_##TYPE (177); \
+ for (unsigned int i = 0; i < 177; i++) \
+ if (b_##TYPE[i] != a_##TYPE[i]) \
+ __builtin_abort ();
+
+#define run_6(TYPE) \
+ for (unsigned int i = 0; i < N; i++) \
+ a_##TYPE[i] = i * 2 * 377 + 1 + 73; \
+ test_1_##TYPE (255); \
+ for (unsigned int i = 0; i < 255; i++) \
+ if (b_##TYPE[i] != a_##TYPE[i]) \
+ __builtin_abort ();
+
+#define run_7(TYPE) \
+ for (unsigned int i = 0; i < N; i++) \
+ a_##TYPE[i] = i * 2 * 98 + 1 + 66; \
+ test_1_##TYPE (333); \
+ for (unsigned int i = 0; i < 333; i++) \
+ if (b_##TYPE[i] != a_##TYPE[i]) \
+ __builtin_abort ();
+
+#define run_8(TYPE) \
+ for (unsigned int i = 0; i < N; i++) \
+ a_##TYPE[i] = i * 2 * 7 + 1 * 7; \
+ test_1_##TYPE (512); \
+ for (unsigned int i = 0; i < 512; i++) \
+ if (b_##TYPE[i] != a_##TYPE[i]) \
+ __builtin_abort ();
+
+#define run_9(TYPE) \
+ for (unsigned int i = 0; i < N; i++) \
+ a_##TYPE[i] = i * 2 + 1 + 88; \
+ test_1_##TYPE (637); \
+ for (unsigned int i = 0; i < 637; i++) \
+ if (b_##TYPE[i] != a_##TYPE[i]) \
+ __builtin_abort ();
+
+#define run_10(TYPE) \
+ for (unsigned int i = 0; i < N; i++) \
+ a_##TYPE[i] = i * 2 * 331 + 1 + 547; \
+ test_1_##TYPE (777); \
+ for (unsigned int i = 0; i < 777; i++) \
+ if (b_##TYPE[i] != a_##TYPE[i]) \
+ __builtin_abort ();
+
+#define TEST_ALL(T) \
+ T (int8_t) \
+ T (uint8_t) \
+ T (int16_t) \
+ T (uint16_t) \
+ T (int32_t) \
+ T (uint32_t) \
+ T (int64_t) \
+ T (uint64_t) \
+ T (float) \
+ T (double)
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/single_rgroup_run-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/single_rgroup_run-1.c
new file mode 100644
index 00000000000..4af2f18de8a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/single_rgroup_run-1.c
@@ -0,0 +1,19 @@
+/* { dg-do run { target { riscv_vector } } } */
+/* { dg-additional-options "-fno-vect-cost-model -fno-tree-loop-distribute-patterns --param riscv-autovec-preference=scalable" } */
+
+#include "single_rgroup-1.c"
+
+int main (void)
+{
+ TEST_ALL (run_1)
+ TEST_ALL (run_2)
+ TEST_ALL (run_3)
+ TEST_ALL (run_4)
+ TEST_ALL (run_5)
+ TEST_ALL (run_6)
+ TEST_ALL (run_7)
+ TEST_ALL (run_8)
+ TEST_ALL (run_9)
+ TEST_ALL (run_10)
+ return 0;
+}
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/template-1.h b/gcc/testsuite/gcc.target/riscv/rvv/autovec/template-1.h
new file mode 100644
index 00000000000..799e2d7d754
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/template-1.h
@@ -0,0 +1,68 @@
+#include <stddef.h>
+#include <stdint.h>
+
+void
+foo0 (int8_t *__restrict f, int16_t *__restrict d, int n)
+{
+ for (int i = 0; i < n; ++i)
+ {
+ f[i * 2 + 0] = 1;
+ f[i * 2 + 1] = 2;
+ d[i] = 3;
+ }
+}
+
+void
+foo1 (int16_t *__restrict f, int32_t *__restrict d, int n)
+{
+ for (int i = 0; i < n; ++i)
+ {
+ f[i * 2 + 0] = 1;
+ f[i * 2 + 1] = 2;
+ d[i] = 3;
+ }
+}
+
+void
+foo2 (int32_t *__restrict f, int64_t *__restrict d, int n)
+{
+ for (int i = 0; i < n; ++i)
+ {
+ f[i * 2 + 0] = 1;
+ f[i * 2 + 1] = 2;
+ d[i] = 3;
+ }
+}
+
+void
+foo3 (int16_t *__restrict f, float *__restrict d, int n)
+{
+ for (int i = 0; i < n; ++i)
+ {
+ f[i * 2 + 0] = 1;
+ f[i * 2 + 1] = 2;
+ d[i] = 3;
+ }
+}
+
+void
+foo4 (int32_t *__restrict f, float *__restrict d, int n)
+{
+ for (int i = 0; i < n; ++i)
+ {
+ f[i * 2 + 0] = 1;
+ f[i * 2 + 1] = 2;
+ d[i] = 3;
+ }
+}
+
+void
+foo5 (float *__restrict f, double *__restrict d, int n)
+{
+ for (int i = 0; i < n; ++i)
+ {
+ f[i * 2 + 0] = 1;
+ f[i * 2 + 1] = 2;
+ d[i] = 3;
+ }
+}
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/v-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/v-1.c
new file mode 100644
index 00000000000..7ff84f60749
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/v-1.c
@@ -0,0 +1,4 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv32gcv -mabi=ilp32d --param riscv-autovec-preference=scalable -O3 -ftree-vectorize -fdump-tree-vect-details -save-temps" } */
+
+#include "template-1.h"
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/v-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/v-2.c
new file mode 100644
index 00000000000..dc22eefbd36
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/v-2.c
@@ -0,0 +1,6 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv32gcv -mabi=ilp32d --param riscv-autovec-preference=fixed-vlmax -O3 -ftree-vectorize -fdump-tree-vect-details -save-temps" } */
+
+#include "template-1.h"
+
+/* { dg-final { scan-tree-dump-times "vectorized 1 loops in function" 5 "vect" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve32f-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve32f-1.c
new file mode 100644
index 00000000000..36f6d98a5cb
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve32f-1.c
@@ -0,0 +1,4 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv32gc_zve32f -mabi=ilp32d --param riscv-autovec-preference=scalable -O3 -ftree-vectorize -fdump-tree-vect-details -save-temps" } */
+
+#include "template-1.h"
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve32f-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve32f-2.c
new file mode 100644
index 00000000000..794f28e73bd
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve32f-2.c
@@ -0,0 +1,5 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv32gc_zve32f -mabi=ilp32d --param riscv-autovec-preference=fixed-vlmax -O3 -ftree-vectorize -fdump-tree-vect-details -save-temps" } */
+
+#include "template-1.h"
+
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve32f-3.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve32f-3.c
new file mode 100644
index 00000000000..0c1aee23d25
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve32f-3.c
@@ -0,0 +1,6 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv32gc_zve32f -mabi=ilp32d --param riscv-autovec-preference=fixed-vlmax --param riscv-autovec-lmul=m4 -O3 -ftree-vectorize -fdump-tree-vect-details -save-temps" } */
+
+#include "template-1.h"
+
+/* { dg-final { scan-tree-dump-times "vectorized 1 loops in function" 3 "vect" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve32f_zvl128b-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve32f_zvl128b-1.c
new file mode 100644
index 00000000000..d5e36190b31
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve32f_zvl128b-1.c
@@ -0,0 +1,4 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv32gc_zve32f_zvl128b -mabi=ilp32d --param riscv-autovec-preference=scalable -O3 -ftree-vectorize -fdump-tree-vect-details -save-temps" } */
+
+#include "template-1.h"
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve32f_zvl128b-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve32f_zvl128b-2.c
new file mode 100644
index 00000000000..d154df4c4ba
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve32f_zvl128b-2.c
@@ -0,0 +1,6 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv32gc_zve32f_zvl128b -mabi=ilp32d --param riscv-autovec-preference=fixed-vlmax -O3 -ftree-vectorize -fno-vect-cost-model -fdump-tree-vect-details -save-temps" } */
+
+#include "template-1.h"
+
+/* { dg-final { scan-tree-dump-times "vectorized 1 loops in function" 4 "vect" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve32x-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve32x-1.c
new file mode 100644
index 00000000000..68e7696ed65
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve32x-1.c
@@ -0,0 +1,4 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv32gc_zve32x -mabi=ilp32d --param riscv-autovec-preference=scalable -O3 -ftree-vectorize -fdump-tree-vect-details -save-temps" } */
+
+#include "template-1.h"
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve32x-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve32x-2.c
new file mode 100644
index 00000000000..f8860a36332
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve32x-2.c
@@ -0,0 +1,6 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv32gc_zve32x -mabi=ilp32d --param riscv-autovec-preference=fixed-vlmax -O3 -ftree-vectorize -fdump-tree-vect-details -save-temps" } */
+
+#include "template-1.h"
+
+
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve32x-3.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve32x-3.c
new file mode 100644
index 00000000000..94593f43a62
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve32x-3.c
@@ -0,0 +1,6 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv32gc_zve32x -mabi=ilp32d --param riscv-autovec-preference=fixed-vlmax --param riscv-autovec-lmul=m4 -O3 -ftree-vectorize -fdump-tree-vect-details -save-temps" } */
+
+#include "template-1.h"
+
+/* { dg-final { scan-tree-dump-times "vectorized 1 loops in function" 2 "vect" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve32x_zvl128b-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve32x_zvl128b-1.c
new file mode 100644
index 00000000000..3a6a3aa1261
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve32x_zvl128b-1.c
@@ -0,0 +1,5 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv32gc_zve32x_zvl128b -mabi=ilp32d --param riscv-autovec-preference=scalable -O3 -ftree-vectorize -fdump-tree-vect-details -save-temps" } */
+
+#include "template-1.h"
+
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve32x_zvl128b-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve32x_zvl128b-2.c
new file mode 100644
index 00000000000..d1aaf3f4297
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve32x_zvl128b-2.c
@@ -0,0 +1,6 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv32gc_zve32x_zvl128b -mabi=ilp32d --param riscv-autovec-preference=fixed-vlmax -O3 -ftree-vectorize -fdump-tree-vect-details -save-temps" } */
+
+#include "template-1.h"
+
+/* { dg-final { scan-tree-dump-times "vectorized 1 loops in function" 2 "vect" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve64d-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve64d-1.c
new file mode 100644
index 00000000000..0d03536389f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve64d-1.c
@@ -0,0 +1,4 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv32gc_zve64d -mabi=ilp32d --param riscv-autovec-preference=scalable -O3 -ftree-vectorize -fdump-tree-vect-details -save-temps" } */
+
+#include "template-1.h"
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve64d-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve64d-2.c
new file mode 100644
index 00000000000..ca423285011
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve64d-2.c
@@ -0,0 +1,4 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv32gc_zve64d -mabi=ilp32d --param riscv-autovec-preference=fixed-vlmax -O3 -ftree-vectorize -fdump-tree-vect-details -save-temps" } */
+
+#include "template-1.h"
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve64d-3.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve64d-3.c
new file mode 100644
index 00000000000..40fcbdf1dfb
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve64d-3.c
@@ -0,0 +1,6 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv32gc_zve64d -mabi=ilp32d --param riscv-autovec-preference=fixed-vlmax --param riscv-autovec-lmul=m2 -O3 -ftree-vectorize -fdump-tree-vect-details -save-temps" } */
+
+#include "template-1.h"
+
+/* { dg-final { scan-tree-dump-times "vectorized 1 loops in function" 5 "vect" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve64d_zvl128b-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve64d_zvl128b-1.c
new file mode 100644
index 00000000000..4c6c7e2fb3b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve64d_zvl128b-1.c
@@ -0,0 +1,4 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv32gc_zve64d_zvl128b -mabi=ilp32d --param riscv-autovec-preference=scalable -O3 -ftree-vectorize -fdump-tree-vect-details -save-temps" } */
+
+#include "template-1.h"
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve64d_zvl128b-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve64d_zvl128b-2.c
new file mode 100644
index 00000000000..b8253476973
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve64d_zvl128b-2.c
@@ -0,0 +1,6 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv32gc_zve64d_zvl128b -mabi=ilp32d --param riscv-autovec-preference=fixed-vlmax -O3 -ftree-vectorize -fdump-tree-vect-details -save-temps" } */
+
+#include "template-1.h"
+
+/* { dg-final { scan-tree-dump-times "vectorized 1 loops in function" 5 "vect" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve64f-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve64f-1.c
new file mode 100644
index 00000000000..e7900b82215
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve64f-1.c
@@ -0,0 +1,4 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv32gc_zve64f -mabi=ilp32d --param riscv-autovec-preference=scalable -O3 -ftree-vectorize -fdump-tree-vect-details -save-temps" } */
+
+#include "template-1.h"
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve64f-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve64f-2.c
new file mode 100644
index 00000000000..1c0e8c2785b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve64f-2.c
@@ -0,0 +1,4 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv32gc_zve64f -mabi=ilp32d --param riscv-autovec-preference=fixed-vlmax -O3 -ftree-vectorize -fdump-tree-vect-details -save-temps" } */
+
+#include "template-1.h"
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve64f-3.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve64f-3.c
new file mode 100644
index 00000000000..0f9ff7a6105
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve64f-3.c
@@ -0,0 +1,6 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv32gc_zve64f -mabi=ilp32d --param riscv-autovec-preference=fixed-vlmax --param riscv-autovec-lmul=m2 -O3 -ftree-vectorize -fdump-tree-vect-details -save-temps" } */
+
+#include "template-1.h"
+
+/* { dg-final { scan-tree-dump-times "vectorized 1 loops in function" 4 "vect" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve64f_zvl128b-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve64f_zvl128b-1.c
new file mode 100644
index 00000000000..daf4a4e8e64
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve64f_zvl128b-1.c
@@ -0,0 +1,4 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv32gc_zve64f_zvl128b -mabi=ilp32d --param riscv-autovec-preference=scalable -O3 -ftree-vectorize -fdump-tree-vect-details -save-temps" } */
+
+#include "template-1.h"
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve64f_zvl128b-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve64f_zvl128b-2.c
new file mode 100644
index 00000000000..3866e45546c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve64f_zvl128b-2.c
@@ -0,0 +1,6 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv32gc_zve64f_zvl128b -mabi=ilp32d --param riscv-autovec-preference=fixed-vlmax -O3 -ftree-vectorize -fdump-tree-vect-details -save-temps" } */
+
+#include "template-1.h"
+
+/* { dg-final { scan-tree-dump-times "vectorized 1 loops in function" 4 "vect" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve64x-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve64x-1.c
new file mode 100644
index 00000000000..4c190c303c1
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve64x-1.c
@@ -0,0 +1,4 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv32gc_zve64x -mabi=ilp32d --param riscv-autovec-preference=scalable -O3 -ftree-vectorize -fdump-tree-vect-details -save-temps" } */
+
+#include "template-1.h"
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve64x-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve64x-2.c
new file mode 100644
index 00000000000..66bb1f44170
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve64x-2.c
@@ -0,0 +1,4 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv32gc_zve64x -mabi=ilp32d --param riscv-autovec-preference=fixed-vlmax -O3 -ftree-vectorize -fdump-tree-vect-details -save-temps" } */
+
+#include "template-1.h"
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve64x-3.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve64x-3.c
new file mode 100644
index 00000000000..e30a6bce18b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve64x-3.c
@@ -0,0 +1,6 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv32gc_zve64x -mabi=ilp32d --param riscv-autovec-preference=fixed-vlmax --param riscv-autovec-lmul=m2 -O3 -ftree-vectorize -fdump-tree-vect-details -save-temps" } */
+
+#include "template-1.h"
+
+/* { dg-final { scan-tree-dump-times "vectorized 1 loops in function" 3 "vect" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve64x_zvl128b-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve64x_zvl128b-1.c
new file mode 100644
index 00000000000..6920a395d1c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve64x_zvl128b-1.c
@@ -0,0 +1,4 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv32gc_zve64x_zvl128b -mabi=ilp32d --param riscv-autovec-preference=scalable -O3 -ftree-vectorize -fdump-tree-vect-details -save-temps" } */
+
+#include "template-1.h"
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve64x_zvl128b-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve64x_zvl128b-2.c
new file mode 100644
index 00000000000..d8b60babf9a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve64x_zvl128b-2.c
@@ -0,0 +1,6 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv32gc_zve64x_zvl128b -mabi=ilp32d --param riscv-autovec-preference=fixed-vlmax -O3 -ftree-vectorize -fdump-tree-vect-details -save-temps" } */
+
+#include "template-1.h"
+
+/* { dg-final { scan-tree-dump-times "vectorized 1 loops in function" 3 "vect" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/rvv.exp b/gcc/testsuite/gcc.target/riscv/rvv/rvv.exp
index 7a9a2b6ac48..18e3d1e9c5d 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/rvv.exp
+++ b/gcc/testsuite/gcc.target/riscv/rvv/rvv.exp
@@ -44,6 +44,22 @@ dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/base/*.\[cS\]]] \
"" $CFLAGS
gcc-dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/vsetvl/*.\[cS\]]] \
"" $CFLAGS
+dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/autovec/*.\[cS\]]] \
+ "" $CFLAGS
+
+set AUTOVEC_TEST_OPTS [list \
+ {-ftree-vectorize -O3 --param riscv-autovec-lmul=m1} \
+ {-ftree-vectorize -O3 --param riscv-autovec-lmul=m2} \
+ {-ftree-vectorize -O3 --param riscv-autovec-lmul=m4} \
+ {-ftree-vectorize -O3 --param riscv-autovec-lmul=m8} \
+ {-ftree-vectorize -O2 --param riscv-autovec-lmul=m1} \
+ {-ftree-vectorize -O2 --param riscv-autovec-lmul=m2} \
+ {-ftree-vectorize -O2 --param riscv-autovec-lmul=m4} \
+ {-ftree-vectorize -O2 --param riscv-autovec-lmul=m8} ]
+foreach op $AUTOVEC_TEST_OPTS {
+ gcc-dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/autovec/partial/*.\[cS\]]] \
+ "" "$op"
+}
# All done.
dg-finish
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-17.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-17.c
index ee58f9bbdfc..8a1bbb40fc8 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-17.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-17.c
@@ -11,4 +11,4 @@ void foo(int32_t *in1, int32_t *in2, int32_t *in3, int32_t *out, size_t n, int c
__riscv_vse32_v_i32m1(out, c, __riscv_vsetvl_e8mf2 (vl));
}
-/* { dg-final { scan-assembler-times {vsetvli} 8 { target { no-opts "-O0" no-opts "-g" no-opts "-funroll-loops" } } } } */
\ No newline at end of file
+/* { dg-final { scan-assembler-times {vsetvli} 7 { target { no-opts "-O0" no-opts "-g" no-opts "-funroll-loops" } } } } */
--
2.36.3
^ permalink raw reply [flat|nested] 2+ messages in thread
* Re: [PATCH] RISC-V: Add testcases for RVV auto-vectorization
2023-04-07 1:37 [PATCH] RISC-V: Add testcases for RVV auto-vectorization juzhe.zhong
@ 2023-04-28 22:02 ` Jeff Law
0 siblings, 0 replies; 2+ messages in thread
From: Jeff Law @ 2023-04-28 22:02 UTC (permalink / raw)
To: juzhe.zhong, gcc-patches; +Cc: kito.cheng, palmer
On 4/6/23 19:37, juzhe.zhong@rivai.ai wrote:
> From: Juzhe-Zhong <juzhe.zhong@rivai.ai>
>
> gcc/testsuite/ChangeLog:
>
> * gcc.target/riscv/rvv/rvv.exp: Add auto-vectorization testing.
> * gcc.target/riscv/rvv/vsetvl/vsetvl-17.c: Adapt testcase.
> * gcc.target/riscv/rvv/autovec/partial/multiple_rgroup-1.c: New test.
> * gcc.target/riscv/rvv/autovec/partial/multiple_rgroup-1.h: New test.
> * gcc.target/riscv/rvv/autovec/partial/multiple_rgroup-2.c: New test.
> * gcc.target/riscv/rvv/autovec/partial/multiple_rgroup-2.h: New test.
> * gcc.target/riscv/rvv/autovec/partial/multiple_rgroup_run-1.c: New test.
> * gcc.target/riscv/rvv/autovec/partial/multiple_rgroup_run-2.c: New test.
> * gcc.target/riscv/rvv/autovec/partial/single_rgroup-1.c: New test.
> * gcc.target/riscv/rvv/autovec/partial/single_rgroup-1.h: New test.
> * gcc.target/riscv/rvv/autovec/partial/single_rgroup_run-1.c: New test.
> * gcc.target/riscv/rvv/autovec/template-1.h: New test.
> * gcc.target/riscv/rvv/autovec/v-1.c: New test.
> * gcc.target/riscv/rvv/autovec/v-2.c: New test.
> * gcc.target/riscv/rvv/autovec/zve32f-1.c: New test.
> * gcc.target/riscv/rvv/autovec/zve32f-2.c: New test.
> * gcc.target/riscv/rvv/autovec/zve32f-3.c: New test.
> * gcc.target/riscv/rvv/autovec/zve32f_zvl128b-1.c: New test.
> * gcc.target/riscv/rvv/autovec/zve32f_zvl128b-2.c: New test.
> * gcc.target/riscv/rvv/autovec/zve32x-1.c: New test.
> * gcc.target/riscv/rvv/autovec/zve32x-2.c: New test.
> * gcc.target/riscv/rvv/autovec/zve32x-3.c: New test.
> * gcc.target/riscv/rvv/autovec/zve32x_zvl128b-1.c: New test.
> * gcc.target/riscv/rvv/autovec/zve32x_zvl128b-2.c: New test.
> * gcc.target/riscv/rvv/autovec/zve64d-1.c: New test.
> * gcc.target/riscv/rvv/autovec/zve64d-2.c: New test.
> * gcc.target/riscv/rvv/autovec/zve64d-3.c: New test.
> * gcc.target/riscv/rvv/autovec/zve64d_zvl128b-1.c: New test.
> * gcc.target/riscv/rvv/autovec/zve64d_zvl128b-2.c: New test.
> * gcc.target/riscv/rvv/autovec/zve64f-1.c: New test.
> * gcc.target/riscv/rvv/autovec/zve64f-2.c: New test.
> * gcc.target/riscv/rvv/autovec/zve64f-3.c: New test.
> * gcc.target/riscv/rvv/autovec/zve64f_zvl128b-1.c: New test.
> * gcc.target/riscv/rvv/autovec/zve64f_zvl128b-2.c: New test.
> * gcc.target/riscv/rvv/autovec/zve64x-1.c: New test.
> * gcc.target/riscv/rvv/autovec/zve64x-2.c: New test.
> * gcc.target/riscv/rvv/autovec/zve64x-3.c: New test.
> * gcc.target/riscv/rvv/autovec/zve64x_zvl128b-1.c: New test.
> * gcc.target/riscv/rvv/autovec/zve64x_zvl128b-2.c: New test.
This is fine for the trunk once the prerequisite patches to enable
autovect are installed (and thus the test passes).
jeff
^ permalink raw reply [flat|nested] 2+ messages in thread
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2023-04-07 1:37 [PATCH] RISC-V: Add testcases for RVV auto-vectorization juzhe.zhong
2023-04-28 22:02 ` Jeff Law
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