[PATCH 0/2] i386: Add missing AVX512BW dependency for ISAs using 32/64 bit mask

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* [PATCH 0/2] i386: Add missing AVX512BW dependency for ISAs using 32/64 bit mask
@ 2023-04-18  7:04 Haochen Jiang
  2023-04-18  7:04 ` [PATCH 1/2] i386: Add AVX512BW dependency to AVX512BITALG Haochen Jiang
  2023-04-18  7:04 ` [PATCH 2/2] i386: Add AVX512BW dependency to AVX512VBMI2 Haochen Jiang
  0 siblings, 2 replies; 5+ messages in thread
From: Haochen Jiang @ 2023-04-18  7:04 UTC (permalink / raw)
  To: gcc-patches; +Cc: hongtao.liu, ubizjak

Hi all,

32/64 bit mask are introduced in AVX512BW. Therefore, when we are using them,
we should imply AVX512BW.

The two patches added the dependency and removed the redundant AVX512BW usage
for AVX512BITALG and AVX512VBMI2.

Tested on x86_64-pc-linux-gnu. Ok for trunk?

BRs,
Haochen

^ permalink raw reply	[flat|nested] 5+ messages in thread

* [PATCH 1/2] i386: Add AVX512BW dependency to AVX512BITALG
  2023-04-18  7:04 [PATCH 0/2] i386: Add missing AVX512BW dependency for ISAs using 32/64 bit mask Haochen Jiang
@ 2023-04-18  7:04 ` Haochen Jiang
  2023-04-19  1:42   ` Hongtao Liu
  2023-04-18  7:04 ` [PATCH 2/2] i386: Add AVX512BW dependency to AVX512VBMI2 Haochen Jiang
  1 sibling, 1 reply; 5+ messages in thread
From: Haochen Jiang @ 2023-04-18  7:04 UTC (permalink / raw)
  To: gcc-patches; +Cc: hongtao.liu, ubizjak

gcc/ChangeLog:

	* common/config/i386/i386-common.cc
	(OPTION_MASK_ISA_AVX512BITALG_SET):
	Change OPTION_MASK_ISA_AVX512F_SET
	to OPTION_MASK_ISA_AVX512BW_SET.
	(OPTION_MASK_ISA_AVX512F_UNSET):
	Remove OPTION_MASK_ISA_AVX512BITALG_SET.
	(OPTION_MASK_ISA_AVX512BW_UNSET):
	Add OPTION_MASK_ISA_AVX512BITALG_SET.
	* config/i386/avx512bitalgintrin.h: Do not push avx512bw.
	* config/i386/i386-builtin.def:
	Remove redundant OPTION_MASK_ISA_AVX512BW.
	* config/i386/sse.md (VI1_AVX512VLBW): Removed.
	(avx512vl_vpshufbitqmb<mode><mask_scalar_merge_name>):
	Change the iterator from VI1_AVX512VLBW to VI1_AVX512VL.

gcc/testsuite/ChangeLog:

	* gcc.target/i386/avx512bitalg-vpopcntb-1.c:
	Remove avx512bw.
	* gcc.target/i386/avx512bitalg-vpopcntb.c: Ditto.
	* gcc.target/i386/avx512bitalg-vpopcntbvl.c: Ditto.
	* gcc.target/i386/avx512bitalg-vpopcntw-1.c: Ditto.
	* gcc.target/i386/avx512bitalg-vpopcntw.c: Ditto.
	* gcc.target/i386/avx512bitalg-vpopcntwvl.c: Ditto.
	* gcc.target/i386/avx512bitalg-vpshufbitqmb-1.c: Ditto.
	* gcc.target/i386/avx512bitalg-vpshufbitqmb.c: Ditto.
	* gcc.target/i386/avx512bitalgvl-vpopcntb-1.c: Ditto.
	* gcc.target/i386/avx512bitalgvl-vpopcntw-1.c: Ditto.
	* gcc.target/i386/avx512bitalgvl-vpshufbitqmb-1.c: Ditto.
	* gcc.target/i386/pr93696-1.c: Ditto.
	* gcc.target/i386/pr93696-2.c: Ditto.
---
 gcc/common/config/i386/i386-common.cc         |  8 ++--
 gcc/config/i386/avx512bitalgintrin.h          | 39 ++++---------------
 gcc/config/i386/i386-builtin.def              | 10 ++---
 gcc/config/i386/sse.md                        |  8 +---
 .../gcc.target/i386/avx512bitalg-vpopcntb-1.c |  3 +-
 .../gcc.target/i386/avx512bitalg-vpopcntb.c   |  2 +-
 .../gcc.target/i386/avx512bitalg-vpopcntbvl.c |  2 +-
 .../gcc.target/i386/avx512bitalg-vpopcntw-1.c |  3 +-
 .../gcc.target/i386/avx512bitalg-vpopcntw.c   |  2 +-
 .../gcc.target/i386/avx512bitalg-vpopcntwvl.c |  2 +-
 .../i386/avx512bitalg-vpshufbitqmb-1.c        |  2 +-
 .../i386/avx512bitalg-vpshufbitqmb.c          |  2 +-
 .../i386/avx512bitalgvl-vpopcntb-1.c          |  3 +-
 .../i386/avx512bitalgvl-vpopcntw-1.c          |  3 +-
 .../i386/avx512bitalgvl-vpshufbitqmb-1.c      |  2 +-
 gcc/testsuite/gcc.target/i386/pr93696-1.c     |  2 +-
 gcc/testsuite/gcc.target/i386/pr93696-2.c     |  2 +-
 17 files changed, 32 insertions(+), 63 deletions(-)

diff --git a/gcc/common/config/i386/i386-common.cc b/gcc/common/config/i386/i386-common.cc
index d90c558311b..f78fc0a60e2 100644
--- a/gcc/common/config/i386/i386-common.cc
+++ b/gcc/common/config/i386/i386-common.cc
@@ -91,7 +91,7 @@ along with GCC; see the file COPYING3.  If not see
 #define OPTION_MASK_ISA_AVX512VPOPCNTDQ_SET \
   (OPTION_MASK_ISA_AVX512VPOPCNTDQ | OPTION_MASK_ISA_AVX512F_SET)
 #define OPTION_MASK_ISA_AVX512BITALG_SET \
-  (OPTION_MASK_ISA_AVX512BITALG | OPTION_MASK_ISA_AVX512F_SET)
+  (OPTION_MASK_ISA_AVX512BITALG | OPTION_MASK_ISA_AVX512BW_SET)
 #define OPTION_MASK_ISA2_AVX512BF16_SET OPTION_MASK_ISA2_AVX512BF16
 #define OPTION_MASK_ISA_RTM_SET OPTION_MASK_ISA_RTM
 #define OPTION_MASK_ISA_PRFCHW_SET OPTION_MASK_ISA_PRFCHW
@@ -234,14 +234,14 @@ along with GCC; see the file COPYING3.  If not see
    | OPTION_MASK_ISA_AVX512VL_UNSET | OPTION_MASK_ISA_AVX512IFMA_UNSET \
    | OPTION_MASK_ISA_AVX512VBMI2_UNSET \
    | OPTION_MASK_ISA_AVX512VNNI_UNSET \
-   | OPTION_MASK_ISA_AVX512VPOPCNTDQ_UNSET \
-   | OPTION_MASK_ISA_AVX512BITALG_UNSET)
+   | OPTION_MASK_ISA_AVX512VPOPCNTDQ_UNSET)
 #define OPTION_MASK_ISA_AVX512CD_UNSET OPTION_MASK_ISA_AVX512CD
 #define OPTION_MASK_ISA_AVX512PF_UNSET OPTION_MASK_ISA_AVX512PF
 #define OPTION_MASK_ISA_AVX512ER_UNSET OPTION_MASK_ISA_AVX512ER
 #define OPTION_MASK_ISA_AVX512DQ_UNSET OPTION_MASK_ISA_AVX512DQ
 #define OPTION_MASK_ISA_AVX512BW_UNSET \
-  (OPTION_MASK_ISA_AVX512BW | OPTION_MASK_ISA_AVX512VBMI_UNSET)
+  (OPTION_MASK_ISA_AVX512BW | OPTION_MASK_ISA_AVX512VBMI_UNSET \
+   | OPTION_MASK_ISA_AVX512BITALG_UNSET)
 #define OPTION_MASK_ISA_AVX512VL_UNSET OPTION_MASK_ISA_AVX512VL
 #define OPTION_MASK_ISA_AVX512IFMA_UNSET OPTION_MASK_ISA_AVX512IFMA
 #define OPTION_MASK_ISA2_AVXIFMA_UNSET OPTION_MASK_ISA2_AVXIFMA
diff --git a/gcc/config/i386/avx512bitalgintrin.h b/gcc/config/i386/avx512bitalgintrin.h
index aa6d652938a..a1c7be109a9 100644
--- a/gcc/config/i386/avx512bitalgintrin.h
+++ b/gcc/config/i386/avx512bitalgintrin.h
@@ -48,17 +48,6 @@ _mm512_popcnt_epi16 (__m512i __A)
   return (__m512i) __builtin_ia32_vpopcountw_v32hi ((__v32hi) __A);
 }
 
-#ifdef __DISABLE_AVX512BITALG__
-#undef __DISABLE_AVX512BITALG__
-#pragma GCC pop_options
-#endif /* __DISABLE_AVX512BITALG__ */
-
-#if !defined(__AVX512BITALG__) || !defined(__AVX512BW__)
-#pragma GCC push_options
-#pragma GCC target("avx512bitalg,avx512bw")
-#define __DISABLE_AVX512BITALGBW__
-#endif /* __AVX512VLBW__ */
-
 extern __inline __m512i
 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
 _mm512_mask_popcnt_epi8 (__m512i __W, __mmask64 __U, __m512i __A)
@@ -114,16 +103,16 @@ _mm512_mask_bitshuffle_epi64_mask (__mmask64 __M, __m512i __A, __m512i __B)
 						 (__mmask64) __M);
 }
 
-#ifdef __DISABLE_AVX512BITALGBW__
-#undef __DISABLE_AVX512BITALGBW__
+#ifdef __DISABLE_AVX512BITALG__
+#undef __DISABLE_AVX512BITALG__
 #pragma GCC pop_options
-#endif /* __DISABLE_AVX512BITALGBW__ */
+#endif /* __DISABLE_AVX512BITALG__ */
 
-#if !defined(__AVX512BITALG__) || !defined(__AVX512VL__) || !defined(__AVX512BW__)
+#if !defined(__AVX512BITALG__) || !defined(__AVX512VL__)
 #pragma GCC push_options
-#pragma GCC target("avx512bitalg,avx512vl,avx512bw")
-#define __DISABLE_AVX512BITALGVLBW__
-#endif /* __AVX512VLBW__ */
+#pragma GCC target("avx512bitalg,avx512vl")
+#define __DISABLE_AVX512BITALGVL__
+#endif /* __AVX512BITALGVL__ */
 
 extern __inline __m256i
 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
@@ -162,18 +151,6 @@ _mm256_mask_bitshuffle_epi64_mask (__mmask32 __M, __m256i __A, __m256i __B)
 						 (__mmask32) __M);
 }
 
-#ifdef __DISABLE_AVX512BITALGVLBW__
-#undef __DISABLE_AVX512BITALGVLBW__
-#pragma GCC pop_options
-#endif /* __DISABLE_AVX512BITALGVLBW__ */
-
-
-#if !defined(__AVX512BITALG__) || !defined(__AVX512VL__)
-#pragma GCC push_options
-#pragma GCC target("avx512bitalg,avx512vl")
-#define __DISABLE_AVX512BITALGVL__
-#endif /* __AVX512VLBW__ */
-
 extern __inline __mmask16
 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
 _mm_bitshuffle_epi64_mask (__m128i __A, __m128i __B)
@@ -278,6 +255,6 @@ _mm_maskz_popcnt_epi16 (__mmask8 __U, __m128i __A)
 #ifdef __DISABLE_AVX512BITALGVL__
 #undef __DISABLE_AVX512BITALGVL__
 #pragma GCC pop_options
-#endif /* __DISABLE_AVX512BITALGBW__ */
+#endif /* __DISABLE_AVX512BITALGVL__ */
 
 #endif /* _AVX512BITALGINTRIN_H_INCLUDED */
diff --git a/gcc/config/i386/i386-builtin.def b/gcc/config/i386/i386-builtin.def
index 6dae6972d81..c4167307992 100644
--- a/gcc/config/i386/i386-builtin.def
+++ b/gcc/config/i386/i386-builtin.def
@@ -2762,21 +2762,21 @@ BDESC (OPTION_MASK_ISA_AVX512VPOPCNTDQ | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_v
 
 /* BITALG */
 BDESC (OPTION_MASK_ISA_AVX512BITALG, 0, CODE_FOR_vpopcountv64qi, "__builtin_ia32_vpopcountb_v64qi", IX86_BUILTIN_VPOPCOUNTBV64QI, UNKNOWN, (int) V64QI_FTYPE_V64QI)
-BDESC (OPTION_MASK_ISA_AVX512BITALG | OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_vpopcountv64qi_mask, "__builtin_ia32_vpopcountb_v64qi_mask", IX86_BUILTIN_VPOPCOUNTBV64QI_MASK, UNKNOWN, (int) V64QI_FTYPE_V64QI_V64QI_UDI)
+BDESC (OPTION_MASK_ISA_AVX512BITALG, 0, CODE_FOR_vpopcountv64qi_mask, "__builtin_ia32_vpopcountb_v64qi_mask", IX86_BUILTIN_VPOPCOUNTBV64QI_MASK, UNKNOWN, (int) V64QI_FTYPE_V64QI_V64QI_UDI)
 BDESC (OPTION_MASK_ISA_AVX512BITALG | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpopcountv32qi, "__builtin_ia32_vpopcountb_v32qi", IX86_BUILTIN_VPOPCOUNTBV32QI, UNKNOWN, (int) V32QI_FTYPE_V32QI)
-BDESC (OPTION_MASK_ISA_AVX512BITALG | OPTION_MASK_ISA_AVX512VL | OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_vpopcountv32qi_mask, "__builtin_ia32_vpopcountb_v32qi_mask", IX86_BUILTIN_VPOPCOUNTBV32QI_MASK, UNKNOWN, (int) V32QI_FTYPE_V32QI_V32QI_USI)
+BDESC (OPTION_MASK_ISA_AVX512BITALG | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpopcountv32qi_mask, "__builtin_ia32_vpopcountb_v32qi_mask", IX86_BUILTIN_VPOPCOUNTBV32QI_MASK, UNKNOWN, (int) V32QI_FTYPE_V32QI_V32QI_USI)
 BDESC (OPTION_MASK_ISA_AVX512BITALG | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpopcountv16qi, "__builtin_ia32_vpopcountb_v16qi", IX86_BUILTIN_VPOPCOUNTBV16QI, UNKNOWN, (int) V16QI_FTYPE_V16QI)
 BDESC (OPTION_MASK_ISA_AVX512BITALG | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpopcountv16qi_mask, "__builtin_ia32_vpopcountb_v16qi_mask", IX86_BUILTIN_VPOPCOUNTBV16QI_MASK, UNKNOWN, (int) V16QI_FTYPE_V16QI_V16QI_UHI)
 
 BDESC (OPTION_MASK_ISA_AVX512BITALG, 0, CODE_FOR_vpopcountv32hi, "__builtin_ia32_vpopcountw_v32hi", IX86_BUILTIN_VPOPCOUNTWV32HI, UNKNOWN, (int) V32HI_FTYPE_V32HI)
-BDESC (OPTION_MASK_ISA_AVX512BITALG | OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_vpopcountv32hi_mask, "__builtin_ia32_vpopcountw_v32hi_mask", IX86_BUILTIN_VPOPCOUNTQV32HI_MASK, UNKNOWN, (int) V32HI_FTYPE_V32HI_V32HI_USI)
+BDESC (OPTION_MASK_ISA_AVX512BITALG, 0, CODE_FOR_vpopcountv32hi_mask, "__builtin_ia32_vpopcountw_v32hi_mask", IX86_BUILTIN_VPOPCOUNTQV32HI_MASK, UNKNOWN, (int) V32HI_FTYPE_V32HI_V32HI_USI)
 BDESC (OPTION_MASK_ISA_AVX512BITALG | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpopcountv16hi, "__builtin_ia32_vpopcountw_v16hi", IX86_BUILTIN_VPOPCOUNTWV16HI, UNKNOWN, (int) V16HI_FTYPE_V16HI)
 BDESC (OPTION_MASK_ISA_AVX512BITALG | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpopcountv16hi_mask, "__builtin_ia32_vpopcountw_v16hi_mask", IX86_BUILTIN_VPOPCOUNTQV16HI_MASK, UNKNOWN, (int) V16HI_FTYPE_V16HI_V16HI_UHI)
 BDESC (OPTION_MASK_ISA_AVX512BITALG | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpopcountv8hi, "__builtin_ia32_vpopcountw_v8hi", IX86_BUILTIN_VPOPCOUNTWV8HI, UNKNOWN, (int) V8HI_FTYPE_V8HI)
 BDESC (OPTION_MASK_ISA_AVX512BITALG | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpopcountv8hi_mask, "__builtin_ia32_vpopcountw_v8hi_mask", IX86_BUILTIN_VPOPCOUNTQV8HI_MASK, UNKNOWN, (int) V8HI_FTYPE_V8HI_V8HI_UQI)
 
-BDESC (OPTION_MASK_ISA_AVX512BITALG | OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_avx512vl_vpshufbitqmbv64qi_mask, "__builtin_ia32_vpshufbitqmb512_mask", IX86_BUILTIN_VPSHUFBITQMB512_MASK, UNKNOWN, (int) UDI_FTYPE_V64QI_V64QI_UDI)
-BDESC (OPTION_MASK_ISA_AVX512BITALG | OPTION_MASK_ISA_AVX512VL | OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_avx512vl_vpshufbitqmbv32qi_mask, "__builtin_ia32_vpshufbitqmb256_mask", IX86_BUILTIN_VPSHUFBITQMB256_MASK, UNKNOWN, (int) USI_FTYPE_V32QI_V32QI_USI)
+BDESC (OPTION_MASK_ISA_AVX512BITALG, 0, CODE_FOR_avx512vl_vpshufbitqmbv64qi_mask, "__builtin_ia32_vpshufbitqmb512_mask", IX86_BUILTIN_VPSHUFBITQMB512_MASK, UNKNOWN, (int) UDI_FTYPE_V64QI_V64QI_UDI)
+BDESC (OPTION_MASK_ISA_AVX512BITALG | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_avx512vl_vpshufbitqmbv32qi_mask, "__builtin_ia32_vpshufbitqmb256_mask", IX86_BUILTIN_VPSHUFBITQMB256_MASK, UNKNOWN, (int) USI_FTYPE_V32QI_V32QI_USI)
 BDESC (OPTION_MASK_ISA_AVX512BITALG | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_avx512vl_vpshufbitqmbv16qi_mask, "__builtin_ia32_vpshufbitqmb128_mask", IX86_BUILTIN_VPSHUFBITQMB128_MASK, UNKNOWN, (int) UHI_FTYPE_V16QI_V16QI_UHI)
 
 /* AVX512_4FMAPS and AVX512_4VNNIW builtins with variable number of arguments. Defined in additional ix86_isa_flags2.  */
diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
index 5b6b2427460..deb2d747ec1 100644
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -686,10 +686,6 @@
 (define_mode_iterator VF4_128_8_256
   [V4DF V4SF])
 
-(define_mode_iterator VI1_AVX512VLBW
-  [(V64QI "TARGET_AVX512BW") (V32QI  "TARGET_AVX512VL")
-	(V16QI  "TARGET_AVX512VL")])
-
 (define_mode_attr avx512
   [(V16QI "avx512vl") (V32QI "avx512vl") (V64QI "avx512bw")
    (V8HI  "avx512vl") (V16HI  "avx512vl") (V32HI "avx512bw")
@@ -28853,8 +28849,8 @@
 (define_insn "avx512vl_vpshufbitqmb<mode><mask_scalar_merge_name>"
   [(set (match_operand:<avx512fmaskmode> 0 "register_operand" "=k")
 	(unspec:<avx512fmaskmode>
-	  [(match_operand:VI1_AVX512VLBW 1 "register_operand" "v")
-	   (match_operand:VI1_AVX512VLBW 2 "nonimmediate_operand" "vm")]
+	  [(match_operand:VI1_AVX512VL 1 "register_operand" "v")
+	   (match_operand:VI1_AVX512VL 2 "nonimmediate_operand" "vm")]
 	  UNSPEC_VPSHUFBIT))]
   "TARGET_AVX512BITALG"
   "vpshufbitqmb\t{%2, %1, %0<mask_scalar_merge_operand3>|%0<mask_scalar_merge_operand3>, %1, %2}"
diff --git a/gcc/testsuite/gcc.target/i386/avx512bitalg-vpopcntb-1.c b/gcc/testsuite/gcc.target/i386/avx512bitalg-vpopcntb-1.c
index 697757b8b73..93afe13227f 100644
--- a/gcc/testsuite/gcc.target/i386/avx512bitalg-vpopcntb-1.c
+++ b/gcc/testsuite/gcc.target/i386/avx512bitalg-vpopcntb-1.c
@@ -1,7 +1,6 @@
 /* { dg-do run } */
-/* { dg-options "-O2 -mavx512bitalg -mavx512bw" } */
+/* { dg-options "-O2 -mavx512bitalg" } */
 /* { dg-require-effective-target avx512bitalg } */
-/* { dg-require-effective-target avx512bw } */
 
 #define AVX512BITALG
 #define SIZE (AVX512F_LEN / 8)
diff --git a/gcc/testsuite/gcc.target/i386/avx512bitalg-vpopcntb.c b/gcc/testsuite/gcc.target/i386/avx512bitalg-vpopcntb.c
index 246f925eede..44b82c0519d 100644
--- a/gcc/testsuite/gcc.target/i386/avx512bitalg-vpopcntb.c
+++ b/gcc/testsuite/gcc.target/i386/avx512bitalg-vpopcntb.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-O2 -mavx512bitalg -mavx512bw" } */
+/* { dg-options "-O2 -mavx512bitalg" } */
 /* { dg-final { scan-assembler-times "vpopcntb\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)"  1 } } */
 /* { dg-final { scan-assembler-times "vpopcntb\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)"  1 } } */
 /* { dg-final { scan-assembler-times "vpopcntb\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)"  1 } } */
diff --git a/gcc/testsuite/gcc.target/i386/avx512bitalg-vpopcntbvl.c b/gcc/testsuite/gcc.target/i386/avx512bitalg-vpopcntbvl.c
index 8c7f45fc5f7..8c2dfaba9c6 100644
--- a/gcc/testsuite/gcc.target/i386/avx512bitalg-vpopcntbvl.c
+++ b/gcc/testsuite/gcc.target/i386/avx512bitalg-vpopcntbvl.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-O2 -mavx512bitalg -mavx512bw -mavx512vl" } */
+/* { dg-options "-O2 -mavx512bitalg -mavx512vl" } */
 /* { dg-final { scan-assembler-times "vpopcntb\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)"  1 } } */
 /* { dg-final { scan-assembler-times "vpopcntb\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)"  1 } } */
 /* { dg-final { scan-assembler-times "vpopcntb\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)"  1 } } */
diff --git a/gcc/testsuite/gcc.target/i386/avx512bitalg-vpopcntw-1.c b/gcc/testsuite/gcc.target/i386/avx512bitalg-vpopcntw-1.c
index 0a725fe012a..93e2be23f1f 100644
--- a/gcc/testsuite/gcc.target/i386/avx512bitalg-vpopcntw-1.c
+++ b/gcc/testsuite/gcc.target/i386/avx512bitalg-vpopcntw-1.c
@@ -1,7 +1,6 @@
 /* { dg-do run } */
-/* { dg-options "-O2 -mavx512bitalg -mavx512bw" } */
+/* { dg-options "-O2 -mavx512bitalg" } */
 /* { dg-require-effective-target avx512bitalg } */
-/* { dg-require-effective-target avx512bw } */
 
 #define AVX512BITALG
 #define SIZE (AVX512F_LEN / 16)
diff --git a/gcc/testsuite/gcc.target/i386/avx512bitalg-vpopcntw.c b/gcc/testsuite/gcc.target/i386/avx512bitalg-vpopcntw.c
index 90663f480fc..2ef8589f6c1 100644
--- a/gcc/testsuite/gcc.target/i386/avx512bitalg-vpopcntw.c
+++ b/gcc/testsuite/gcc.target/i386/avx512bitalg-vpopcntw.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-O2 -mavx512bitalg -mavx512bw" } */
+/* { dg-options "-O2 -mavx512bitalg" } */
 /* { dg-final { scan-assembler-times "vpopcntw\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)"  1 } } */
 /* { dg-final { scan-assembler-times "vpopcntw\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)"  1 } } */
 /* { dg-final { scan-assembler-times "vpopcntw\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)"  1 } } */
diff --git a/gcc/testsuite/gcc.target/i386/avx512bitalg-vpopcntwvl.c b/gcc/testsuite/gcc.target/i386/avx512bitalg-vpopcntwvl.c
index 3a646b57282..c976461b12e 100644
--- a/gcc/testsuite/gcc.target/i386/avx512bitalg-vpopcntwvl.c
+++ b/gcc/testsuite/gcc.target/i386/avx512bitalg-vpopcntwvl.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-O2 -mavx512bitalg -mavx512bw -mavx512vl" } */
+/* { dg-options "-O2 -mavx512bitalg -mavx512vl" } */
 /* { dg-final { scan-assembler-times "vpopcntw\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)"  1 } } */
 /* { dg-final { scan-assembler-times "vpopcntw\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)"  1 } } */
 /* { dg-final { scan-assembler-times "vpopcntw\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)"  1 } } */
diff --git a/gcc/testsuite/gcc.target/i386/avx512bitalg-vpshufbitqmb-1.c b/gcc/testsuite/gcc.target/i386/avx512bitalg-vpshufbitqmb-1.c
index 668064aa4e1..5e881484bde 100644
--- a/gcc/testsuite/gcc.target/i386/avx512bitalg-vpshufbitqmb-1.c
+++ b/gcc/testsuite/gcc.target/i386/avx512bitalg-vpshufbitqmb-1.c
@@ -1,5 +1,5 @@
 /* { dg-do run } */
-/* { dg-options "-O2 -mavx512bitalg -mavx512f -mavx512bw" } */
+/* { dg-options "-O2 -mavx512bitalg" } */
 /* { dg-require-effective-target avx512bitalg } */
 
 #define AVX512BITALG
diff --git a/gcc/testsuite/gcc.target/i386/avx512bitalg-vpshufbitqmb.c b/gcc/testsuite/gcc.target/i386/avx512bitalg-vpshufbitqmb.c
index 7acb0c203f3..75fbef89732 100644
--- a/gcc/testsuite/gcc.target/i386/avx512bitalg-vpshufbitqmb.c
+++ b/gcc/testsuite/gcc.target/i386/avx512bitalg-vpshufbitqmb.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-mavx512bitalg -mavx512vl -mavx512bw -O2" } */
+/* { dg-options "-mavx512bitalg -mavx512vl -O2" } */
 /* { dg-final { scan-assembler-times "vpshufbitqmb\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\]*%k\[0-7\]\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
 /* { dg-final { scan-assembler-times "vpshufbitqmb\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\]*%k\[0-7\]\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
 /* { dg-final { scan-assembler-times "vpshufbitqmb\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\]*%k\[0-7\]\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
diff --git a/gcc/testsuite/gcc.target/i386/avx512bitalgvl-vpopcntb-1.c b/gcc/testsuite/gcc.target/i386/avx512bitalgvl-vpopcntb-1.c
index 607ec3ff3df..a4e9d63fc1c 100644
--- a/gcc/testsuite/gcc.target/i386/avx512bitalgvl-vpopcntb-1.c
+++ b/gcc/testsuite/gcc.target/i386/avx512bitalgvl-vpopcntb-1.c
@@ -1,8 +1,7 @@
 /* { dg-do run } */
-/* { dg-options "-O2 -mavx512vl -mavx512bitalg -mavx512bw" } */
+/* { dg-options "-O2 -mavx512vl -mavx512bitalg" } */
 /* { dg-require-effective-target avx512vl } */
 /* { dg-require-effective-target avx512bitalg } */
-/* { dg-require-effective-target avx512bw } */
 
 #define AVX512VL
 #define AVX512F_LEN 256
diff --git a/gcc/testsuite/gcc.target/i386/avx512bitalgvl-vpopcntw-1.c b/gcc/testsuite/gcc.target/i386/avx512bitalgvl-vpopcntw-1.c
index 3d7e2b5eb11..55fa811fb46 100644
--- a/gcc/testsuite/gcc.target/i386/avx512bitalgvl-vpopcntw-1.c
+++ b/gcc/testsuite/gcc.target/i386/avx512bitalgvl-vpopcntw-1.c
@@ -1,8 +1,7 @@
 /* { dg-do run } */
-/* { dg-options "-O2 -mavx512vl -mavx512bitalg -mavx512bw" } */
+/* { dg-options "-O2 -mavx512vl -mavx512bitalg" } */
 /* { dg-require-effective-target avx512vl } */
 /* { dg-require-effective-target avx512bitalg } */
-/* { dg-require-effective-target avx512bw } */
 
 #define AVX512VL
 #define AVX512F_LEN 256
diff --git a/gcc/testsuite/gcc.target/i386/avx512bitalgvl-vpshufbitqmb-1.c b/gcc/testsuite/gcc.target/i386/avx512bitalgvl-vpshufbitqmb-1.c
index 76598c44946..497e369bf80 100644
--- a/gcc/testsuite/gcc.target/i386/avx512bitalgvl-vpshufbitqmb-1.c
+++ b/gcc/testsuite/gcc.target/i386/avx512bitalgvl-vpshufbitqmb-1.c
@@ -1,5 +1,5 @@
 /* { dg-do run } */
-/* { dg-options "-O2 -mavx512vl -mavx512bitalg -mavx512bw" } */
+/* { dg-options "-O2 -mavx512vl -mavx512bitalg" } */
 /* { dg-require-effective-target avx512vl } */
 /* { dg-require-effective-target avx512bitalg } */
 
diff --git a/gcc/testsuite/gcc.target/i386/pr93696-1.c b/gcc/testsuite/gcc.target/i386/pr93696-1.c
index 128bb98c066..70f0f8ad8e1 100644
--- a/gcc/testsuite/gcc.target/i386/pr93696-1.c
+++ b/gcc/testsuite/gcc.target/i386/pr93696-1.c
@@ -1,6 +1,6 @@
 /* PR target/93696 */
 /* { dg-do compile } */
-/* { dg-options "-O2 -mavx512bitalg -mavx512vpopcntdq -mavx512vl -mavx512bw -masm=att" } */
+/* { dg-options "-O2 -mavx512bitalg -mavx512vpopcntdq -mavx512vl -masm=att" } */
 /* { dg-final { scan-assembler-times "vpopcnt\[bwdq]\t%\[xyz]mm1, %\[xyz]mm0\{%k\[0-7]\}\[^\{]" 12 } } */
 /* { dg-final { scan-assembler-not "vmovdq\[au]\[0-9]" } } */
 
diff --git a/gcc/testsuite/gcc.target/i386/pr93696-2.c b/gcc/testsuite/gcc.target/i386/pr93696-2.c
index 25a298aea18..e6aabd4d081 100644
--- a/gcc/testsuite/gcc.target/i386/pr93696-2.c
+++ b/gcc/testsuite/gcc.target/i386/pr93696-2.c
@@ -1,6 +1,6 @@
 /* PR target/93696 */
 /* { dg-do compile } */
-/* { dg-options "-O2 -mavx512bitalg -mavx512vpopcntdq -mavx512vl -mavx512bw -masm=att" } */
+/* { dg-options "-O2 -mavx512bitalg -mavx512vpopcntdq -mavx512vl -masm=att" } */
 /* { dg-final { scan-assembler-times "vpopcnt\[bwdq]\t%\[xyz]mm1, %\[xyz]mm0\{%k\[0-7]\}\{z\}" 12 } } */
 /* { dg-final { scan-assembler-not "vmovdq\[au]\[0-9]" } } */
 
-- 
2.31.1


^ permalink raw reply	[flat|nested] 5+ messages in thread

* [PATCH 2/2] i386: Add AVX512BW dependency to AVX512VBMI2
  2023-04-18  7:04 [PATCH 0/2] i386: Add missing AVX512BW dependency for ISAs using 32/64 bit mask Haochen Jiang
  2023-04-18  7:04 ` [PATCH 1/2] i386: Add AVX512BW dependency to AVX512BITALG Haochen Jiang
@ 2023-04-18  7:04 ` Haochen Jiang
  2023-04-19  1:43   ` Hongtao Liu
  1 sibling, 1 reply; 5+ messages in thread
From: Haochen Jiang @ 2023-04-18  7:04 UTC (permalink / raw)
  To: gcc-patches; +Cc: hongtao.liu, ubizjak

gcc/ChangeLog:

	* common/config/i386/i386-common.cc
	(OPTION_MASK_ISA_AVX512VBMI2_SET): Change OPTION_MASK_ISA_AVX512F_SET
	to OPTION_MASK_ISA_AVX512BW_SET.
	(OPTION_MASK_ISA_AVX512F_UNSET):
	Remove OPTION_MASK_ISA_AVX512VBMI2_UNSET.
	(OPTION_MASK_ISA_AVX512BW_UNSET):
	Add OPTION_MASK_ISA_AVX512VBMI2_UNSET.
	* config/i386/avx512vbmi2intrin.h: Do not push avx512bw.
	* config/i386/avx512vbmi2vlintrin.h: Ditto.
	* config/i386/i386-builtin.def: Remove OPTION_MASK_ISA_AVX512BW.
	* config/i386/sse.md (VI12_AVX512VLBW): Removed.
	(VI12_VI48F_AVX512VLBW): Rename to VI12_VI48F_AVX512VL.
	(compress<mode>_mask): Change iterator from VI12_AVX512VLBW to
	VI12_AVX512VL.
	(compressstore<mode>_mask): Ditto.
	(expand<mode>_mask): Ditto.
	(expand<mode>_maskz): Ditto.
	(*expand<mode>_mask): Change iterator from VI12_VI48F_AVX512VLBW to
	VI12_VI48F_AVX512VL.

gcc/testsuite/ChangeLog:

	* gcc.target/i386/avx512bw-pr100267-1.c: Remove avx512f and avx512bw.
	* gcc.target/i386/avx512bw-pr100267-b-2.c: Ditto.
	* gcc.target/i386/avx512bw-pr100267-d-2.c: Ditto.
	* gcc.target/i386/avx512bw-pr100267-q-2.c: Ditto.
	* gcc.target/i386/avx512bw-pr100267-w-2.c: Ditto.
	* gcc.target/i386/avx512f-vpcompressb-1.c: Ditto.
	* gcc.target/i386/avx512f-vpcompressb-2.c: Ditto.
	* gcc.target/i386/avx512f-vpcompressw-1.c: Ditto.
	* gcc.target/i386/avx512f-vpcompressw-2.c: Ditto.
	* gcc.target/i386/avx512f-vpexpandb-1.c: Ditto.
	* gcc.target/i386/avx512f-vpexpandb-2.c: Ditto.
	* gcc.target/i386/avx512f-vpexpandw-1.c: Ditto.
	* gcc.target/i386/avx512f-vpexpandw-2.c: Ditto.
	* gcc.target/i386/avx512f-vpshld-1.c: Ditto.
	* gcc.target/i386/avx512f-vpshldd-2.c: Ditto.
	* gcc.target/i386/avx512f-vpshldq-2.c: Ditto.
	* gcc.target/i386/avx512f-vpshldv-1.c: Ditto.
	* gcc.target/i386/avx512f-vpshldvd-2.c: Ditto.
	* gcc.target/i386/avx512f-vpshldvq-2.c: Ditto.
	* gcc.target/i386/avx512f-vpshldvw-2.c: Ditto.
	* gcc.target/i386/avx512f-vpshrdd-2.c: Ditto.
	* gcc.target/i386/avx512f-vpshrdq-2.c: Ditto.
	* gcc.target/i386/avx512f-vpshrdv-1.c: Ditto.
	* gcc.target/i386/avx512f-vpshrdvd-2.c: Ditto.
	* gcc.target/i386/avx512f-vpshrdvq-2.c: Ditto.
	* gcc.target/i386/avx512f-vpshrdvw-2.c: Ditto.
	* gcc.target/i386/avx512f-vpshrdw-2.c: Ditto.
	* gcc.target/i386/avx512vbmi2-vpshld-1.c: Ditto.
	* gcc.target/i386/avx512vbmi2-vpshrd-1.c: Ditto.
	* gcc.target/i386/avx512vl-vpcompressb-1.c: Ditto.
	* gcc.target/i386/avx512vl-vpcompressb-2.c: Ditto.
	* gcc.target/i386/avx512vl-vpcompressw-2.c: Ditto.
	* gcc.target/i386/avx512vl-vpexpandb-1.c: Ditto.
	* gcc.target/i386/avx512vl-vpexpandb-2.c: Ditto.
	* gcc.target/i386/avx512vl-vpexpandw-1.c: Ditto.
	* gcc.target/i386/avx512vl-vpexpandw-2.c: Ditto.
	* gcc.target/i386/avx512vl-vpshldd-2.c: Ditto.
	* gcc.target/i386/avx512vl-vpshldq-2.c: Ditto.
	* gcc.target/i386/avx512vl-vpshldv-1.c: Ditto.
	* gcc.target/i386/avx512vl-vpshldvd-2.c: Ditto.
	* gcc.target/i386/avx512vl-vpshldvq-2.c: Ditto.
	* gcc.target/i386/avx512vl-vpshldvw-2.c: Ditto.
	* gcc.target/i386/avx512vl-vpshrdd-2.c: Ditto.
	* gcc.target/i386/avx512vl-vpshrdq-2.c: Ditto.
	* gcc.target/i386/avx512vl-vpshrdv-1.c: Ditto.
	* gcc.target/i386/avx512vl-vpshrdvd-2.c: Ditto.
	* gcc.target/i386/avx512vl-vpshrdvq-2.c: Ditto.
	* gcc.target/i386/avx512vl-vpshrdvw-2.c: Ditto.
	* gcc.target/i386/avx512vl-vpshrdw-2.c: Ditto.
	* gcc.target/i386/avx512vlbw-pr100267-1.c: Ditto.
	* gcc.target/i386/avx512vlbw-pr100267-b-2.c: Ditto.
	* gcc.target/i386/avx512vlbw-pr100267-w-2.c: Ditto.
---
 gcc/common/config/i386/i386-common.cc         |  5 +-
 gcc/config/i386/avx512vbmi2intrin.h           | 18 ++-----
 gcc/config/i386/avx512vbmi2vlintrin.h         | 21 ++------
 gcc/config/i386/i386-builtin.def              | 48 ++++++++---------
 gcc/config/i386/sse.md                        | 51 ++++++++-----------
 .../gcc.target/i386/avx512bw-pr100267-1.c     |  2 +-
 .../gcc.target/i386/avx512bw-pr100267-b-2.c   |  3 +-
 .../gcc.target/i386/avx512bw-pr100267-d-2.c   |  3 +-
 .../gcc.target/i386/avx512bw-pr100267-q-2.c   |  3 +-
 .../gcc.target/i386/avx512bw-pr100267-w-2.c   |  3 +-
 .../gcc.target/i386/avx512f-vpcompressb-1.c   |  2 +-
 .../gcc.target/i386/avx512f-vpcompressb-2.c   |  3 +-
 .../gcc.target/i386/avx512f-vpcompressw-1.c   |  2 +-
 .../gcc.target/i386/avx512f-vpcompressw-2.c   |  3 +-
 .../gcc.target/i386/avx512f-vpexpandb-1.c     |  2 +-
 .../gcc.target/i386/avx512f-vpexpandb-2.c     |  3 +-
 .../gcc.target/i386/avx512f-vpexpandw-1.c     |  2 +-
 .../gcc.target/i386/avx512f-vpexpandw-2.c     |  3 +-
 .../gcc.target/i386/avx512f-vpshld-1.c        |  2 +-
 .../gcc.target/i386/avx512f-vpshldd-2.c       |  3 +-
 .../gcc.target/i386/avx512f-vpshldq-2.c       |  3 +-
 .../gcc.target/i386/avx512f-vpshldv-1.c       |  2 +-
 .../gcc.target/i386/avx512f-vpshldvd-2.c      |  3 +-
 .../gcc.target/i386/avx512f-vpshldvq-2.c      |  3 +-
 .../gcc.target/i386/avx512f-vpshldvw-2.c      |  3 +-
 .../gcc.target/i386/avx512f-vpshrdd-2.c       |  3 +-
 .../gcc.target/i386/avx512f-vpshrdq-2.c       |  3 +-
 .../gcc.target/i386/avx512f-vpshrdv-1.c       |  2 +-
 .../gcc.target/i386/avx512f-vpshrdvd-2.c      |  3 +-
 .../gcc.target/i386/avx512f-vpshrdvq-2.c      |  3 +-
 .../gcc.target/i386/avx512f-vpshrdvw-2.c      |  3 +-
 .../gcc.target/i386/avx512f-vpshrdw-2.c       |  3 +-
 .../gcc.target/i386/avx512vbmi2-vpshld-1.c    |  2 +-
 .../gcc.target/i386/avx512vbmi2-vpshrd-1.c    |  2 +-
 .../gcc.target/i386/avx512vl-vpcompressb-1.c  |  2 +-
 .../gcc.target/i386/avx512vl-vpcompressb-2.c  |  2 +-
 .../gcc.target/i386/avx512vl-vpcompressw-2.c  |  2 +-
 .../gcc.target/i386/avx512vl-vpexpandb-1.c    |  2 +-
 .../gcc.target/i386/avx512vl-vpexpandb-2.c    |  2 +-
 .../gcc.target/i386/avx512vl-vpexpandw-1.c    |  2 +-
 .../gcc.target/i386/avx512vl-vpexpandw-2.c    |  2 +-
 .../gcc.target/i386/avx512vl-vpshldd-2.c      |  2 +-
 .../gcc.target/i386/avx512vl-vpshldq-2.c      |  2 +-
 .../gcc.target/i386/avx512vl-vpshldv-1.c      |  2 +-
 .../gcc.target/i386/avx512vl-vpshldvd-2.c     |  2 +-
 .../gcc.target/i386/avx512vl-vpshldvq-2.c     |  2 +-
 .../gcc.target/i386/avx512vl-vpshldvw-2.c     |  2 +-
 .../gcc.target/i386/avx512vl-vpshrdd-2.c      |  2 +-
 .../gcc.target/i386/avx512vl-vpshrdq-2.c      |  2 +-
 .../gcc.target/i386/avx512vl-vpshrdv-1.c      |  2 +-
 .../gcc.target/i386/avx512vl-vpshrdvd-2.c     |  2 +-
 .../gcc.target/i386/avx512vl-vpshrdvq-2.c     |  2 +-
 .../gcc.target/i386/avx512vl-vpshrdvw-2.c     |  2 +-
 .../gcc.target/i386/avx512vl-vpshrdw-2.c      |  2 +-
 .../gcc.target/i386/avx512vlbw-pr100267-1.c   |  2 +-
 .../gcc.target/i386/avx512vlbw-pr100267-b-2.c |  2 +-
 .../gcc.target/i386/avx512vlbw-pr100267-w-2.c |  2 +-
 57 files changed, 106 insertions(+), 160 deletions(-)

diff --git a/gcc/common/config/i386/i386-common.cc b/gcc/common/config/i386/i386-common.cc
index f78fc0a60e2..315db854862 100644
--- a/gcc/common/config/i386/i386-common.cc
+++ b/gcc/common/config/i386/i386-common.cc
@@ -82,7 +82,7 @@ along with GCC; see the file COPYING3.  If not see
 #define OPTION_MASK_ISA2_AVX5124FMAPS_SET OPTION_MASK_ISA2_AVX5124FMAPS
 #define OPTION_MASK_ISA2_AVX5124VNNIW_SET OPTION_MASK_ISA2_AVX5124VNNIW
 #define OPTION_MASK_ISA_AVX512VBMI2_SET \
-  (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512F_SET)
+  (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512BW_SET)
 #define OPTION_MASK_ISA_AVX512FP16_SET OPTION_MASK_ISA_AVX512BW_SET
 #define OPTION_MASK_ISA2_AVX512FP16_SET OPTION_MASK_ISA2_AVX512FP16
 #define OPTION_MASK_ISA_AVX512VNNI_SET \
@@ -232,7 +232,6 @@ along with GCC; see the file COPYING3.  If not see
    | OPTION_MASK_ISA_AVX512PF_UNSET | OPTION_MASK_ISA_AVX512ER_UNSET \
    | OPTION_MASK_ISA_AVX512DQ_UNSET | OPTION_MASK_ISA_AVX512BW_UNSET \
    | OPTION_MASK_ISA_AVX512VL_UNSET | OPTION_MASK_ISA_AVX512IFMA_UNSET \
-   | OPTION_MASK_ISA_AVX512VBMI2_UNSET \
    | OPTION_MASK_ISA_AVX512VNNI_UNSET \
    | OPTION_MASK_ISA_AVX512VPOPCNTDQ_UNSET)
 #define OPTION_MASK_ISA_AVX512CD_UNSET OPTION_MASK_ISA_AVX512CD
@@ -241,7 +240,7 @@ along with GCC; see the file COPYING3.  If not see
 #define OPTION_MASK_ISA_AVX512DQ_UNSET OPTION_MASK_ISA_AVX512DQ
 #define OPTION_MASK_ISA_AVX512BW_UNSET \
   (OPTION_MASK_ISA_AVX512BW | OPTION_MASK_ISA_AVX512VBMI_UNSET \
-   | OPTION_MASK_ISA_AVX512BITALG_UNSET)
+   | OPTION_MASK_ISA_AVX512VBMI2_UNSET | OPTION_MASK_ISA_AVX512BITALG_UNSET)
 #define OPTION_MASK_ISA_AVX512VL_UNSET OPTION_MASK_ISA_AVX512VL
 #define OPTION_MASK_ISA_AVX512IFMA_UNSET OPTION_MASK_ISA_AVX512IFMA
 #define OPTION_MASK_ISA2_AVXIFMA_UNSET OPTION_MASK_ISA2_AVXIFMA
diff --git a/gcc/config/i386/avx512vbmi2intrin.h b/gcc/config/i386/avx512vbmi2intrin.h
index 528d1935296..ca00f8a5f14 100644
--- a/gcc/config/i386/avx512vbmi2intrin.h
+++ b/gcc/config/i386/avx512vbmi2intrin.h
@@ -326,18 +326,6 @@ _mm512_maskz_shldv_epi64 (__mmask8 __A, __m512i __B, __m512i __C, __m512i __D)
 						(__v8di) __D, (__mmask8)__A);
 }
 
-#ifdef __DISABLE_AVX512VBMI2__
-#undef __DISABLE_AVX512VBMI2__
-
-#pragma GCC pop_options
-#endif /* __DISABLE_AVX512VBMI2__ */
-
-#if !defined(__AVX512VBMI2__) || !defined(__AVX512BW__)
-#pragma GCC push_options
-#pragma GCC target("avx512vbmi2,avx512bw")
-#define __DISABLE_AVX512VBMI2BW__
-#endif /* __AVX512VBMI2BW__ */
-
 extern __inline __m512i
 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
 _mm512_mask_compress_epi8 (__m512i __A, __mmask64 __B, __m512i __C)
@@ -548,10 +536,10 @@ _mm512_maskz_shldv_epi16 (__mmask32 __A, __m512i __B, __m512i __C, __m512i __D)
 				(__v32hi) __C, (__v32hi) __D, (__mmask32)__A);
 }
 
-#ifdef __DISABLE_AVX512VBMI2BW__
-#undef __DISABLE_AVX512VBMI2BW__
+#ifdef __DISABLE_AVX512VBMI2__
+#undef __DISABLE_AVX512VBMI2__
 
 #pragma GCC pop_options
-#endif /* __DISABLE_AVX512VBMI2BW__ */
+#endif /* __DISABLE_AVX512VBMI2__ */
 
 #endif /* __AVX512VBMI2INTRIN_H_INCLUDED */
diff --git a/gcc/config/i386/avx512vbmi2vlintrin.h b/gcc/config/i386/avx512vbmi2vlintrin.h
index 86efca2b227..92cae8cf02b 100644
--- a/gcc/config/i386/avx512vbmi2vlintrin.h
+++ b/gcc/config/i386/avx512vbmi2vlintrin.h
@@ -957,21 +957,6 @@ _mm_maskz_shldv_epi64 (__mmask8 __A, __m128i __B, __m128i __C, __m128i __D)
 						(__v2di) __D, (__mmask8)__A);
 }
 
-
-
-
-#ifdef __DISABLE_AVX512VBMI2VL__
-#undef __DISABLE_AVX512VBMI2VL__
-#pragma GCC pop_options
-#endif /* __DISABLE_AVX512VBMIVL__ */
-
-#if !defined(__AVX512VL__) || !defined(__AVX512VBMI2__) || \
-    !defined(__AVX512BW__)
-#pragma GCC push_options
-#pragma GCC target("avx512vbmi2,avx512vl,avx512bw")
-#define __DISABLE_AVX512VBMI2VLBW__
-#endif /* __AVX512VBMIVLBW__ */
-
 extern __inline __m256i
 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
 _mm256_mask_compress_epi8 (__m256i __A, __mmask32 __B, __m256i __C)
@@ -1029,9 +1014,9 @@ _mm256_maskz_expandloadu_epi8 (__mmask32 __A, const void * __B)
 			(__v32qi) _mm256_setzero_si256 (), (__mmask32) __A);
 }
 
-#ifdef __DISABLE_AVX512VBMI2VLBW__
-#undef __DISABLE_AVX512VBMI2VLBW__
+#ifdef __DISABLE_AVX512VBMI2VL__
+#undef __DISABLE_AVX512VBMI2VL__
 #pragma GCC pop_options
-#endif /* __DISABLE_AVX512VBMIVLBW__ */
+#endif /* __DISABLE_AVX512VBMIVL__ */
 
 #endif /* _AVX512VBMIVLINTRIN_H_INCLUDED */
diff --git a/gcc/config/i386/i386-builtin.def b/gcc/config/i386/i386-builtin.def
index c4167307992..1429414072a 100644
--- a/gcc/config/i386/i386-builtin.def
+++ b/gcc/config/i386/i386-builtin.def
@@ -430,20 +430,20 @@ BDESC (OPTION_MASK_ISA_PKU, 0, CODE_FOR_rdpkru,  "__builtin_ia32_rdpkru", IX86_B
 BDESC (OPTION_MASK_ISA_PKU, 0, CODE_FOR_wrpkru,  "__builtin_ia32_wrpkru", IX86_BUILTIN_WRPKRU, UNKNOWN, (int) VOID_FTYPE_UNSIGNED)
 
 /* VBMI2 */
-BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_compressstorev64qi_mask, "__builtin_ia32_compressstoreuqi512_mask", IX86_BUILTIN_PCOMPRESSBSTORE512, UNKNOWN, (int) VOID_FTYPE_PV64QI_V64QI_UDI)
-BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_compressstorev32hi_mask, "__builtin_ia32_compressstoreuhi512_mask", IX86_BUILTIN_PCOMPRESSWSTORE512, UNKNOWN, (int) VOID_FTYPE_PV32HI_V32HI_USI)
-BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL | OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_compressstorev32qi_mask, "__builtin_ia32_compressstoreuqi256_mask", IX86_BUILTIN_PCOMPRESSBSTORE256, UNKNOWN, (int) VOID_FTYPE_PV32QI_V32QI_USI)
+BDESC (OPTION_MASK_ISA_AVX512VBMI2, 0, CODE_FOR_compressstorev64qi_mask, "__builtin_ia32_compressstoreuqi512_mask", IX86_BUILTIN_PCOMPRESSBSTORE512, UNKNOWN, (int) VOID_FTYPE_PV64QI_V64QI_UDI)
+BDESC (OPTION_MASK_ISA_AVX512VBMI2, 0, CODE_FOR_compressstorev32hi_mask, "__builtin_ia32_compressstoreuhi512_mask", IX86_BUILTIN_PCOMPRESSWSTORE512, UNKNOWN, (int) VOID_FTYPE_PV32HI_V32HI_USI)
+BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_compressstorev32qi_mask, "__builtin_ia32_compressstoreuqi256_mask", IX86_BUILTIN_PCOMPRESSBSTORE256, UNKNOWN, (int) VOID_FTYPE_PV32QI_V32QI_USI)
 BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_compressstorev16qi_mask, "__builtin_ia32_compressstoreuqi128_mask", IX86_BUILTIN_PCOMPRESSBSTORE128, UNKNOWN, (int) VOID_FTYPE_PV16QI_V16QI_UHI)
 BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_compressstorev16hi_mask, "__builtin_ia32_compressstoreuhi256_mask", IX86_BUILTIN_PCOMPRESSWSTORE256, UNKNOWN, (int) VOID_FTYPE_PV16HI_V16HI_UHI)
 BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_compressstorev8hi_mask, "__builtin_ia32_compressstoreuhi128_mask", IX86_BUILTIN_PCOMPRESSWSTORE128, UNKNOWN, (int) VOID_FTYPE_PV8HI_V8HI_UQI)
 
-BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_expandv64qi_mask, "__builtin_ia32_expandloadqi512_mask", IX86_BUILTIN_PEXPANDBLOAD512, UNKNOWN, (int) V64QI_FTYPE_PCV64QI_V64QI_UDI)
-BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_expandv64qi_maskz, "__builtin_ia32_expandloadqi512_maskz", IX86_BUILTIN_PEXPANDBLOAD512Z, UNKNOWN, (int) V64QI_FTYPE_PCV64QI_V64QI_UDI)
-BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_expandv32hi_mask, "__builtin_ia32_expandloadhi512_mask", IX86_BUILTIN_PEXPANDWLOAD512, UNKNOWN, (int) V32HI_FTYPE_PCV32HI_V32HI_USI)
-BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_expandv32hi_maskz, "__builtin_ia32_expandloadhi512_maskz", IX86_BUILTIN_PEXPANDWLOAD512Z, UNKNOWN, (int) V32HI_FTYPE_PCV32HI_V32HI_USI)
+BDESC (OPTION_MASK_ISA_AVX512VBMI2, 0, CODE_FOR_expandv64qi_mask, "__builtin_ia32_expandloadqi512_mask", IX86_BUILTIN_PEXPANDBLOAD512, UNKNOWN, (int) V64QI_FTYPE_PCV64QI_V64QI_UDI)
+BDESC (OPTION_MASK_ISA_AVX512VBMI2, 0, CODE_FOR_expandv64qi_maskz, "__builtin_ia32_expandloadqi512_maskz", IX86_BUILTIN_PEXPANDBLOAD512Z, UNKNOWN, (int) V64QI_FTYPE_PCV64QI_V64QI_UDI)
+BDESC (OPTION_MASK_ISA_AVX512VBMI2, 0, CODE_FOR_expandv32hi_mask, "__builtin_ia32_expandloadhi512_mask", IX86_BUILTIN_PEXPANDWLOAD512, UNKNOWN, (int) V32HI_FTYPE_PCV32HI_V32HI_USI)
+BDESC (OPTION_MASK_ISA_AVX512VBMI2, 0, CODE_FOR_expandv32hi_maskz, "__builtin_ia32_expandloadhi512_maskz", IX86_BUILTIN_PEXPANDWLOAD512Z, UNKNOWN, (int) V32HI_FTYPE_PCV32HI_V32HI_USI)
 
-BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL | OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_expandv32qi_mask, "__builtin_ia32_expandloadqi256_mask", IX86_BUILTIN_PEXPANDBLOAD256, UNKNOWN, (int) V32QI_FTYPE_PCV32QI_V32QI_USI)
-BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL | OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_expandv32qi_maskz, "__builtin_ia32_expandloadqi256_maskz", IX86_BUILTIN_PEXPANDBLOAD256Z, UNKNOWN, (int) V32QI_FTYPE_PCV32QI_V32QI_USI)
+BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_expandv32qi_mask, "__builtin_ia32_expandloadqi256_mask", IX86_BUILTIN_PEXPANDBLOAD256, UNKNOWN, (int) V32QI_FTYPE_PCV32QI_V32QI_USI)
+BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_expandv32qi_maskz, "__builtin_ia32_expandloadqi256_maskz", IX86_BUILTIN_PEXPANDBLOAD256Z, UNKNOWN, (int) V32QI_FTYPE_PCV32QI_V32QI_USI)
 BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_expandv16hi_mask, "__builtin_ia32_expandloadhi256_mask", IX86_BUILTIN_PEXPANDWLOAD256, UNKNOWN, (int) V16HI_FTYPE_PCV16HI_V16HI_UHI)
 BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_expandv16hi_maskz, "__builtin_ia32_expandloadhi256_maskz", IX86_BUILTIN_PEXPANDWLOAD256Z, UNKNOWN, (int) V16HI_FTYPE_PCV16HI_V16HI_UHI)
 
@@ -2553,18 +2553,18 @@ BDESC (OPTION_MASK_ISA_AVX512VBMI | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_avx512
 BDESC (OPTION_MASK_ISA_AVX512VBMI | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_avx512vl_vpermi2varv16qi3_mask, "__builtin_ia32_vpermi2varqi128_mask", IX86_BUILTIN_VPERMI2VARQI128, UNKNOWN, (int) V16QI_FTYPE_V16QI_V16QI_V16QI_UHI)
 
 /* VBMI2 */
-BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_compressv64qi_mask, "__builtin_ia32_compressqi512_mask", IX86_BUILTIN_PCOMPRESSB512, UNKNOWN, (int) V64QI_FTYPE_V64QI_V64QI_UDI)
-BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_compressv32hi_mask, "__builtin_ia32_compresshi512_mask", IX86_BUILTIN_PCOMPRESSW512, UNKNOWN, (int) V32HI_FTYPE_V32HI_V32HI_USI)
-BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL | OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_compressv32qi_mask, "__builtin_ia32_compressqi256_mask", IX86_BUILTIN_PCOMPRESSB256, UNKNOWN, (int) V32QI_FTYPE_V32QI_V32QI_USI)
+BDESC (OPTION_MASK_ISA_AVX512VBMI2, 0, CODE_FOR_compressv64qi_mask, "__builtin_ia32_compressqi512_mask", IX86_BUILTIN_PCOMPRESSB512, UNKNOWN, (int) V64QI_FTYPE_V64QI_V64QI_UDI)
+BDESC (OPTION_MASK_ISA_AVX512VBMI2, 0, CODE_FOR_compressv32hi_mask, "__builtin_ia32_compresshi512_mask", IX86_BUILTIN_PCOMPRESSW512, UNKNOWN, (int) V32HI_FTYPE_V32HI_V32HI_USI)
+BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_compressv32qi_mask, "__builtin_ia32_compressqi256_mask", IX86_BUILTIN_PCOMPRESSB256, UNKNOWN, (int) V32QI_FTYPE_V32QI_V32QI_USI)
 BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_compressv16qi_mask, "__builtin_ia32_compressqi128_mask", IX86_BUILTIN_PCOMPRESSB128, UNKNOWN, (int) V16QI_FTYPE_V16QI_V16QI_UHI)
 BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_compressv16hi_mask, "__builtin_ia32_compresshi256_mask", IX86_BUILTIN_PCOMPRESSW256, UNKNOWN, (int) V16HI_FTYPE_V16HI_V16HI_UHI)
 BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_compressv8hi_mask, "__builtin_ia32_compresshi128_mask", IX86_BUILTIN_PCOMPRESSW128, UNKNOWN, (int) V8HI_FTYPE_V8HI_V8HI_UQI)
-BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_expandv64qi_mask, "__builtin_ia32_expandqi512_mask", IX86_BUILTIN_PEXPANDB512, UNKNOWN, (int) V64QI_FTYPE_V64QI_V64QI_UDI)
-BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_expandv64qi_maskz, "__builtin_ia32_expandqi512_maskz", IX86_BUILTIN_PEXPANDB512Z, UNKNOWN, (int) V64QI_FTYPE_V64QI_V64QI_UDI)
-BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_expandv32hi_mask, "__builtin_ia32_expandhi512_mask", IX86_BUILTIN_PEXPANDW512, UNKNOWN, (int) V32HI_FTYPE_V32HI_V32HI_USI)
-BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_expandv32hi_maskz, "__builtin_ia32_expandhi512_maskz", IX86_BUILTIN_PEXPANDW512Z, UNKNOWN, (int) V32HI_FTYPE_V32HI_V32HI_USI)
-BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL | OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_expandv32qi_mask, "__builtin_ia32_expandqi256_mask", IX86_BUILTIN_PEXPANDB256, UNKNOWN, (int) V32QI_FTYPE_V32QI_V32QI_USI)
-BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL | OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_expandv32qi_maskz, "__builtin_ia32_expandqi256_maskz", IX86_BUILTIN_PEXPANDB256Z, UNKNOWN, (int) V32QI_FTYPE_V32QI_V32QI_USI)
+BDESC (OPTION_MASK_ISA_AVX512VBMI2, 0, CODE_FOR_expandv64qi_mask, "__builtin_ia32_expandqi512_mask", IX86_BUILTIN_PEXPANDB512, UNKNOWN, (int) V64QI_FTYPE_V64QI_V64QI_UDI)
+BDESC (OPTION_MASK_ISA_AVX512VBMI2, 0, CODE_FOR_expandv64qi_maskz, "__builtin_ia32_expandqi512_maskz", IX86_BUILTIN_PEXPANDB512Z, UNKNOWN, (int) V64QI_FTYPE_V64QI_V64QI_UDI)
+BDESC (OPTION_MASK_ISA_AVX512VBMI2, 0, CODE_FOR_expandv32hi_mask, "__builtin_ia32_expandhi512_mask", IX86_BUILTIN_PEXPANDW512, UNKNOWN, (int) V32HI_FTYPE_V32HI_V32HI_USI)
+BDESC (OPTION_MASK_ISA_AVX512VBMI2, 0, CODE_FOR_expandv32hi_maskz, "__builtin_ia32_expandhi512_maskz", IX86_BUILTIN_PEXPANDW512Z, UNKNOWN, (int) V32HI_FTYPE_V32HI_V32HI_USI)
+BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_expandv32qi_mask, "__builtin_ia32_expandqi256_mask", IX86_BUILTIN_PEXPANDB256, UNKNOWN, (int) V32QI_FTYPE_V32QI_V32QI_USI)
+BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_expandv32qi_maskz, "__builtin_ia32_expandqi256_maskz", IX86_BUILTIN_PEXPANDB256Z, UNKNOWN, (int) V32QI_FTYPE_V32QI_V32QI_USI)
 BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_expandv16qi_mask, "__builtin_ia32_expandqi128_mask", IX86_BUILTIN_PEXPANDB128, UNKNOWN, (int) V16QI_FTYPE_V16QI_V16QI_UHI)
 BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_expandv16qi_maskz, "__builtin_ia32_expandqi128_maskz", IX86_BUILTIN_PEXPANDB128Z, UNKNOWN, (int) V16QI_FTYPE_V16QI_V16QI_UHI)
 BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_expandv16hi_mask, "__builtin_ia32_expandhi256_mask", IX86_BUILTIN_PEXPANDW256, UNKNOWN, (int) V16HI_FTYPE_V16HI_V16HI_UHI)
@@ -2572,7 +2572,7 @@ BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_expan
 BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_expandv8hi_mask, "__builtin_ia32_expandhi128_mask", IX86_BUILTIN_PEXPANDW128, UNKNOWN, (int) V8HI_FTYPE_V8HI_V8HI_UQI)
 BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_expandv8hi_maskz, "__builtin_ia32_expandhi128_maskz", IX86_BUILTIN_PEXPANDW128Z, UNKNOWN, (int) V8HI_FTYPE_V8HI_V8HI_UQI)
 BDESC (OPTION_MASK_ISA_AVX512VBMI2, 0, CODE_FOR_vpshrd_v32hi, "__builtin_ia32_vpshrd_v32hi", IX86_BUILTIN_VPSHRDV32HI, UNKNOWN, (int) V32HI_FTYPE_V32HI_V32HI_INT)
-BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_vpshrd_v32hi_mask, "__builtin_ia32_vpshrd_v32hi_mask", IX86_BUILTIN_VPSHRDV32HI_MASK, UNKNOWN, (int) V32HI_FTYPE_V32HI_V32HI_INT_V32HI_INT)
+BDESC (OPTION_MASK_ISA_AVX512VBMI2, 0, CODE_FOR_vpshrd_v32hi_mask, "__builtin_ia32_vpshrd_v32hi_mask", IX86_BUILTIN_VPSHRDV32HI_MASK, UNKNOWN, (int) V32HI_FTYPE_V32HI_V32HI_INT_V32HI_INT)
 BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshrd_v16hi, "__builtin_ia32_vpshrd_v16hi", IX86_BUILTIN_VPSHRDV16HI, UNKNOWN, (int) V16HI_FTYPE_V16HI_V16HI_INT)
 BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshrd_v16hi_mask, "__builtin_ia32_vpshrd_v16hi_mask", IX86_BUILTIN_VPSHRDV16HI_MASK, UNKNOWN, (int) V16HI_FTYPE_V16HI_V16HI_INT_V16HI_INT)
 BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshrd_v8hi, "__builtin_ia32_vpshrd_v8hi", IX86_BUILTIN_VPSHRDV8HI, UNKNOWN, (int) V8HI_FTYPE_V8HI_V8HI_INT)
@@ -2590,7 +2590,7 @@ BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshr
 BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshrd_v2di, "__builtin_ia32_vpshrd_v2di", IX86_BUILTIN_VPSHRDV2DI, UNKNOWN, (int) V2DI_FTYPE_V2DI_V2DI_INT)
 BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshrd_v2di_mask, "__builtin_ia32_vpshrd_v2di_mask", IX86_BUILTIN_VPSHRDV2DI_MASK, UNKNOWN, (int) V2DI_FTYPE_V2DI_V2DI_INT_V2DI_INT)
 BDESC (OPTION_MASK_ISA_AVX512VBMI2, 0, CODE_FOR_vpshld_v32hi, "__builtin_ia32_vpshld_v32hi", IX86_BUILTIN_VPSHLDV32HI, UNKNOWN, (int) V32HI_FTYPE_V32HI_V32HI_INT)
-BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_vpshld_v32hi_mask, "__builtin_ia32_vpshld_v32hi_mask", IX86_BUILTIN_VPSHLDV32HI_MASK, UNKNOWN, (int) V32HI_FTYPE_V32HI_V32HI_INT_V32HI_INT)
+BDESC (OPTION_MASK_ISA_AVX512VBMI2, 0, CODE_FOR_vpshld_v32hi_mask, "__builtin_ia32_vpshld_v32hi_mask", IX86_BUILTIN_VPSHLDV32HI_MASK, UNKNOWN, (int) V32HI_FTYPE_V32HI_V32HI_INT_V32HI_INT)
 BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshld_v16hi, "__builtin_ia32_vpshld_v16hi", IX86_BUILTIN_VPSHLDV16HI, UNKNOWN, (int) V16HI_FTYPE_V16HI_V16HI_INT)
 BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshld_v16hi_mask, "__builtin_ia32_vpshld_v16hi_mask", IX86_BUILTIN_VPSHLDV16HI_MASK, UNKNOWN, (int) V16HI_FTYPE_V16HI_V16HI_INT_V16HI_INT)
 BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshld_v8hi, "__builtin_ia32_vpshld_v8hi", IX86_BUILTIN_VPSHLDV8HI, UNKNOWN, (int) V8HI_FTYPE_V8HI_V8HI_INT)
@@ -2609,8 +2609,8 @@ BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshl
 BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshld_v2di_mask, "__builtin_ia32_vpshld_v2di_mask", IX86_BUILTIN_VPSHLDV2DI_MASK, UNKNOWN, (int) V2DI_FTYPE_V2DI_V2DI_INT_V2DI_INT)
 
 BDESC (OPTION_MASK_ISA_AVX512VBMI2, 0, CODE_FOR_vpshrdv_v32hi, "__builtin_ia32_vpshrdv_v32hi", IX86_BUILTIN_VPSHRDVV32HI, UNKNOWN, (int) V32HI_FTYPE_V32HI_V32HI_V32HI)
-BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_vpshrdv_v32hi_mask, "__builtin_ia32_vpshrdv_v32hi_mask", IX86_BUILTIN_VPSHRDVV32HI_MASK, UNKNOWN, (int) V32HI_FTYPE_V32HI_V32HI_V32HI_USI)
-BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_vpshrdv_v32hi_maskz, "__builtin_ia32_vpshrdv_v32hi_maskz", IX86_BUILTIN_VPSHRDVV32HI_MASKZ, UNKNOWN, (int) V32HI_FTYPE_V32HI_V32HI_V32HI_USI)
+BDESC (OPTION_MASK_ISA_AVX512VBMI2, 0, CODE_FOR_vpshrdv_v32hi_mask, "__builtin_ia32_vpshrdv_v32hi_mask", IX86_BUILTIN_VPSHRDVV32HI_MASK, UNKNOWN, (int) V32HI_FTYPE_V32HI_V32HI_V32HI_USI)
+BDESC (OPTION_MASK_ISA_AVX512VBMI2, 0, CODE_FOR_vpshrdv_v32hi_maskz, "__builtin_ia32_vpshrdv_v32hi_maskz", IX86_BUILTIN_VPSHRDVV32HI_MASKZ, UNKNOWN, (int) V32HI_FTYPE_V32HI_V32HI_V32HI_USI)
 BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshrdv_v16hi, "__builtin_ia32_vpshrdv_v16hi", IX86_BUILTIN_VPSHRDVV16HI, UNKNOWN, (int) V16HI_FTYPE_V16HI_V16HI_V16HI)
 BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshrdv_v16hi_mask, "__builtin_ia32_vpshrdv_v16hi_mask", IX86_BUILTIN_VPSHRDVV16HI_MASK, UNKNOWN, (int) V16HI_FTYPE_V16HI_V16HI_V16HI_UHI)
 BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshrdv_v16hi_maskz, "__builtin_ia32_vpshrdv_v16hi_maskz", IX86_BUILTIN_VPSHRDVV16HI_MASKZ, UNKNOWN, (int) V16HI_FTYPE_V16HI_V16HI_V16HI_UHI)
@@ -2637,8 +2637,8 @@ BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshr
 BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshrdv_v2di_maskz, "__builtin_ia32_vpshrdv_v2di_maskz", IX86_BUILTIN_VPSHRDVV2DI_MASKZ, UNKNOWN, (int) V2DI_FTYPE_V2DI_V2DI_V2DI_UQI)
 
 BDESC (OPTION_MASK_ISA_AVX512VBMI2, 0, CODE_FOR_vpshldv_v32hi, "__builtin_ia32_vpshldv_v32hi", IX86_BUILTIN_VPSHLDVV32HI, UNKNOWN, (int) V32HI_FTYPE_V32HI_V32HI_V32HI)
-BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_vpshldv_v32hi_mask, "__builtin_ia32_vpshldv_v32hi_mask", IX86_BUILTIN_VPSHLDVV32HI_MASK, UNKNOWN, (int) V32HI_FTYPE_V32HI_V32HI_V32HI_USI)
-BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_vpshldv_v32hi_maskz, "__builtin_ia32_vpshldv_v32hi_maskz", IX86_BUILTIN_VPSHLDVV32HI_MASKZ, UNKNOWN, (int) V32HI_FTYPE_V32HI_V32HI_V32HI_USI)
+BDESC (OPTION_MASK_ISA_AVX512VBMI2, 0, CODE_FOR_vpshldv_v32hi_mask, "__builtin_ia32_vpshldv_v32hi_mask", IX86_BUILTIN_VPSHLDVV32HI_MASK, UNKNOWN, (int) V32HI_FTYPE_V32HI_V32HI_V32HI_USI)
+BDESC (OPTION_MASK_ISA_AVX512VBMI2, 0, CODE_FOR_vpshldv_v32hi_maskz, "__builtin_ia32_vpshldv_v32hi_maskz", IX86_BUILTIN_VPSHLDVV32HI_MASKZ, UNKNOWN, (int) V32HI_FTYPE_V32HI_V32HI_V32HI_USI)
 BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshldv_v16hi, "__builtin_ia32_vpshldv_v16hi", IX86_BUILTIN_VPSHLDVV16HI, UNKNOWN, (int) V16HI_FTYPE_V16HI_V16HI_V16HI)
 BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshldv_v16hi_mask, "__builtin_ia32_vpshldv_v16hi_mask", IX86_BUILTIN_VPSHLDVV16HI_MASK, UNKNOWN, (int) V16HI_FTYPE_V16HI_V16HI_V16HI_UHI)
 BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshldv_v16hi_maskz, "__builtin_ia32_vpshldv_v16hi_maskz", IX86_BUILTIN_VPSHLDVV16HI_MASKZ, UNKNOWN, (int) V16HI_FTYPE_V16HI_V16HI_V16HI_UHI)
diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
index deb2d747ec1..3bb78b26758 100644
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -275,12 +275,6 @@
    V32HF (V16HF "TARGET_AVX512VL") (V8HF "TARGET_AVX512VL")
    V32BF (V16BF "TARGET_AVX512VL") (V8BF "TARGET_AVX512VL")])
 
-;; Same iterator, but without supposed TARGET_AVX512BW
-(define_mode_iterator VI12_AVX512VLBW
-  [(V64QI "TARGET_AVX512BW") (V16QI "TARGET_AVX512VL")
-   (V32QI "TARGET_AVX512VL && TARGET_AVX512BW") (V32HI "TARGET_AVX512BW")
-   (V16HI "TARGET_AVX512VL") (V8HI "TARGET_AVX512VL")])
-
 (define_mode_iterator VI1_AVX512VL
   [V64QI (V16QI "TARGET_AVX512VL") (V32QI "TARGET_AVX512VL")])
 
@@ -863,16 +857,15 @@
    (V4DI "TARGET_AVX512VL") (V4DF "TARGET_AVX512VL")
    (V4SI "TARGET_AVX512VL") (V4SF "TARGET_AVX512VL")
    (V2DI "TARGET_AVX512VL") (V2DF "TARGET_AVX512VL")])
-(define_mode_iterator VI12_VI48F_AVX512VLBW
+(define_mode_iterator VI12_VI48F_AVX512VL
   [(V16SI "TARGET_AVX512F") (V16SF "TARGET_AVX512F")
    (V8DI "TARGET_AVX512F") (V8DF "TARGET_AVX512F")
    (V8SI "TARGET_AVX512VL") (V8SF "TARGET_AVX512VL")
    (V4DI "TARGET_AVX512VL") (V4DF "TARGET_AVX512VL")
    (V4SI "TARGET_AVX512VL") (V4SF "TARGET_AVX512VL")
    (V2DI "TARGET_AVX512VL") (V2DF "TARGET_AVX512VL")
-   (V64QI "TARGET_AVX512BW") (V16QI "TARGET_AVX512VL")
-   (V32QI "TARGET_AVX512VL && TARGET_AVX512BW") (V32HI "TARGET_AVX512BW")
-   (V16HI "TARGET_AVX512VL") (V8HI "TARGET_AVX512VL")])
+   V64QI (V16QI "TARGET_AVX512VL") (V32QI "TARGET_AVX512VL")
+   V32HI (V16HI "TARGET_AVX512VL") (V8HI "TARGET_AVX512VL")])
 
 (define_mode_iterator VI48F_256 [V8SI V8SF V4DI V4DF])
 
@@ -27453,10 +27446,10 @@
    (set_attr "mode" "<sseinsnmode>")])
 
 (define_insn "compress<mode>_mask"
-  [(set (match_operand:VI12_AVX512VLBW 0 "register_operand" "=v")
-	(unspec:VI12_AVX512VLBW
-	  [(match_operand:VI12_AVX512VLBW 1 "register_operand" "v")
-	   (match_operand:VI12_AVX512VLBW 2 "nonimm_or_0_operand" "0C")
+  [(set (match_operand:VI12_AVX512VL 0 "register_operand" "=v")
+	(unspec:VI12_AVX512VL
+	  [(match_operand:VI12_AVX512VL 1 "register_operand" "v")
+	   (match_operand:VI12_AVX512VL 2 "nonimm_or_0_operand" "0C")
 	   (match_operand:<avx512fmaskmode> 3 "register_operand" "Yk")]
 	  UNSPEC_COMPRESS))]
   "TARGET_AVX512VBMI2"
@@ -27480,9 +27473,9 @@
    (set_attr "mode" "<sseinsnmode>")])
 
 (define_insn "compressstore<mode>_mask"
-  [(set (match_operand:VI12_AVX512VLBW 0 "memory_operand" "=m")
-	(unspec:VI12_AVX512VLBW
-	  [(match_operand:VI12_AVX512VLBW 1 "register_operand" "x")
+  [(set (match_operand:VI12_AVX512VL 0 "memory_operand" "=m")
+	(unspec:VI12_AVX512VL
+	  [(match_operand:VI12_AVX512VL 1 "register_operand" "x")
 	   (match_dup 0)
 	   (match_operand:<avx512fmaskmode> 2 "register_operand" "Yk")]
 	  UNSPEC_COMPRESS_STORE))]
@@ -27518,10 +27511,10 @@
    (set_attr "mode" "<sseinsnmode>")])
 
 (define_insn "expand<mode>_mask"
-  [(set (match_operand:VI12_AVX512VLBW 0 "register_operand" "=v,v")
-	(unspec:VI12_AVX512VLBW
-	  [(match_operand:VI12_AVX512VLBW 1 "nonimmediate_operand" "v,m")
-	   (match_operand:VI12_AVX512VLBW 2 "nonimm_or_0_operand" "0C,0C")
+  [(set (match_operand:VI12_AVX512VL 0 "register_operand" "=v,v")
+	(unspec:VI12_AVX512VL
+	  [(match_operand:VI12_AVX512VL 1 "nonimmediate_operand" "v,m")
+	   (match_operand:VI12_AVX512VL 2 "nonimm_or_0_operand" "0C,0C")
 	   (match_operand:<avx512fmaskmode> 3 "register_operand" "Yk,Yk")]
 	  UNSPEC_EXPAND))]
   "TARGET_AVX512VBMI2"
@@ -27532,10 +27525,10 @@
    (set_attr "mode" "<sseinsnmode>")])
 
 (define_insn_and_split "*expand<mode>_mask"
-  [(set (match_operand:VI12_VI48F_AVX512VLBW 0 "register_operand")
-	(unspec:VI12_VI48F_AVX512VLBW
-	  [(match_operand:VI12_VI48F_AVX512VLBW 1 "nonimmediate_operand")
-	   (match_operand:VI12_VI48F_AVX512VLBW 2 "nonimm_or_0_operand")
+  [(set (match_operand:VI12_VI48F_AVX512VL 0 "register_operand")
+	(unspec:VI12_VI48F_AVX512VL
+	  [(match_operand:VI12_VI48F_AVX512VL 1 "nonimmediate_operand")
+	   (match_operand:VI12_VI48F_AVX512VL 2 "nonimm_or_0_operand")
 	   (match_operand 3 "const_int_operand")]
 	  UNSPEC_EXPAND))]
   "ix86_pre_reload_split ()
@@ -27588,10 +27581,10 @@
 })
 
 (define_expand "expand<mode>_maskz"
-  [(set (match_operand:VI12_AVX512VLBW 0 "register_operand")
-	(unspec:VI12_AVX512VLBW
-	  [(match_operand:VI12_AVX512VLBW 1 "nonimmediate_operand")
-	   (match_operand:VI12_AVX512VLBW 2 "nonimm_or_0_operand")
+  [(set (match_operand:VI12_AVX512VL 0 "register_operand")
+	(unspec:VI12_AVX512VL
+	  [(match_operand:VI12_AVX512VL 1 "nonimmediate_operand")
+	   (match_operand:VI12_AVX512VL 2 "nonimm_or_0_operand")
 	   (match_operand:<avx512fmaskmode> 3 "register_operand")]
 	  UNSPEC_EXPAND))]
   "TARGET_AVX512VBMI2"
diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-pr100267-1.c b/gcc/testsuite/gcc.target/i386/avx512bw-pr100267-1.c
index ce83d63bc73..33af0d92925 100644
--- a/gcc/testsuite/gcc.target/i386/avx512bw-pr100267-1.c
+++ b/gcc/testsuite/gcc.target/i386/avx512bw-pr100267-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-mavx512bw -mavx512vbmi2 -O2" } */
+/* { dg-options "-mavx512vbmi2 -O2" } */
 /* { dg-final { scan-assembler-times "vpexpandb\[ \\t\]+\[^\{\n\]*\\(\[^\n\]*%zmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)"  1 } } */
 /* { dg-final { scan-assembler-times "vpexpandb\[ \\t\]+\[^\{\n\(]*%zmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)"  1 } } */
 /* { dg-final { scan-assembler-times "vpexpandw\[ \\t\]+\[^\{\n\]*\\(\[^\n\]*%zmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)"  1 } } */
diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-pr100267-b-2.c b/gcc/testsuite/gcc.target/i386/avx512bw-pr100267-b-2.c
index 424b485a203..161c2178349 100644
--- a/gcc/testsuite/gcc.target/i386/avx512bw-pr100267-b-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx512bw-pr100267-b-2.c
@@ -1,6 +1,5 @@
 /* { dg-do run } */
-/* { dg-options "-O2 -mavx512f -mavx512vbmi2 -mavx512bw" } */
-/* { dg-require-effective-target avx512f } */
+/* { dg-options "-O2 -mavx512vbmi2" } */
 /* { dg-require-effective-target avx512vbmi2 } */
 
 #define AVX512F
diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-pr100267-d-2.c b/gcc/testsuite/gcc.target/i386/avx512bw-pr100267-d-2.c
index 24790b20cf1..c7416dab97b 100644
--- a/gcc/testsuite/gcc.target/i386/avx512bw-pr100267-d-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx512bw-pr100267-d-2.c
@@ -1,6 +1,5 @@
 /* { dg-do run } */
-/* { dg-options "-O2 -mavx512f -mavx512vbmi2 -mavx512bw" } */
-/* { dg-require-effective-target avx512f } */
+/* { dg-options "-O2 -mavx512vbmi2" } */
 /* { dg-require-effective-target avx512vbmi2 } */
 
 #define AVX512F
diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-pr100267-q-2.c b/gcc/testsuite/gcc.target/i386/avx512bw-pr100267-q-2.c
index 119b50e6f79..797ee902510 100644
--- a/gcc/testsuite/gcc.target/i386/avx512bw-pr100267-q-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx512bw-pr100267-q-2.c
@@ -1,6 +1,5 @@
 /* { dg-do run } */
-/* { dg-options "-O2 -mavx512f -mavx512vbmi2 -mavx512bw" } */
-/* { dg-require-effective-target avx512f } */
+/* { dg-options "-O2 -mavx512vbmi2" } */
 /* { dg-require-effective-target avx512vbmi2 } */
 
 #define AVX512F
diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-pr100267-w-2.c b/gcc/testsuite/gcc.target/i386/avx512bw-pr100267-w-2.c
index 926e04d4df6..94660f26993 100644
--- a/gcc/testsuite/gcc.target/i386/avx512bw-pr100267-w-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx512bw-pr100267-w-2.c
@@ -1,6 +1,5 @@
 /* { dg-do run } */
-/* { dg-options "-O2 -mavx512f -mavx512vbmi2 -mavx512bw" } */
-/* { dg-require-effective-target avx512f } */
+/* { dg-options "-O2 -mavx512vbmi2" } */
 /* { dg-require-effective-target avx512vbmi2 } */
 
 #define AVX512F
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpcompressb-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpcompressb-1.c
index c449d9536b9..0ee8fe472e7 100644
--- a/gcc/testsuite/gcc.target/i386/avx512f-vpcompressb-1.c
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpcompressb-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-mavx512f -mavx512vbmi2 -mavx512bw -O2" } */
+/* { dg-options "-mavx512vbmi2 -O2" } */
 /* { dg-final { scan-assembler-times "vpcompressb\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
 /* { dg-final { scan-assembler-times "vpcompressb\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */
 /* { dg-final { scan-assembler-times "vpcompressb\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\]*\\)\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpcompressb-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpcompressb-2.c
index 4f159630504..773fce21ccf 100644
--- a/gcc/testsuite/gcc.target/i386/avx512f-vpcompressb-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpcompressb-2.c
@@ -1,6 +1,5 @@
 /* { dg-do run } */
-/* { dg-options "-O2 -mavx512f -mavx512bw -mavx512vbmi2" } */
-/* { dg-require-effective-target avx512f } */
+/* { dg-options "-O2 -mavx512vbmi2" } */
 /* { dg-require-effective-target avx512vbmi2 } */
 
 #define AVX512F
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpcompressw-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpcompressw-1.c
index 2da92a4758b..11f4ba44723 100644
--- a/gcc/testsuite/gcc.target/i386/avx512f-vpcompressw-1.c
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpcompressw-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-mavx512f -mavx512vbmi2 -mavx512bw -O2" } */
+/* { dg-options "-mavx512vbmi2 -O2" } */
 /* { dg-final { scan-assembler-times "vpcompressw\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
 /* { dg-final { scan-assembler-times "vpcompressw\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */
 /* { dg-final { scan-assembler-times "vpcompressw\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\]*\\)\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpcompressw-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpcompressw-2.c
index 20da53944fb..45866b6f4b9 100644
--- a/gcc/testsuite/gcc.target/i386/avx512f-vpcompressw-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpcompressw-2.c
@@ -1,6 +1,5 @@
 /* { dg-do run } */
-/* { dg-options "-O2 -mavx512f -mavx512bw -mavx512vbmi2" } */
-/* { dg-require-effective-target avx512f } */
+/* { dg-options "-O2 -mavx512vbmi2" } */
 /* { dg-require-effective-target avx512vbmi2 } */
 
 #define AVX512F
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpexpandb-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpexpandb-1.c
index fb0c58e428f..ed96b539982 100644
--- a/gcc/testsuite/gcc.target/i386/avx512f-vpexpandb-1.c
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpexpandb-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-mavx512vbmi2 -mavx512bw -mavx512f -O2" } */
+/* { dg-options "-mavx512vbmi2 -O2" } */
 /* { dg-final { scan-assembler-times "vpexpandb\[ \\t\]+\[^\{\n\]*\\(\[^\n\]*%zmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)"  1 } } */
 /* { dg-final { scan-assembler-times "vpexpandb\[ \\t\]+\[^\{\n\]*\\(\[^\n\]*%zmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)"  1 } } */
 /* { dg-final { scan-assembler-times "vpexpandb\[ \\t\]+\[^\{\n\(]*%zmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)"  1 } } */
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpexpandb-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpexpandb-2.c
index 0105ddbe20e..88dc48c7aeb 100644
--- a/gcc/testsuite/gcc.target/i386/avx512f-vpexpandb-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpexpandb-2.c
@@ -1,6 +1,5 @@
 /* { dg-do run } */
-/* { dg-options "-O2 -mavx512f -mavx512vbmi2 -mavx512bw" } */
-/* { dg-require-effective-target avx512f } */
+/* { dg-options "-O2 -mavx512vbmi2" } */
 /* { dg-require-effective-target avx512vbmi2 } */
 
 #define AVX512F
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpexpandw-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpexpandw-1.c
index 49d9fb89acf..9f568818493 100644
--- a/gcc/testsuite/gcc.target/i386/avx512f-vpexpandw-1.c
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpexpandw-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-mavx512vbmi2 -mavx512bw -mavx512f -O2" } */
+/* { dg-options "-mavx512vbmi2 -O2" } */
 /* { dg-final { scan-assembler-times "vpexpandw\[ \\t\]+\[^\{\n\]*\\(\[^\n\]*%zmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)"  1 } } */
 /* { dg-final { scan-assembler-times "vpexpandw\[ \\t\]+\[^\{\n\]*\\(\[^\n\]*%zmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)"  1 } } */
 /* { dg-final { scan-assembler-times "vpexpandw\[ \\t\]+\[^\{\n\(]*%zmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)"  1 } } */
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpexpandw-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpexpandw-2.c
index fdad38b6813..5c090a3756d 100644
--- a/gcc/testsuite/gcc.target/i386/avx512f-vpexpandw-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpexpandw-2.c
@@ -1,6 +1,5 @@
 /* { dg-do run } */
-/* { dg-options "-O2 -mavx512f -mavx512vbmi2 -mavx512bw" } */
-/* { dg-require-effective-target avx512f } */
+/* { dg-options "-O2 -mavx512vbmi2" } */
 /* { dg-require-effective-target avx512vbmi2 } */
 
 #define AVX512F
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpshld-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpshld-1.c
index f465ce2d077..f9c250086e4 100644
--- a/gcc/testsuite/gcc.target/i386/avx512f-vpshld-1.c
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpshld-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-mavx512f -mavx512vbmi2 -mavx512bw -O2" } */
+/* { dg-options "-mavx512vbmi2 -O2" } */
 /* { dg-final { scan-assembler-times "vpshldw\[ \\t\]+\[^\{\n\]*\\\$3\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
 /* { dg-final { scan-assembler-times "vpshldw\[ \\t\]+\[^\{\n\]*\\\$3\[^\n\r]*%zmm\[0-9\]+\[^\\n\\r]*%zmm\[0-9\]+\[^\\n\\r\]*%zmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
 /* { dg-final { scan-assembler-times "vpshldw\[ \\t\]+\[^\{\n\]*\\\$3\[^\n\r]*%zmm\[0-9\]+\[^\\n\\r]*%zmm\[0-9\]+\[^\\n\\r\]*%zmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpshldd-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpshldd-2.c
index 5ddf49376ca..4c700f11e68 100644
--- a/gcc/testsuite/gcc.target/i386/avx512f-vpshldd-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpshldd-2.c
@@ -1,6 +1,5 @@
 /* { dg-do run } */
-/* { dg-options "-O2 -mavx512f -mavx512vbmi2 -mavx512bw" } */
-/* { dg-require-effective-target avx512f } */
+/* { dg-options "-O2 -mavx512vbmi2" } */
 /* { dg-require-effective-target avx512vbmi2 } */
 
 #define AVX512F
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpshldq-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpshldq-2.c
index 0377aaa19e8..1d23759428d 100644
--- a/gcc/testsuite/gcc.target/i386/avx512f-vpshldq-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpshldq-2.c
@@ -1,6 +1,5 @@
 /* { dg-do run } */
-/* { dg-options "-O2 -mavx512f -mavx512vbmi2 -mavx512bw" } */
-/* { dg-require-effective-target avx512f } */
+/* { dg-options "-O2 -mavx512vbmi2" } */
 /* { dg-require-effective-target avx512vbmi2 } */
 
 #define AVX512F
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpshldv-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpshldv-1.c
index 3427b046a05..6b1dd1662ee 100644
--- a/gcc/testsuite/gcc.target/i386/avx512f-vpshldv-1.c
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpshldv-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-mavx512f -mavx512vbmi2 -mavx512bw -O2" } */
+/* { dg-options "-mavx512vbmi2 -O2" } */
 /* { dg-final { scan-assembler-times "vpshldvw\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
 /* { dg-final { scan-assembler-times "vpshldvw\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\\n\\r]*%zmm\[0-9\]+\[^\\n\\r\]*%zmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
 /* { dg-final { scan-assembler-times "vpshldvw\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\\n\\r]*%zmm\[0-9\]+\[^\\n\\r\]*%zmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpshldvd-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpshldvd-2.c
index 46370752327..a38869e0654 100644
--- a/gcc/testsuite/gcc.target/i386/avx512f-vpshldvd-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpshldvd-2.c
@@ -1,6 +1,5 @@
 /* { dg-do run } */
-/* { dg-options "-O2 -mavx512f -mavx512vbmi2 -mavx512bw" } */
-/* { dg-require-effective-target avx512f } */
+/* { dg-options "-O2 -mavx512vbmi2" } */
 /* { dg-require-effective-target avx512vbmi2 } */
 
 #define AVX512F
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpshldvq-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpshldvq-2.c
index 4436f012b65..2eeb349f71f 100644
--- a/gcc/testsuite/gcc.target/i386/avx512f-vpshldvq-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpshldvq-2.c
@@ -1,6 +1,5 @@
 /* { dg-do run } */
-/* { dg-options "-O2 -mavx512f -mavx512vbmi2 -mavx512bw" } */
-/* { dg-require-effective-target avx512f } */
+/* { dg-options "-O2 -mavx512vbmi2" } */
 /* { dg-require-effective-target avx512vbmi2 } */
 
 #define AVX512F
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpshldvw-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpshldvw-2.c
index 5473a574146..6a31a4ddf06 100644
--- a/gcc/testsuite/gcc.target/i386/avx512f-vpshldvw-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpshldvw-2.c
@@ -1,6 +1,5 @@
 /* { dg-do run } */
-/* { dg-options "-O2 -mavx512f -mavx512vbmi2 -mavx512bw" } */
-/* { dg-require-effective-target avx512f } */
+/* { dg-options "-O2 -mavx512vbmi2" } */
 /* { dg-require-effective-target avx512vbmi2 } */
 
 #define AVX512F
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpshrdd-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpshrdd-2.c
index 54dd369942b..2c3a42955e1 100644
--- a/gcc/testsuite/gcc.target/i386/avx512f-vpshrdd-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpshrdd-2.c
@@ -1,6 +1,5 @@
 /* { dg-do run } */
-/* { dg-options "-O2 -mavx512f -mavx512vbmi2 -mavx512bw" } */
-/* { dg-require-effective-target avx512f } */
+/* { dg-options "-O2 -mavx512vbmi2" } */
 /* { dg-require-effective-target avx512vbmi2 } */
 
 #define AVX512F
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpshrdq-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpshrdq-2.c
index 4997c70a7b6..89bafc3d8c4 100644
--- a/gcc/testsuite/gcc.target/i386/avx512f-vpshrdq-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpshrdq-2.c
@@ -1,6 +1,5 @@
 /* { dg-do run } */
-/* { dg-options "-O2 -mavx512f -mavx512vbmi2 -mavx512bw" } */
-/* { dg-require-effective-target avx512f } */
+/* { dg-options "-O2 -mavx512vbmi2" } */
 /* { dg-require-effective-target avx512vbmi2 } */
 
 #define AVX512F
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpshrdv-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpshrdv-1.c
index 6dd3f0fa2b7..5e12470f640 100644
--- a/gcc/testsuite/gcc.target/i386/avx512f-vpshrdv-1.c
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpshrdv-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-mavx512f -mavx512vbmi2 -mavx512bw -O2" } */
+/* { dg-options "-mavx512vbmi2 -O2" } */
 /* { dg-final { scan-assembler-times "vpshrdvw\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
 /* { dg-final { scan-assembler-times "vpshrdvw\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\\n\\r]*%zmm\[0-9\]+\[^\\n\\r\]*%zmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
 /* { dg-final { scan-assembler-times "vpshrdvw\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\\n\\r]*%zmm\[0-9\]+\[^\\n\\r\]*%zmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpshrdvd-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpshrdvd-2.c
index 6e08095eade..d2805795a08 100644
--- a/gcc/testsuite/gcc.target/i386/avx512f-vpshrdvd-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpshrdvd-2.c
@@ -1,6 +1,5 @@
 /* { dg-do run } */
-/* { dg-options "-O2 -mavx512f -mavx512bw -mavx512vbmi2" } */
-/* { dg-require-effective-target avx512f } */
+/* { dg-options "-O2 -mavx512vbmi2" } */
 /* { dg-require-effective-target avx512vbmi2 } */
 
 #define AVX512F
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpshrdvq-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpshrdvq-2.c
index 5810fa06e4c..44378a6b35c 100644
--- a/gcc/testsuite/gcc.target/i386/avx512f-vpshrdvq-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpshrdvq-2.c
@@ -1,6 +1,5 @@
 /* { dg-do run } */
-/* { dg-options "-O2 -mavx512f -mavx512bw -mavx512vbmi2" } */
-/* { dg-require-effective-target avx512f } */
+/* { dg-options "-O2 -mavx512vbmi2" } */
 /* { dg-require-effective-target avx512vbmi2 } */
 
 #define AVX512F
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpshrdvw-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpshrdvw-2.c
index 1699c262483..c7131a08444 100644
--- a/gcc/testsuite/gcc.target/i386/avx512f-vpshrdvw-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpshrdvw-2.c
@@ -1,6 +1,5 @@
 /* { dg-do run } */
-/* { dg-options "-O2 -mavx512f -mavx512bw -mavx512vbmi2" } */
-/* { dg-require-effective-target avx512f } */
+/* { dg-options "-O2 -mavx512vbmi2" } */
 /* { dg-require-effective-target avx512vbmi2 } */
 
 #define AVX512F
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpshrdw-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpshrdw-2.c
index 67596eb7613..2dab24518bd 100644
--- a/gcc/testsuite/gcc.target/i386/avx512f-vpshrdw-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpshrdw-2.c
@@ -1,6 +1,5 @@
 /* { dg-do run } */
-/* { dg-options "-O2 -mavx512f -mavx512vbmi2 -mavx512bw" } */
-/* { dg-require-effective-target avx512f } */
+/* { dg-options "-O2 -mavx512vbmi2" } */
 /* { dg-require-effective-target avx512vbmi2 } */
 
 #define AVX512F
diff --git a/gcc/testsuite/gcc.target/i386/avx512vbmi2-vpshld-1.c b/gcc/testsuite/gcc.target/i386/avx512vbmi2-vpshld-1.c
index 0b29923b721..a61ff98ea66 100644
--- a/gcc/testsuite/gcc.target/i386/avx512vbmi2-vpshld-1.c
+++ b/gcc/testsuite/gcc.target/i386/avx512vbmi2-vpshld-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-mavx512vbmi2 -mavx512bw -O2" } */
+/* { dg-options "-mavx512vbmi2 -O2" } */
 /* { dg-final { scan-assembler-times "vpshldw\[ \\t\]+\[^\{\n\]*\\\$3\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
 /* { dg-final { scan-assembler-times "vpshldw\[ \\t\]+\[^\{\n\]*\\\$3\[^\n\r]*%zmm\[0-9\]+\[^\\n\\r]*%zmm\[0-9\]+\[^\\n\\r\]*%zmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
 /* { dg-final { scan-assembler-times "vpshldw\[ \\t\]+\[^\{\n\]*\\\$3\[^\n\r]*%zmm\[0-9\]+\[^\\n\\r]*%zmm\[0-9\]+\[^\\n\\r\]*%zmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */
diff --git a/gcc/testsuite/gcc.target/i386/avx512vbmi2-vpshrd-1.c b/gcc/testsuite/gcc.target/i386/avx512vbmi2-vpshrd-1.c
index bb4de785244..7bf59672dca 100644
--- a/gcc/testsuite/gcc.target/i386/avx512vbmi2-vpshrd-1.c
+++ b/gcc/testsuite/gcc.target/i386/avx512vbmi2-vpshrd-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-mavx512vbmi2 -mavx512bw -O2" } */
+/* { dg-options "-mavx512vbmi2 -O2" } */
 /* { dg-final { scan-assembler-times "vpshrdw\[ \\t\]+\[^\{\n\]*\\\$3\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
 /* { dg-final { scan-assembler-times "vpshrdw\[ \\t\]+\[^\{\n\]*\\\$3\[^\n\r]*%zmm\[0-9\]+\[^\\n\\r]*%zmm\[0-9\]+\[^\\n\\r\]*%zmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
 /* { dg-final { scan-assembler-times "vpshrdw\[ \\t\]+\[^\{\n\]*\\\$3\[^\n\r]*%zmm\[0-9\]+\[^\\n\\r]*%zmm\[0-9\]+\[^\\n\\r\]*%zmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */
diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcompressb-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpcompressb-1.c
index 7e3aef9c782..ce4410ad852 100644
--- a/gcc/testsuite/gcc.target/i386/avx512vl-vpcompressb-1.c
+++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcompressb-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-mavx512vl -mavx512vbmi2 -mavx512bw -O2" } */
+/* { dg-options "-mavx512vl -mavx512vbmi2 -O2" } */
 /* { dg-final { scan-assembler-times "vpcompressb\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
 /* { dg-final { scan-assembler-times "vpcompressb\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
 /* { dg-final { scan-assembler-times "vpcompressb\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */
diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcompressb-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpcompressb-2.c
index e6207721cbd..dc65a21285c 100644
--- a/gcc/testsuite/gcc.target/i386/avx512vl-vpcompressb-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcompressb-2.c
@@ -1,5 +1,5 @@
 /* { dg-do run } */
-/* { dg-options "-O2 -mavx512vl -mavx512bw -mavx512vbmi2" } */
+/* { dg-options "-O2 -mavx512vl -mavx512vbmi2" } */
 /* { dg-require-effective-target avx512vl } */
 /* { dg-require-effective-target avx512vbmi2 } */
 
diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcompressw-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpcompressw-2.c
index 012ac10393d..a56c1b950fe 100644
--- a/gcc/testsuite/gcc.target/i386/avx512vl-vpcompressw-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcompressw-2.c
@@ -1,5 +1,5 @@
 /* { dg-do run } */
-/* { dg-options "-O2 -mavx512vl -mavx512bw -mavx512vbmi2" } */
+/* { dg-options "-O2 -mavx512vl -mavx512vbmi2" } */
 /* { dg-require-effective-target avx512vl } */
 /* { dg-require-effective-target avx512vbmi2 } */
 
diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpexpandb-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpexpandb-1.c
index 96e0d815f13..5600bd4be6b 100644
--- a/gcc/testsuite/gcc.target/i386/avx512vl-vpexpandb-1.c
+++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpexpandb-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-mavx512vbmi2 -mavx512bw -mavx512vl -O2" } */
+/* { dg-options "-mavx512vbmi2 -mavx512vl -O2" } */
 /* { dg-final { scan-assembler-times "vpexpandb\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)"  1 } } */
 /* { dg-final { scan-assembler-times "vpexpandb\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)"  1 } } */
 /* { dg-final { scan-assembler-times "vpexpandb\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)"  1 } } */
diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpexpandb-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpexpandb-2.c
index 280aedad135..3a3bed690a1 100644
--- a/gcc/testsuite/gcc.target/i386/avx512vl-vpexpandb-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpexpandb-2.c
@@ -1,5 +1,5 @@
 /* { dg-do run } */
-/* { dg-options "-O2 -mavx512vl -mavx512vbmi2 -mavx512bw" } */
+/* { dg-options "-O2 -mavx512vl -mavx512vbmi2" } */
 /* { dg-require-effective-target avx512vl } */
 /* { dg-require-effective-target avx512vbmi2 } */
 
diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpexpandw-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpexpandw-1.c
index ac5c34a0f42..9a897eccfa8 100644
--- a/gcc/testsuite/gcc.target/i386/avx512vl-vpexpandw-1.c
+++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpexpandw-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-mavx512vbmi2 -mavx512bw -mavx512vl -O2" } */
+/* { dg-options "-mavx512vbmi2 -mavx512vl -O2" } */
 /* { dg-final { scan-assembler-times "vpexpandw\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)"  1 } } */
 /* { dg-final { scan-assembler-times "vpexpandw\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)"  1 } } */
 /* { dg-final { scan-assembler-times "vpexpandw\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)"  1 } } */
diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpexpandw-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpexpandw-2.c
index 2c1e00457cc..48ec1a9ea0b 100644
--- a/gcc/testsuite/gcc.target/i386/avx512vl-vpexpandw-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpexpandw-2.c
@@ -1,5 +1,5 @@
 /* { dg-do run } */
-/* { dg-options "-O2 -mavx512vl -mavx512vbmi2 -mavx512bw" } */
+/* { dg-options "-O2 -mavx512vl -mavx512vbmi2" } */
 /* { dg-require-effective-target avx512vl } */
 /* { dg-require-effective-target avx512vbmi2 } */
 
diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpshldd-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpshldd-2.c
index d47e4e61707..99d5154a1c5 100644
--- a/gcc/testsuite/gcc.target/i386/avx512vl-vpshldd-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpshldd-2.c
@@ -1,5 +1,5 @@
 /* { dg-do run } */
-/* { dg-options "-O2 -mavx512vl -mavx512vbmi2 -mavx512bw" } */
+/* { dg-options "-O2 -mavx512vl -mavx512vbmi2" } */
 /* { dg-require-effective-target avx512vl } */
 /* { dg-require-effective-target avx512vbmi2 } */
 
diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpshldq-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpshldq-2.c
index 7a5575e41a1..a95b443b744 100644
--- a/gcc/testsuite/gcc.target/i386/avx512vl-vpshldq-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpshldq-2.c
@@ -1,5 +1,5 @@
 /* { dg-do run } */
-/* { dg-options "-O2 -mavx512vl -mavx512vbmi2 -mavx512bw" } */
+/* { dg-options "-O2 -mavx512vl -mavx512vbmi2" } */
 /* { dg-require-effective-target avx512vl } */
 /* { dg-require-effective-target avx512vbmi2 } */
 
diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpshldv-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpshldv-1.c
index 95695527b47..79248e0281e 100644
--- a/gcc/testsuite/gcc.target/i386/avx512vl-vpshldv-1.c
+++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpshldv-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-mavx512vl -mavx512vbmi2 -mavx512bw -O2" } */
+/* { dg-options "-mavx512vl -mavx512vbmi2 -O2" } */
 /* { dg-final { scan-assembler-times "vpshldvw\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
 /* { dg-final { scan-assembler-times "vpshldvw\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\\n\\r]*%ymm\[0-9\]+\[^\\n\\r\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
 /* { dg-final { scan-assembler-times "vpshldvw\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\\n\\r]*%ymm\[0-9\]+\[^\\n\\r\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */
diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpshldvd-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpshldvd-2.c
index cd2c751ba81..58481c4e1a4 100644
--- a/gcc/testsuite/gcc.target/i386/avx512vl-vpshldvd-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpshldvd-2.c
@@ -1,5 +1,5 @@
 /* { dg-do run } */
-/* { dg-options "-O2 -mavx512vl -mavx512vbmi2 -mavx512bw" } */
+/* { dg-options "-O2 -mavx512vl -mavx512vbmi2" } */
 /* { dg-require-effective-target avx512vl } */
 /* { dg-require-effective-target avx512vbmi2 } */
 
diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpshldvq-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpshldvq-2.c
index 451487de6be..54e8193f19f 100644
--- a/gcc/testsuite/gcc.target/i386/avx512vl-vpshldvq-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpshldvq-2.c
@@ -1,5 +1,5 @@
 /* { dg-do run } */
-/* { dg-options "-O2 -mavx512vl -mavx512vbmi2 -mavx512bw" } */
+/* { dg-options "-O2 -mavx512vl -mavx512vbmi2" } */
 /* { dg-require-effective-target avx512vl } */
 /* { dg-require-effective-target avx512vbmi2 } */
 
diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpshldvw-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpshldvw-2.c
index fa593f5d5ba..8d810077451 100644
--- a/gcc/testsuite/gcc.target/i386/avx512vl-vpshldvw-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpshldvw-2.c
@@ -1,5 +1,5 @@
 /* { dg-do run } */
-/* { dg-options "-O2 -mavx512vl -mavx512vbmi2 -mavx512bw" } */
+/* { dg-options "-O2 -mavx512vl -mavx512vbmi2" } */
 /* { dg-require-effective-target avx512vl } */
 /* { dg-require-effective-target avx512vbmi2 } */
 
diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpshrdd-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpshrdd-2.c
index bf229155a02..3b2c29d02d6 100644
--- a/gcc/testsuite/gcc.target/i386/avx512vl-vpshrdd-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpshrdd-2.c
@@ -1,5 +1,5 @@
 /* { dg-do run } */
-/* { dg-options "-O2 -mavx512vl -mavx512vbmi2 -mavx512bw" } */
+/* { dg-options "-O2 -mavx512vl -mavx512vbmi2" } */
 /* { dg-require-effective-target avx512vl } */
 /* { dg-require-effective-target avx512vbmi2 } */
 
diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpshrdq-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpshrdq-2.c
index 61e0708797b..02adfbf4189 100644
--- a/gcc/testsuite/gcc.target/i386/avx512vl-vpshrdq-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpshrdq-2.c
@@ -1,5 +1,5 @@
 /* { dg-do run } */
-/* { dg-options "-O2 -mavx512vl -mavx512vbmi2 -mavx512bw" } */
+/* { dg-options "-O2 -mavx512vl -mavx512vbmi2" } */
 /* { dg-require-effective-target avx512vl } */
 /* { dg-require-effective-target avx512vbmi2 } */
 
diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpshrdv-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpshrdv-1.c
index 4e6ceb2787a..243878c853e 100644
--- a/gcc/testsuite/gcc.target/i386/avx512vl-vpshrdv-1.c
+++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpshrdv-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-mavx512vl -mavx512vbmi2 -mavx512bw -O2" } */
+/* { dg-options "-mavx512vl -mavx512vbmi2 -O2" } */
 /* { dg-final { scan-assembler-times "vpshrdvw\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
 /* { dg-final { scan-assembler-times "vpshrdvw\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\\n\\r]*%ymm\[0-9\]+\[^\\n\\r\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
 /* { dg-final { scan-assembler-times "vpshrdvw\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\\n\\r]*%ymm\[0-9\]+\[^\\n\\r\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */
diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpshrdvd-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpshrdvd-2.c
index 6d8ab79bcad..a9e47ba64ac 100644
--- a/gcc/testsuite/gcc.target/i386/avx512vl-vpshrdvd-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpshrdvd-2.c
@@ -1,5 +1,5 @@
 /* { dg-do run } */
-/* { dg-options "-O2 -mavx512vl -mavx512bw -mavx512vbmi2" } */
+/* { dg-options "-O2 -mavx512vl -mavx512vbmi2" } */
 /* { dg-require-effective-target avx512vl } */
 /* { dg-require-effective-target avx512vbmi2 } */
 
diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpshrdvq-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpshrdvq-2.c
index da74a62c724..9b4f2f2d17e 100644
--- a/gcc/testsuite/gcc.target/i386/avx512vl-vpshrdvq-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpshrdvq-2.c
@@ -1,5 +1,5 @@
 /* { dg-do run } */
-/* { dg-options "-O2 -mavx512vl -mavx512bw -mavx512vbmi2" } */
+/* { dg-options "-O2 -mavx512vl -mavx512vbmi2" } */
 /* { dg-require-effective-target avx512vl } */
 /* { dg-require-effective-target avx512vbmi2 } */
 
diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpshrdvw-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpshrdvw-2.c
index 50a3c00c640..2b161fceeed 100644
--- a/gcc/testsuite/gcc.target/i386/avx512vl-vpshrdvw-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpshrdvw-2.c
@@ -1,5 +1,5 @@
 /* { dg-do run } */
-/* { dg-options "-O2 -mavx512vl -mavx512bw -mavx512vbmi2" } */
+/* { dg-options "-O2 -mavx512vl -mavx512vbmi2" } */
 /* { dg-require-effective-target avx512vl } */
 /* { dg-require-effective-target avx512vbmi2 } */
 
diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpshrdw-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpshrdw-2.c
index 507034b2288..bfb32afb2f9 100644
--- a/gcc/testsuite/gcc.target/i386/avx512vl-vpshrdw-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpshrdw-2.c
@@ -1,5 +1,5 @@
 /* { dg-do run } */
-/* { dg-options "-O2 -mavx512vl -mavx512bw -mavx512vbmi2" } */
+/* { dg-options "-O2 -mavx512vl -mavx512vbmi2" } */
 /* { dg-require-effective-target avx512vl } */
 /* { dg-require-effective-target avx512vbmi2 } */
 
diff --git a/gcc/testsuite/gcc.target/i386/avx512vlbw-pr100267-1.c b/gcc/testsuite/gcc.target/i386/avx512vlbw-pr100267-1.c
index 135dbd7577e..2f7d5158c4d 100644
--- a/gcc/testsuite/gcc.target/i386/avx512vlbw-pr100267-1.c
+++ b/gcc/testsuite/gcc.target/i386/avx512vlbw-pr100267-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-mavx512bw -mavx512vbmi2 -mavx512vl -O2" } */
+/* { dg-options "-mavx512vbmi2 -mavx512vl -O2" } */
 /* { dg-final { scan-assembler-times "vpexpandb\[ \\t\]+\[^\{\n\]*\\(\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)"  1 } } */
 /* { dg-final { scan-assembler-times "vpexpandb\[ \\t\]+\[^\{\n\(]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)"  1 } } */
 /* { dg-final { scan-assembler-times "vpexpandw\[ \\t\]+\[^\{\n\]*\\(\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)"  1 } } */
diff --git a/gcc/testsuite/gcc.target/i386/avx512vlbw-pr100267-b-2.c b/gcc/testsuite/gcc.target/i386/avx512vlbw-pr100267-b-2.c
index d54e8033a25..688d1be893c 100644
--- a/gcc/testsuite/gcc.target/i386/avx512vlbw-pr100267-b-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx512vlbw-pr100267-b-2.c
@@ -1,5 +1,5 @@
 /* { dg-do run } */
-/* { dg-options "-O2 -mavx512vl -mavx512vbmi2 -mavx512bw" } */
+/* { dg-options "-O2 -mavx512vl -mavx512vbmi2" } */
 /* { dg-require-effective-target avx512vl } */
 /* { dg-require-effective-target avx512vbmi2 } */
 
diff --git a/gcc/testsuite/gcc.target/i386/avx512vlbw-pr100267-w-2.c b/gcc/testsuite/gcc.target/i386/avx512vlbw-pr100267-w-2.c
index a46ca78a621..ed061a92fc9 100644
--- a/gcc/testsuite/gcc.target/i386/avx512vlbw-pr100267-w-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx512vlbw-pr100267-w-2.c
@@ -1,5 +1,5 @@
 /* { dg-do run } */
-/* { dg-options "-O2 -mavx512vl -mavx512vbmi2 -mavx512bw" } */
+/* { dg-options "-O2 -mavx512vl -mavx512vbmi2" } */
 /* { dg-require-effective-target avx512vl } */
 /* { dg-require-effective-target avx512vbmi2 } */
 
-- 
2.31.1


^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: [PATCH 1/2] i386: Add AVX512BW dependency to AVX512BITALG
  2023-04-18  7:04 ` [PATCH 1/2] i386: Add AVX512BW dependency to AVX512BITALG Haochen Jiang
@ 2023-04-19  1:42   ` Hongtao Liu
  0 siblings, 0 replies; 5+ messages in thread
From: Hongtao Liu @ 2023-04-19  1:42 UTC (permalink / raw)
  To: Haochen Jiang; +Cc: gcc-patches, hongtao.liu, ubizjak

On Tue, Apr 18, 2023 at 3:07 PM Haochen Jiang via Gcc-patches
<gcc-patches@gcc.gnu.org> wrote:
>
> gcc/ChangeLog:
>
>         * common/config/i386/i386-common.cc
>         (OPTION_MASK_ISA_AVX512BITALG_SET):
>         Change OPTION_MASK_ISA_AVX512F_SET
>         to OPTION_MASK_ISA_AVX512BW_SET.
>         (OPTION_MASK_ISA_AVX512F_UNSET):
>         Remove OPTION_MASK_ISA_AVX512BITALG_SET.
>         (OPTION_MASK_ISA_AVX512BW_UNSET):
>         Add OPTION_MASK_ISA_AVX512BITALG_SET.
>         * config/i386/avx512bitalgintrin.h: Do not push avx512bw.
>         * config/i386/i386-builtin.def:
>         Remove redundant OPTION_MASK_ISA_AVX512BW.
>         * config/i386/sse.md (VI1_AVX512VLBW): Removed.
>         (avx512vl_vpshufbitqmb<mode><mask_scalar_merge_name>):
>         Change the iterator from VI1_AVX512VLBW to VI1_AVX512VL.
>
> gcc/testsuite/ChangeLog:
>
>         * gcc.target/i386/avx512bitalg-vpopcntb-1.c:
>         Remove avx512bw.
>         * gcc.target/i386/avx512bitalg-vpopcntb.c: Ditto.
>         * gcc.target/i386/avx512bitalg-vpopcntbvl.c: Ditto.
>         * gcc.target/i386/avx512bitalg-vpopcntw-1.c: Ditto.
>         * gcc.target/i386/avx512bitalg-vpopcntw.c: Ditto.
>         * gcc.target/i386/avx512bitalg-vpopcntwvl.c: Ditto.
>         * gcc.target/i386/avx512bitalg-vpshufbitqmb-1.c: Ditto.
>         * gcc.target/i386/avx512bitalg-vpshufbitqmb.c: Ditto.
>         * gcc.target/i386/avx512bitalgvl-vpopcntb-1.c: Ditto.
>         * gcc.target/i386/avx512bitalgvl-vpopcntw-1.c: Ditto.
>         * gcc.target/i386/avx512bitalgvl-vpshufbitqmb-1.c: Ditto.
>         * gcc.target/i386/pr93696-1.c: Ditto.
>         * gcc.target/i386/pr93696-2.c: Ditto.
Ok.
> ---
>  gcc/common/config/i386/i386-common.cc         |  8 ++--
>  gcc/config/i386/avx512bitalgintrin.h          | 39 ++++---------------
>  gcc/config/i386/i386-builtin.def              | 10 ++---
>  gcc/config/i386/sse.md                        |  8 +---
>  .../gcc.target/i386/avx512bitalg-vpopcntb-1.c |  3 +-
>  .../gcc.target/i386/avx512bitalg-vpopcntb.c   |  2 +-
>  .../gcc.target/i386/avx512bitalg-vpopcntbvl.c |  2 +-
>  .../gcc.target/i386/avx512bitalg-vpopcntw-1.c |  3 +-
>  .../gcc.target/i386/avx512bitalg-vpopcntw.c   |  2 +-
>  .../gcc.target/i386/avx512bitalg-vpopcntwvl.c |  2 +-
>  .../i386/avx512bitalg-vpshufbitqmb-1.c        |  2 +-
>  .../i386/avx512bitalg-vpshufbitqmb.c          |  2 +-
>  .../i386/avx512bitalgvl-vpopcntb-1.c          |  3 +-
>  .../i386/avx512bitalgvl-vpopcntw-1.c          |  3 +-
>  .../i386/avx512bitalgvl-vpshufbitqmb-1.c      |  2 +-
>  gcc/testsuite/gcc.target/i386/pr93696-1.c     |  2 +-
>  gcc/testsuite/gcc.target/i386/pr93696-2.c     |  2 +-
>  17 files changed, 32 insertions(+), 63 deletions(-)
>
> diff --git a/gcc/common/config/i386/i386-common.cc b/gcc/common/config/i386/i386-common.cc
> index d90c558311b..f78fc0a60e2 100644
> --- a/gcc/common/config/i386/i386-common.cc
> +++ b/gcc/common/config/i386/i386-common.cc
> @@ -91,7 +91,7 @@ along with GCC; see the file COPYING3.  If not see
>  #define OPTION_MASK_ISA_AVX512VPOPCNTDQ_SET \
>    (OPTION_MASK_ISA_AVX512VPOPCNTDQ | OPTION_MASK_ISA_AVX512F_SET)
>  #define OPTION_MASK_ISA_AVX512BITALG_SET \
> -  (OPTION_MASK_ISA_AVX512BITALG | OPTION_MASK_ISA_AVX512F_SET)
> +  (OPTION_MASK_ISA_AVX512BITALG | OPTION_MASK_ISA_AVX512BW_SET)
>  #define OPTION_MASK_ISA2_AVX512BF16_SET OPTION_MASK_ISA2_AVX512BF16
>  #define OPTION_MASK_ISA_RTM_SET OPTION_MASK_ISA_RTM
>  #define OPTION_MASK_ISA_PRFCHW_SET OPTION_MASK_ISA_PRFCHW
> @@ -234,14 +234,14 @@ along with GCC; see the file COPYING3.  If not see
>     | OPTION_MASK_ISA_AVX512VL_UNSET | OPTION_MASK_ISA_AVX512IFMA_UNSET \
>     | OPTION_MASK_ISA_AVX512VBMI2_UNSET \
>     | OPTION_MASK_ISA_AVX512VNNI_UNSET \
> -   | OPTION_MASK_ISA_AVX512VPOPCNTDQ_UNSET \
> -   | OPTION_MASK_ISA_AVX512BITALG_UNSET)
> +   | OPTION_MASK_ISA_AVX512VPOPCNTDQ_UNSET)
>  #define OPTION_MASK_ISA_AVX512CD_UNSET OPTION_MASK_ISA_AVX512CD
>  #define OPTION_MASK_ISA_AVX512PF_UNSET OPTION_MASK_ISA_AVX512PF
>  #define OPTION_MASK_ISA_AVX512ER_UNSET OPTION_MASK_ISA_AVX512ER
>  #define OPTION_MASK_ISA_AVX512DQ_UNSET OPTION_MASK_ISA_AVX512DQ
>  #define OPTION_MASK_ISA_AVX512BW_UNSET \
> -  (OPTION_MASK_ISA_AVX512BW | OPTION_MASK_ISA_AVX512VBMI_UNSET)
> +  (OPTION_MASK_ISA_AVX512BW | OPTION_MASK_ISA_AVX512VBMI_UNSET \
> +   | OPTION_MASK_ISA_AVX512BITALG_UNSET)
>  #define OPTION_MASK_ISA_AVX512VL_UNSET OPTION_MASK_ISA_AVX512VL
>  #define OPTION_MASK_ISA_AVX512IFMA_UNSET OPTION_MASK_ISA_AVX512IFMA
>  #define OPTION_MASK_ISA2_AVXIFMA_UNSET OPTION_MASK_ISA2_AVXIFMA
> diff --git a/gcc/config/i386/avx512bitalgintrin.h b/gcc/config/i386/avx512bitalgintrin.h
> index aa6d652938a..a1c7be109a9 100644
> --- a/gcc/config/i386/avx512bitalgintrin.h
> +++ b/gcc/config/i386/avx512bitalgintrin.h
> @@ -48,17 +48,6 @@ _mm512_popcnt_epi16 (__m512i __A)
>    return (__m512i) __builtin_ia32_vpopcountw_v32hi ((__v32hi) __A);
>  }
>
> -#ifdef __DISABLE_AVX512BITALG__
> -#undef __DISABLE_AVX512BITALG__
> -#pragma GCC pop_options
> -#endif /* __DISABLE_AVX512BITALG__ */
> -
> -#if !defined(__AVX512BITALG__) || !defined(__AVX512BW__)
> -#pragma GCC push_options
> -#pragma GCC target("avx512bitalg,avx512bw")
> -#define __DISABLE_AVX512BITALGBW__
> -#endif /* __AVX512VLBW__ */
> -
>  extern __inline __m512i
>  __attribute__((__gnu_inline__, __always_inline__, __artificial__))
>  _mm512_mask_popcnt_epi8 (__m512i __W, __mmask64 __U, __m512i __A)
> @@ -114,16 +103,16 @@ _mm512_mask_bitshuffle_epi64_mask (__mmask64 __M, __m512i __A, __m512i __B)
>                                                  (__mmask64) __M);
>  }
>
> -#ifdef __DISABLE_AVX512BITALGBW__
> -#undef __DISABLE_AVX512BITALGBW__
> +#ifdef __DISABLE_AVX512BITALG__
> +#undef __DISABLE_AVX512BITALG__
>  #pragma GCC pop_options
> -#endif /* __DISABLE_AVX512BITALGBW__ */
> +#endif /* __DISABLE_AVX512BITALG__ */
>
> -#if !defined(__AVX512BITALG__) || !defined(__AVX512VL__) || !defined(__AVX512BW__)
> +#if !defined(__AVX512BITALG__) || !defined(__AVX512VL__)
>  #pragma GCC push_options
> -#pragma GCC target("avx512bitalg,avx512vl,avx512bw")
> -#define __DISABLE_AVX512BITALGVLBW__
> -#endif /* __AVX512VLBW__ */
> +#pragma GCC target("avx512bitalg,avx512vl")
> +#define __DISABLE_AVX512BITALGVL__
> +#endif /* __AVX512BITALGVL__ */
>
>  extern __inline __m256i
>  __attribute__((__gnu_inline__, __always_inline__, __artificial__))
> @@ -162,18 +151,6 @@ _mm256_mask_bitshuffle_epi64_mask (__mmask32 __M, __m256i __A, __m256i __B)
>                                                  (__mmask32) __M);
>  }
>
> -#ifdef __DISABLE_AVX512BITALGVLBW__
> -#undef __DISABLE_AVX512BITALGVLBW__
> -#pragma GCC pop_options
> -#endif /* __DISABLE_AVX512BITALGVLBW__ */
> -
> -
> -#if !defined(__AVX512BITALG__) || !defined(__AVX512VL__)
> -#pragma GCC push_options
> -#pragma GCC target("avx512bitalg,avx512vl")
> -#define __DISABLE_AVX512BITALGVL__
> -#endif /* __AVX512VLBW__ */
> -
>  extern __inline __mmask16
>  __attribute__((__gnu_inline__, __always_inline__, __artificial__))
>  _mm_bitshuffle_epi64_mask (__m128i __A, __m128i __B)
> @@ -278,6 +255,6 @@ _mm_maskz_popcnt_epi16 (__mmask8 __U, __m128i __A)
>  #ifdef __DISABLE_AVX512BITALGVL__
>  #undef __DISABLE_AVX512BITALGVL__
>  #pragma GCC pop_options
> -#endif /* __DISABLE_AVX512BITALGBW__ */
> +#endif /* __DISABLE_AVX512BITALGVL__ */
>
>  #endif /* _AVX512BITALGINTRIN_H_INCLUDED */
> diff --git a/gcc/config/i386/i386-builtin.def b/gcc/config/i386/i386-builtin.def
> index 6dae6972d81..c4167307992 100644
> --- a/gcc/config/i386/i386-builtin.def
> +++ b/gcc/config/i386/i386-builtin.def
> @@ -2762,21 +2762,21 @@ BDESC (OPTION_MASK_ISA_AVX512VPOPCNTDQ | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_v
>
>  /* BITALG */
>  BDESC (OPTION_MASK_ISA_AVX512BITALG, 0, CODE_FOR_vpopcountv64qi, "__builtin_ia32_vpopcountb_v64qi", IX86_BUILTIN_VPOPCOUNTBV64QI, UNKNOWN, (int) V64QI_FTYPE_V64QI)
> -BDESC (OPTION_MASK_ISA_AVX512BITALG | OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_vpopcountv64qi_mask, "__builtin_ia32_vpopcountb_v64qi_mask", IX86_BUILTIN_VPOPCOUNTBV64QI_MASK, UNKNOWN, (int) V64QI_FTYPE_V64QI_V64QI_UDI)
> +BDESC (OPTION_MASK_ISA_AVX512BITALG, 0, CODE_FOR_vpopcountv64qi_mask, "__builtin_ia32_vpopcountb_v64qi_mask", IX86_BUILTIN_VPOPCOUNTBV64QI_MASK, UNKNOWN, (int) V64QI_FTYPE_V64QI_V64QI_UDI)
>  BDESC (OPTION_MASK_ISA_AVX512BITALG | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpopcountv32qi, "__builtin_ia32_vpopcountb_v32qi", IX86_BUILTIN_VPOPCOUNTBV32QI, UNKNOWN, (int) V32QI_FTYPE_V32QI)
> -BDESC (OPTION_MASK_ISA_AVX512BITALG | OPTION_MASK_ISA_AVX512VL | OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_vpopcountv32qi_mask, "__builtin_ia32_vpopcountb_v32qi_mask", IX86_BUILTIN_VPOPCOUNTBV32QI_MASK, UNKNOWN, (int) V32QI_FTYPE_V32QI_V32QI_USI)
> +BDESC (OPTION_MASK_ISA_AVX512BITALG | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpopcountv32qi_mask, "__builtin_ia32_vpopcountb_v32qi_mask", IX86_BUILTIN_VPOPCOUNTBV32QI_MASK, UNKNOWN, (int) V32QI_FTYPE_V32QI_V32QI_USI)
>  BDESC (OPTION_MASK_ISA_AVX512BITALG | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpopcountv16qi, "__builtin_ia32_vpopcountb_v16qi", IX86_BUILTIN_VPOPCOUNTBV16QI, UNKNOWN, (int) V16QI_FTYPE_V16QI)
>  BDESC (OPTION_MASK_ISA_AVX512BITALG | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpopcountv16qi_mask, "__builtin_ia32_vpopcountb_v16qi_mask", IX86_BUILTIN_VPOPCOUNTBV16QI_MASK, UNKNOWN, (int) V16QI_FTYPE_V16QI_V16QI_UHI)
>
>  BDESC (OPTION_MASK_ISA_AVX512BITALG, 0, CODE_FOR_vpopcountv32hi, "__builtin_ia32_vpopcountw_v32hi", IX86_BUILTIN_VPOPCOUNTWV32HI, UNKNOWN, (int) V32HI_FTYPE_V32HI)
> -BDESC (OPTION_MASK_ISA_AVX512BITALG | OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_vpopcountv32hi_mask, "__builtin_ia32_vpopcountw_v32hi_mask", IX86_BUILTIN_VPOPCOUNTQV32HI_MASK, UNKNOWN, (int) V32HI_FTYPE_V32HI_V32HI_USI)
> +BDESC (OPTION_MASK_ISA_AVX512BITALG, 0, CODE_FOR_vpopcountv32hi_mask, "__builtin_ia32_vpopcountw_v32hi_mask", IX86_BUILTIN_VPOPCOUNTQV32HI_MASK, UNKNOWN, (int) V32HI_FTYPE_V32HI_V32HI_USI)
>  BDESC (OPTION_MASK_ISA_AVX512BITALG | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpopcountv16hi, "__builtin_ia32_vpopcountw_v16hi", IX86_BUILTIN_VPOPCOUNTWV16HI, UNKNOWN, (int) V16HI_FTYPE_V16HI)
>  BDESC (OPTION_MASK_ISA_AVX512BITALG | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpopcountv16hi_mask, "__builtin_ia32_vpopcountw_v16hi_mask", IX86_BUILTIN_VPOPCOUNTQV16HI_MASK, UNKNOWN, (int) V16HI_FTYPE_V16HI_V16HI_UHI)
>  BDESC (OPTION_MASK_ISA_AVX512BITALG | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpopcountv8hi, "__builtin_ia32_vpopcountw_v8hi", IX86_BUILTIN_VPOPCOUNTWV8HI, UNKNOWN, (int) V8HI_FTYPE_V8HI)
>  BDESC (OPTION_MASK_ISA_AVX512BITALG | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpopcountv8hi_mask, "__builtin_ia32_vpopcountw_v8hi_mask", IX86_BUILTIN_VPOPCOUNTQV8HI_MASK, UNKNOWN, (int) V8HI_FTYPE_V8HI_V8HI_UQI)
>
> -BDESC (OPTION_MASK_ISA_AVX512BITALG | OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_avx512vl_vpshufbitqmbv64qi_mask, "__builtin_ia32_vpshufbitqmb512_mask", IX86_BUILTIN_VPSHUFBITQMB512_MASK, UNKNOWN, (int) UDI_FTYPE_V64QI_V64QI_UDI)
> -BDESC (OPTION_MASK_ISA_AVX512BITALG | OPTION_MASK_ISA_AVX512VL | OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_avx512vl_vpshufbitqmbv32qi_mask, "__builtin_ia32_vpshufbitqmb256_mask", IX86_BUILTIN_VPSHUFBITQMB256_MASK, UNKNOWN, (int) USI_FTYPE_V32QI_V32QI_USI)
> +BDESC (OPTION_MASK_ISA_AVX512BITALG, 0, CODE_FOR_avx512vl_vpshufbitqmbv64qi_mask, "__builtin_ia32_vpshufbitqmb512_mask", IX86_BUILTIN_VPSHUFBITQMB512_MASK, UNKNOWN, (int) UDI_FTYPE_V64QI_V64QI_UDI)
> +BDESC (OPTION_MASK_ISA_AVX512BITALG | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_avx512vl_vpshufbitqmbv32qi_mask, "__builtin_ia32_vpshufbitqmb256_mask", IX86_BUILTIN_VPSHUFBITQMB256_MASK, UNKNOWN, (int) USI_FTYPE_V32QI_V32QI_USI)
>  BDESC (OPTION_MASK_ISA_AVX512BITALG | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_avx512vl_vpshufbitqmbv16qi_mask, "__builtin_ia32_vpshufbitqmb128_mask", IX86_BUILTIN_VPSHUFBITQMB128_MASK, UNKNOWN, (int) UHI_FTYPE_V16QI_V16QI_UHI)
>
>  /* AVX512_4FMAPS and AVX512_4VNNIW builtins with variable number of arguments. Defined in additional ix86_isa_flags2.  */
> diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
> index 5b6b2427460..deb2d747ec1 100644
> --- a/gcc/config/i386/sse.md
> +++ b/gcc/config/i386/sse.md
> @@ -686,10 +686,6 @@
>  (define_mode_iterator VF4_128_8_256
>    [V4DF V4SF])
>
> -(define_mode_iterator VI1_AVX512VLBW
> -  [(V64QI "TARGET_AVX512BW") (V32QI  "TARGET_AVX512VL")
> -       (V16QI  "TARGET_AVX512VL")])
> -
>  (define_mode_attr avx512
>    [(V16QI "avx512vl") (V32QI "avx512vl") (V64QI "avx512bw")
>     (V8HI  "avx512vl") (V16HI  "avx512vl") (V32HI "avx512bw")
> @@ -28853,8 +28849,8 @@
>  (define_insn "avx512vl_vpshufbitqmb<mode><mask_scalar_merge_name>"
>    [(set (match_operand:<avx512fmaskmode> 0 "register_operand" "=k")
>         (unspec:<avx512fmaskmode>
> -         [(match_operand:VI1_AVX512VLBW 1 "register_operand" "v")
> -          (match_operand:VI1_AVX512VLBW 2 "nonimmediate_operand" "vm")]
> +         [(match_operand:VI1_AVX512VL 1 "register_operand" "v")
> +          (match_operand:VI1_AVX512VL 2 "nonimmediate_operand" "vm")]
>           UNSPEC_VPSHUFBIT))]
>    "TARGET_AVX512BITALG"
>    "vpshufbitqmb\t{%2, %1, %0<mask_scalar_merge_operand3>|%0<mask_scalar_merge_operand3>, %1, %2}"
> diff --git a/gcc/testsuite/gcc.target/i386/avx512bitalg-vpopcntb-1.c b/gcc/testsuite/gcc.target/i386/avx512bitalg-vpopcntb-1.c
> index 697757b8b73..93afe13227f 100644
> --- a/gcc/testsuite/gcc.target/i386/avx512bitalg-vpopcntb-1.c
> +++ b/gcc/testsuite/gcc.target/i386/avx512bitalg-vpopcntb-1.c
> @@ -1,7 +1,6 @@
>  /* { dg-do run } */
> -/* { dg-options "-O2 -mavx512bitalg -mavx512bw" } */
> +/* { dg-options "-O2 -mavx512bitalg" } */
>  /* { dg-require-effective-target avx512bitalg } */
> -/* { dg-require-effective-target avx512bw } */
>
>  #define AVX512BITALG
>  #define SIZE (AVX512F_LEN / 8)
> diff --git a/gcc/testsuite/gcc.target/i386/avx512bitalg-vpopcntb.c b/gcc/testsuite/gcc.target/i386/avx512bitalg-vpopcntb.c
> index 246f925eede..44b82c0519d 100644
> --- a/gcc/testsuite/gcc.target/i386/avx512bitalg-vpopcntb.c
> +++ b/gcc/testsuite/gcc.target/i386/avx512bitalg-vpopcntb.c
> @@ -1,5 +1,5 @@
>  /* { dg-do compile } */
> -/* { dg-options "-O2 -mavx512bitalg -mavx512bw" } */
> +/* { dg-options "-O2 -mavx512bitalg" } */
>  /* { dg-final { scan-assembler-times "vpopcntb\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)"  1 } } */
>  /* { dg-final { scan-assembler-times "vpopcntb\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)"  1 } } */
>  /* { dg-final { scan-assembler-times "vpopcntb\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)"  1 } } */
> diff --git a/gcc/testsuite/gcc.target/i386/avx512bitalg-vpopcntbvl.c b/gcc/testsuite/gcc.target/i386/avx512bitalg-vpopcntbvl.c
> index 8c7f45fc5f7..8c2dfaba9c6 100644
> --- a/gcc/testsuite/gcc.target/i386/avx512bitalg-vpopcntbvl.c
> +++ b/gcc/testsuite/gcc.target/i386/avx512bitalg-vpopcntbvl.c
> @@ -1,5 +1,5 @@
>  /* { dg-do compile } */
> -/* { dg-options "-O2 -mavx512bitalg -mavx512bw -mavx512vl" } */
> +/* { dg-options "-O2 -mavx512bitalg -mavx512vl" } */
>  /* { dg-final { scan-assembler-times "vpopcntb\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)"  1 } } */
>  /* { dg-final { scan-assembler-times "vpopcntb\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)"  1 } } */
>  /* { dg-final { scan-assembler-times "vpopcntb\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)"  1 } } */
> diff --git a/gcc/testsuite/gcc.target/i386/avx512bitalg-vpopcntw-1.c b/gcc/testsuite/gcc.target/i386/avx512bitalg-vpopcntw-1.c
> index 0a725fe012a..93e2be23f1f 100644
> --- a/gcc/testsuite/gcc.target/i386/avx512bitalg-vpopcntw-1.c
> +++ b/gcc/testsuite/gcc.target/i386/avx512bitalg-vpopcntw-1.c
> @@ -1,7 +1,6 @@
>  /* { dg-do run } */
> -/* { dg-options "-O2 -mavx512bitalg -mavx512bw" } */
> +/* { dg-options "-O2 -mavx512bitalg" } */
>  /* { dg-require-effective-target avx512bitalg } */
> -/* { dg-require-effective-target avx512bw } */
>
>  #define AVX512BITALG
>  #define SIZE (AVX512F_LEN / 16)
> diff --git a/gcc/testsuite/gcc.target/i386/avx512bitalg-vpopcntw.c b/gcc/testsuite/gcc.target/i386/avx512bitalg-vpopcntw.c
> index 90663f480fc..2ef8589f6c1 100644
> --- a/gcc/testsuite/gcc.target/i386/avx512bitalg-vpopcntw.c
> +++ b/gcc/testsuite/gcc.target/i386/avx512bitalg-vpopcntw.c
> @@ -1,5 +1,5 @@
>  /* { dg-do compile } */
> -/* { dg-options "-O2 -mavx512bitalg -mavx512bw" } */
> +/* { dg-options "-O2 -mavx512bitalg" } */
>  /* { dg-final { scan-assembler-times "vpopcntw\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)"  1 } } */
>  /* { dg-final { scan-assembler-times "vpopcntw\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)"  1 } } */
>  /* { dg-final { scan-assembler-times "vpopcntw\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)"  1 } } */
> diff --git a/gcc/testsuite/gcc.target/i386/avx512bitalg-vpopcntwvl.c b/gcc/testsuite/gcc.target/i386/avx512bitalg-vpopcntwvl.c
> index 3a646b57282..c976461b12e 100644
> --- a/gcc/testsuite/gcc.target/i386/avx512bitalg-vpopcntwvl.c
> +++ b/gcc/testsuite/gcc.target/i386/avx512bitalg-vpopcntwvl.c
> @@ -1,5 +1,5 @@
>  /* { dg-do compile } */
> -/* { dg-options "-O2 -mavx512bitalg -mavx512bw -mavx512vl" } */
> +/* { dg-options "-O2 -mavx512bitalg -mavx512vl" } */
>  /* { dg-final { scan-assembler-times "vpopcntw\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)"  1 } } */
>  /* { dg-final { scan-assembler-times "vpopcntw\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)"  1 } } */
>  /* { dg-final { scan-assembler-times "vpopcntw\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)"  1 } } */
> diff --git a/gcc/testsuite/gcc.target/i386/avx512bitalg-vpshufbitqmb-1.c b/gcc/testsuite/gcc.target/i386/avx512bitalg-vpshufbitqmb-1.c
> index 668064aa4e1..5e881484bde 100644
> --- a/gcc/testsuite/gcc.target/i386/avx512bitalg-vpshufbitqmb-1.c
> +++ b/gcc/testsuite/gcc.target/i386/avx512bitalg-vpshufbitqmb-1.c
> @@ -1,5 +1,5 @@
>  /* { dg-do run } */
> -/* { dg-options "-O2 -mavx512bitalg -mavx512f -mavx512bw" } */
> +/* { dg-options "-O2 -mavx512bitalg" } */
>  /* { dg-require-effective-target avx512bitalg } */
>
>  #define AVX512BITALG
> diff --git a/gcc/testsuite/gcc.target/i386/avx512bitalg-vpshufbitqmb.c b/gcc/testsuite/gcc.target/i386/avx512bitalg-vpshufbitqmb.c
> index 7acb0c203f3..75fbef89732 100644
> --- a/gcc/testsuite/gcc.target/i386/avx512bitalg-vpshufbitqmb.c
> +++ b/gcc/testsuite/gcc.target/i386/avx512bitalg-vpshufbitqmb.c
> @@ -1,5 +1,5 @@
>  /* { dg-do compile } */
> -/* { dg-options "-mavx512bitalg -mavx512vl -mavx512bw -O2" } */
> +/* { dg-options "-mavx512bitalg -mavx512vl -O2" } */
>  /* { dg-final { scan-assembler-times "vpshufbitqmb\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\]*%k\[0-7\]\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
>  /* { dg-final { scan-assembler-times "vpshufbitqmb\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\]*%k\[0-7\]\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
>  /* { dg-final { scan-assembler-times "vpshufbitqmb\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\]*%k\[0-7\]\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
> diff --git a/gcc/testsuite/gcc.target/i386/avx512bitalgvl-vpopcntb-1.c b/gcc/testsuite/gcc.target/i386/avx512bitalgvl-vpopcntb-1.c
> index 607ec3ff3df..a4e9d63fc1c 100644
> --- a/gcc/testsuite/gcc.target/i386/avx512bitalgvl-vpopcntb-1.c
> +++ b/gcc/testsuite/gcc.target/i386/avx512bitalgvl-vpopcntb-1.c
> @@ -1,8 +1,7 @@
>  /* { dg-do run } */
> -/* { dg-options "-O2 -mavx512vl -mavx512bitalg -mavx512bw" } */
> +/* { dg-options "-O2 -mavx512vl -mavx512bitalg" } */
>  /* { dg-require-effective-target avx512vl } */
>  /* { dg-require-effective-target avx512bitalg } */
> -/* { dg-require-effective-target avx512bw } */
>
>  #define AVX512VL
>  #define AVX512F_LEN 256
> diff --git a/gcc/testsuite/gcc.target/i386/avx512bitalgvl-vpopcntw-1.c b/gcc/testsuite/gcc.target/i386/avx512bitalgvl-vpopcntw-1.c
> index 3d7e2b5eb11..55fa811fb46 100644
> --- a/gcc/testsuite/gcc.target/i386/avx512bitalgvl-vpopcntw-1.c
> +++ b/gcc/testsuite/gcc.target/i386/avx512bitalgvl-vpopcntw-1.c
> @@ -1,8 +1,7 @@
>  /* { dg-do run } */
> -/* { dg-options "-O2 -mavx512vl -mavx512bitalg -mavx512bw" } */
> +/* { dg-options "-O2 -mavx512vl -mavx512bitalg" } */
>  /* { dg-require-effective-target avx512vl } */
>  /* { dg-require-effective-target avx512bitalg } */
> -/* { dg-require-effective-target avx512bw } */
>
>  #define AVX512VL
>  #define AVX512F_LEN 256
> diff --git a/gcc/testsuite/gcc.target/i386/avx512bitalgvl-vpshufbitqmb-1.c b/gcc/testsuite/gcc.target/i386/avx512bitalgvl-vpshufbitqmb-1.c
> index 76598c44946..497e369bf80 100644
> --- a/gcc/testsuite/gcc.target/i386/avx512bitalgvl-vpshufbitqmb-1.c
> +++ b/gcc/testsuite/gcc.target/i386/avx512bitalgvl-vpshufbitqmb-1.c
> @@ -1,5 +1,5 @@
>  /* { dg-do run } */
> -/* { dg-options "-O2 -mavx512vl -mavx512bitalg -mavx512bw" } */
> +/* { dg-options "-O2 -mavx512vl -mavx512bitalg" } */
>  /* { dg-require-effective-target avx512vl } */
>  /* { dg-require-effective-target avx512bitalg } */
>
> diff --git a/gcc/testsuite/gcc.target/i386/pr93696-1.c b/gcc/testsuite/gcc.target/i386/pr93696-1.c
> index 128bb98c066..70f0f8ad8e1 100644
> --- a/gcc/testsuite/gcc.target/i386/pr93696-1.c
> +++ b/gcc/testsuite/gcc.target/i386/pr93696-1.c
> @@ -1,6 +1,6 @@
>  /* PR target/93696 */
>  /* { dg-do compile } */
> -/* { dg-options "-O2 -mavx512bitalg -mavx512vpopcntdq -mavx512vl -mavx512bw -masm=att" } */
> +/* { dg-options "-O2 -mavx512bitalg -mavx512vpopcntdq -mavx512vl -masm=att" } */
>  /* { dg-final { scan-assembler-times "vpopcnt\[bwdq]\t%\[xyz]mm1, %\[xyz]mm0\{%k\[0-7]\}\[^\{]" 12 } } */
>  /* { dg-final { scan-assembler-not "vmovdq\[au]\[0-9]" } } */
>
> diff --git a/gcc/testsuite/gcc.target/i386/pr93696-2.c b/gcc/testsuite/gcc.target/i386/pr93696-2.c
> index 25a298aea18..e6aabd4d081 100644
> --- a/gcc/testsuite/gcc.target/i386/pr93696-2.c
> +++ b/gcc/testsuite/gcc.target/i386/pr93696-2.c
> @@ -1,6 +1,6 @@
>  /* PR target/93696 */
>  /* { dg-do compile } */
> -/* { dg-options "-O2 -mavx512bitalg -mavx512vpopcntdq -mavx512vl -mavx512bw -masm=att" } */
> +/* { dg-options "-O2 -mavx512bitalg -mavx512vpopcntdq -mavx512vl -masm=att" } */
>  /* { dg-final { scan-assembler-times "vpopcnt\[bwdq]\t%\[xyz]mm1, %\[xyz]mm0\{%k\[0-7]\}\{z\}" 12 } } */
>  /* { dg-final { scan-assembler-not "vmovdq\[au]\[0-9]" } } */
>
> --
> 2.31.1
>


-- 
BR,
Hongtao

^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: [PATCH 2/2] i386: Add AVX512BW dependency to AVX512VBMI2
  2023-04-18  7:04 ` [PATCH 2/2] i386: Add AVX512BW dependency to AVX512VBMI2 Haochen Jiang
@ 2023-04-19  1:43   ` Hongtao Liu
  0 siblings, 0 replies; 5+ messages in thread
From: Hongtao Liu @ 2023-04-19  1:43 UTC (permalink / raw)
  To: Haochen Jiang; +Cc: gcc-patches, hongtao.liu, ubizjak

On Tue, Apr 18, 2023 at 3:07 PM Haochen Jiang via Gcc-patches
<gcc-patches@gcc.gnu.org> wrote:
>
> gcc/ChangeLog:
>
>         * common/config/i386/i386-common.cc
>         (OPTION_MASK_ISA_AVX512VBMI2_SET): Change OPTION_MASK_ISA_AVX512F_SET
>         to OPTION_MASK_ISA_AVX512BW_SET.
>         (OPTION_MASK_ISA_AVX512F_UNSET):
>         Remove OPTION_MASK_ISA_AVX512VBMI2_UNSET.
>         (OPTION_MASK_ISA_AVX512BW_UNSET):
>         Add OPTION_MASK_ISA_AVX512VBMI2_UNSET.
>         * config/i386/avx512vbmi2intrin.h: Do not push avx512bw.
>         * config/i386/avx512vbmi2vlintrin.h: Ditto.
>         * config/i386/i386-builtin.def: Remove OPTION_MASK_ISA_AVX512BW.
>         * config/i386/sse.md (VI12_AVX512VLBW): Removed.
>         (VI12_VI48F_AVX512VLBW): Rename to VI12_VI48F_AVX512VL.
>         (compress<mode>_mask): Change iterator from VI12_AVX512VLBW to
>         VI12_AVX512VL.
>         (compressstore<mode>_mask): Ditto.
>         (expand<mode>_mask): Ditto.
>         (expand<mode>_maskz): Ditto.
>         (*expand<mode>_mask): Change iterator from VI12_VI48F_AVX512VLBW to
>         VI12_VI48F_AVX512VL.
>
> gcc/testsuite/ChangeLog:
>
>         * gcc.target/i386/avx512bw-pr100267-1.c: Remove avx512f and avx512bw.
>         * gcc.target/i386/avx512bw-pr100267-b-2.c: Ditto.
>         * gcc.target/i386/avx512bw-pr100267-d-2.c: Ditto.
>         * gcc.target/i386/avx512bw-pr100267-q-2.c: Ditto.
>         * gcc.target/i386/avx512bw-pr100267-w-2.c: Ditto.
>         * gcc.target/i386/avx512f-vpcompressb-1.c: Ditto.
>         * gcc.target/i386/avx512f-vpcompressb-2.c: Ditto.
>         * gcc.target/i386/avx512f-vpcompressw-1.c: Ditto.
>         * gcc.target/i386/avx512f-vpcompressw-2.c: Ditto.
>         * gcc.target/i386/avx512f-vpexpandb-1.c: Ditto.
>         * gcc.target/i386/avx512f-vpexpandb-2.c: Ditto.
>         * gcc.target/i386/avx512f-vpexpandw-1.c: Ditto.
>         * gcc.target/i386/avx512f-vpexpandw-2.c: Ditto.
>         * gcc.target/i386/avx512f-vpshld-1.c: Ditto.
>         * gcc.target/i386/avx512f-vpshldd-2.c: Ditto.
>         * gcc.target/i386/avx512f-vpshldq-2.c: Ditto.
>         * gcc.target/i386/avx512f-vpshldv-1.c: Ditto.
>         * gcc.target/i386/avx512f-vpshldvd-2.c: Ditto.
>         * gcc.target/i386/avx512f-vpshldvq-2.c: Ditto.
>         * gcc.target/i386/avx512f-vpshldvw-2.c: Ditto.
>         * gcc.target/i386/avx512f-vpshrdd-2.c: Ditto.
>         * gcc.target/i386/avx512f-vpshrdq-2.c: Ditto.
>         * gcc.target/i386/avx512f-vpshrdv-1.c: Ditto.
>         * gcc.target/i386/avx512f-vpshrdvd-2.c: Ditto.
>         * gcc.target/i386/avx512f-vpshrdvq-2.c: Ditto.
>         * gcc.target/i386/avx512f-vpshrdvw-2.c: Ditto.
>         * gcc.target/i386/avx512f-vpshrdw-2.c: Ditto.
>         * gcc.target/i386/avx512vbmi2-vpshld-1.c: Ditto.
>         * gcc.target/i386/avx512vbmi2-vpshrd-1.c: Ditto.
>         * gcc.target/i386/avx512vl-vpcompressb-1.c: Ditto.
>         * gcc.target/i386/avx512vl-vpcompressb-2.c: Ditto.
>         * gcc.target/i386/avx512vl-vpcompressw-2.c: Ditto.
>         * gcc.target/i386/avx512vl-vpexpandb-1.c: Ditto.
>         * gcc.target/i386/avx512vl-vpexpandb-2.c: Ditto.
>         * gcc.target/i386/avx512vl-vpexpandw-1.c: Ditto.
>         * gcc.target/i386/avx512vl-vpexpandw-2.c: Ditto.
>         * gcc.target/i386/avx512vl-vpshldd-2.c: Ditto.
>         * gcc.target/i386/avx512vl-vpshldq-2.c: Ditto.
>         * gcc.target/i386/avx512vl-vpshldv-1.c: Ditto.
>         * gcc.target/i386/avx512vl-vpshldvd-2.c: Ditto.
>         * gcc.target/i386/avx512vl-vpshldvq-2.c: Ditto.
>         * gcc.target/i386/avx512vl-vpshldvw-2.c: Ditto.
>         * gcc.target/i386/avx512vl-vpshrdd-2.c: Ditto.
>         * gcc.target/i386/avx512vl-vpshrdq-2.c: Ditto.
>         * gcc.target/i386/avx512vl-vpshrdv-1.c: Ditto.
>         * gcc.target/i386/avx512vl-vpshrdvd-2.c: Ditto.
>         * gcc.target/i386/avx512vl-vpshrdvq-2.c: Ditto.
>         * gcc.target/i386/avx512vl-vpshrdvw-2.c: Ditto.
>         * gcc.target/i386/avx512vl-vpshrdw-2.c: Ditto.
>         * gcc.target/i386/avx512vlbw-pr100267-1.c: Ditto.
>         * gcc.target/i386/avx512vlbw-pr100267-b-2.c: Ditto.
>         * gcc.target/i386/avx512vlbw-pr100267-w-2.c: Ditto.
Ok.
> ---
>  gcc/common/config/i386/i386-common.cc         |  5 +-
>  gcc/config/i386/avx512vbmi2intrin.h           | 18 ++-----
>  gcc/config/i386/avx512vbmi2vlintrin.h         | 21 ++------
>  gcc/config/i386/i386-builtin.def              | 48 ++++++++---------
>  gcc/config/i386/sse.md                        | 51 ++++++++-----------
>  .../gcc.target/i386/avx512bw-pr100267-1.c     |  2 +-
>  .../gcc.target/i386/avx512bw-pr100267-b-2.c   |  3 +-
>  .../gcc.target/i386/avx512bw-pr100267-d-2.c   |  3 +-
>  .../gcc.target/i386/avx512bw-pr100267-q-2.c   |  3 +-
>  .../gcc.target/i386/avx512bw-pr100267-w-2.c   |  3 +-
>  .../gcc.target/i386/avx512f-vpcompressb-1.c   |  2 +-
>  .../gcc.target/i386/avx512f-vpcompressb-2.c   |  3 +-
>  .../gcc.target/i386/avx512f-vpcompressw-1.c   |  2 +-
>  .../gcc.target/i386/avx512f-vpcompressw-2.c   |  3 +-
>  .../gcc.target/i386/avx512f-vpexpandb-1.c     |  2 +-
>  .../gcc.target/i386/avx512f-vpexpandb-2.c     |  3 +-
>  .../gcc.target/i386/avx512f-vpexpandw-1.c     |  2 +-
>  .../gcc.target/i386/avx512f-vpexpandw-2.c     |  3 +-
>  .../gcc.target/i386/avx512f-vpshld-1.c        |  2 +-
>  .../gcc.target/i386/avx512f-vpshldd-2.c       |  3 +-
>  .../gcc.target/i386/avx512f-vpshldq-2.c       |  3 +-
>  .../gcc.target/i386/avx512f-vpshldv-1.c       |  2 +-
>  .../gcc.target/i386/avx512f-vpshldvd-2.c      |  3 +-
>  .../gcc.target/i386/avx512f-vpshldvq-2.c      |  3 +-
>  .../gcc.target/i386/avx512f-vpshldvw-2.c      |  3 +-
>  .../gcc.target/i386/avx512f-vpshrdd-2.c       |  3 +-
>  .../gcc.target/i386/avx512f-vpshrdq-2.c       |  3 +-
>  .../gcc.target/i386/avx512f-vpshrdv-1.c       |  2 +-
>  .../gcc.target/i386/avx512f-vpshrdvd-2.c      |  3 +-
>  .../gcc.target/i386/avx512f-vpshrdvq-2.c      |  3 +-
>  .../gcc.target/i386/avx512f-vpshrdvw-2.c      |  3 +-
>  .../gcc.target/i386/avx512f-vpshrdw-2.c       |  3 +-
>  .../gcc.target/i386/avx512vbmi2-vpshld-1.c    |  2 +-
>  .../gcc.target/i386/avx512vbmi2-vpshrd-1.c    |  2 +-
>  .../gcc.target/i386/avx512vl-vpcompressb-1.c  |  2 +-
>  .../gcc.target/i386/avx512vl-vpcompressb-2.c  |  2 +-
>  .../gcc.target/i386/avx512vl-vpcompressw-2.c  |  2 +-
>  .../gcc.target/i386/avx512vl-vpexpandb-1.c    |  2 +-
>  .../gcc.target/i386/avx512vl-vpexpandb-2.c    |  2 +-
>  .../gcc.target/i386/avx512vl-vpexpandw-1.c    |  2 +-
>  .../gcc.target/i386/avx512vl-vpexpandw-2.c    |  2 +-
>  .../gcc.target/i386/avx512vl-vpshldd-2.c      |  2 +-
>  .../gcc.target/i386/avx512vl-vpshldq-2.c      |  2 +-
>  .../gcc.target/i386/avx512vl-vpshldv-1.c      |  2 +-
>  .../gcc.target/i386/avx512vl-vpshldvd-2.c     |  2 +-
>  .../gcc.target/i386/avx512vl-vpshldvq-2.c     |  2 +-
>  .../gcc.target/i386/avx512vl-vpshldvw-2.c     |  2 +-
>  .../gcc.target/i386/avx512vl-vpshrdd-2.c      |  2 +-
>  .../gcc.target/i386/avx512vl-vpshrdq-2.c      |  2 +-
>  .../gcc.target/i386/avx512vl-vpshrdv-1.c      |  2 +-
>  .../gcc.target/i386/avx512vl-vpshrdvd-2.c     |  2 +-
>  .../gcc.target/i386/avx512vl-vpshrdvq-2.c     |  2 +-
>  .../gcc.target/i386/avx512vl-vpshrdvw-2.c     |  2 +-
>  .../gcc.target/i386/avx512vl-vpshrdw-2.c      |  2 +-
>  .../gcc.target/i386/avx512vlbw-pr100267-1.c   |  2 +-
>  .../gcc.target/i386/avx512vlbw-pr100267-b-2.c |  2 +-
>  .../gcc.target/i386/avx512vlbw-pr100267-w-2.c |  2 +-
>  57 files changed, 106 insertions(+), 160 deletions(-)
>
> diff --git a/gcc/common/config/i386/i386-common.cc b/gcc/common/config/i386/i386-common.cc
> index f78fc0a60e2..315db854862 100644
> --- a/gcc/common/config/i386/i386-common.cc
> +++ b/gcc/common/config/i386/i386-common.cc
> @@ -82,7 +82,7 @@ along with GCC; see the file COPYING3.  If not see
>  #define OPTION_MASK_ISA2_AVX5124FMAPS_SET OPTION_MASK_ISA2_AVX5124FMAPS
>  #define OPTION_MASK_ISA2_AVX5124VNNIW_SET OPTION_MASK_ISA2_AVX5124VNNIW
>  #define OPTION_MASK_ISA_AVX512VBMI2_SET \
> -  (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512F_SET)
> +  (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512BW_SET)
>  #define OPTION_MASK_ISA_AVX512FP16_SET OPTION_MASK_ISA_AVX512BW_SET
>  #define OPTION_MASK_ISA2_AVX512FP16_SET OPTION_MASK_ISA2_AVX512FP16
>  #define OPTION_MASK_ISA_AVX512VNNI_SET \
> @@ -232,7 +232,6 @@ along with GCC; see the file COPYING3.  If not see
>     | OPTION_MASK_ISA_AVX512PF_UNSET | OPTION_MASK_ISA_AVX512ER_UNSET \
>     | OPTION_MASK_ISA_AVX512DQ_UNSET | OPTION_MASK_ISA_AVX512BW_UNSET \
>     | OPTION_MASK_ISA_AVX512VL_UNSET | OPTION_MASK_ISA_AVX512IFMA_UNSET \
> -   | OPTION_MASK_ISA_AVX512VBMI2_UNSET \
>     | OPTION_MASK_ISA_AVX512VNNI_UNSET \
>     | OPTION_MASK_ISA_AVX512VPOPCNTDQ_UNSET)
>  #define OPTION_MASK_ISA_AVX512CD_UNSET OPTION_MASK_ISA_AVX512CD
> @@ -241,7 +240,7 @@ along with GCC; see the file COPYING3.  If not see
>  #define OPTION_MASK_ISA_AVX512DQ_UNSET OPTION_MASK_ISA_AVX512DQ
>  #define OPTION_MASK_ISA_AVX512BW_UNSET \
>    (OPTION_MASK_ISA_AVX512BW | OPTION_MASK_ISA_AVX512VBMI_UNSET \
> -   | OPTION_MASK_ISA_AVX512BITALG_UNSET)
> +   | OPTION_MASK_ISA_AVX512VBMI2_UNSET | OPTION_MASK_ISA_AVX512BITALG_UNSET)
>  #define OPTION_MASK_ISA_AVX512VL_UNSET OPTION_MASK_ISA_AVX512VL
>  #define OPTION_MASK_ISA_AVX512IFMA_UNSET OPTION_MASK_ISA_AVX512IFMA
>  #define OPTION_MASK_ISA2_AVXIFMA_UNSET OPTION_MASK_ISA2_AVXIFMA
> diff --git a/gcc/config/i386/avx512vbmi2intrin.h b/gcc/config/i386/avx512vbmi2intrin.h
> index 528d1935296..ca00f8a5f14 100644
> --- a/gcc/config/i386/avx512vbmi2intrin.h
> +++ b/gcc/config/i386/avx512vbmi2intrin.h
> @@ -326,18 +326,6 @@ _mm512_maskz_shldv_epi64 (__mmask8 __A, __m512i __B, __m512i __C, __m512i __D)
>                                                 (__v8di) __D, (__mmask8)__A);
>  }
>
> -#ifdef __DISABLE_AVX512VBMI2__
> -#undef __DISABLE_AVX512VBMI2__
> -
> -#pragma GCC pop_options
> -#endif /* __DISABLE_AVX512VBMI2__ */
> -
> -#if !defined(__AVX512VBMI2__) || !defined(__AVX512BW__)
> -#pragma GCC push_options
> -#pragma GCC target("avx512vbmi2,avx512bw")
> -#define __DISABLE_AVX512VBMI2BW__
> -#endif /* __AVX512VBMI2BW__ */
> -
>  extern __inline __m512i
>  __attribute__((__gnu_inline__, __always_inline__, __artificial__))
>  _mm512_mask_compress_epi8 (__m512i __A, __mmask64 __B, __m512i __C)
> @@ -548,10 +536,10 @@ _mm512_maskz_shldv_epi16 (__mmask32 __A, __m512i __B, __m512i __C, __m512i __D)
>                                 (__v32hi) __C, (__v32hi) __D, (__mmask32)__A);
>  }
>
> -#ifdef __DISABLE_AVX512VBMI2BW__
> -#undef __DISABLE_AVX512VBMI2BW__
> +#ifdef __DISABLE_AVX512VBMI2__
> +#undef __DISABLE_AVX512VBMI2__
>
>  #pragma GCC pop_options
> -#endif /* __DISABLE_AVX512VBMI2BW__ */
> +#endif /* __DISABLE_AVX512VBMI2__ */
>
>  #endif /* __AVX512VBMI2INTRIN_H_INCLUDED */
> diff --git a/gcc/config/i386/avx512vbmi2vlintrin.h b/gcc/config/i386/avx512vbmi2vlintrin.h
> index 86efca2b227..92cae8cf02b 100644
> --- a/gcc/config/i386/avx512vbmi2vlintrin.h
> +++ b/gcc/config/i386/avx512vbmi2vlintrin.h
> @@ -957,21 +957,6 @@ _mm_maskz_shldv_epi64 (__mmask8 __A, __m128i __B, __m128i __C, __m128i __D)
>                                                 (__v2di) __D, (__mmask8)__A);
>  }
>
> -
> -
> -
> -#ifdef __DISABLE_AVX512VBMI2VL__
> -#undef __DISABLE_AVX512VBMI2VL__
> -#pragma GCC pop_options
> -#endif /* __DISABLE_AVX512VBMIVL__ */
> -
> -#if !defined(__AVX512VL__) || !defined(__AVX512VBMI2__) || \
> -    !defined(__AVX512BW__)
> -#pragma GCC push_options
> -#pragma GCC target("avx512vbmi2,avx512vl,avx512bw")
> -#define __DISABLE_AVX512VBMI2VLBW__
> -#endif /* __AVX512VBMIVLBW__ */
> -
>  extern __inline __m256i
>  __attribute__((__gnu_inline__, __always_inline__, __artificial__))
>  _mm256_mask_compress_epi8 (__m256i __A, __mmask32 __B, __m256i __C)
> @@ -1029,9 +1014,9 @@ _mm256_maskz_expandloadu_epi8 (__mmask32 __A, const void * __B)
>                         (__v32qi) _mm256_setzero_si256 (), (__mmask32) __A);
>  }
>
> -#ifdef __DISABLE_AVX512VBMI2VLBW__
> -#undef __DISABLE_AVX512VBMI2VLBW__
> +#ifdef __DISABLE_AVX512VBMI2VL__
> +#undef __DISABLE_AVX512VBMI2VL__
>  #pragma GCC pop_options
> -#endif /* __DISABLE_AVX512VBMIVLBW__ */
> +#endif /* __DISABLE_AVX512VBMIVL__ */
>
>  #endif /* _AVX512VBMIVLINTRIN_H_INCLUDED */
> diff --git a/gcc/config/i386/i386-builtin.def b/gcc/config/i386/i386-builtin.def
> index c4167307992..1429414072a 100644
> --- a/gcc/config/i386/i386-builtin.def
> +++ b/gcc/config/i386/i386-builtin.def
> @@ -430,20 +430,20 @@ BDESC (OPTION_MASK_ISA_PKU, 0, CODE_FOR_rdpkru,  "__builtin_ia32_rdpkru", IX86_B
>  BDESC (OPTION_MASK_ISA_PKU, 0, CODE_FOR_wrpkru,  "__builtin_ia32_wrpkru", IX86_BUILTIN_WRPKRU, UNKNOWN, (int) VOID_FTYPE_UNSIGNED)
>
>  /* VBMI2 */
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_compressstorev64qi_mask, "__builtin_ia32_compressstoreuqi512_mask", IX86_BUILTIN_PCOMPRESSBSTORE512, UNKNOWN, (int) VOID_FTYPE_PV64QI_V64QI_UDI)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_compressstorev32hi_mask, "__builtin_ia32_compressstoreuhi512_mask", IX86_BUILTIN_PCOMPRESSWSTORE512, UNKNOWN, (int) VOID_FTYPE_PV32HI_V32HI_USI)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL | OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_compressstorev32qi_mask, "__builtin_ia32_compressstoreuqi256_mask", IX86_BUILTIN_PCOMPRESSBSTORE256, UNKNOWN, (int) VOID_FTYPE_PV32QI_V32QI_USI)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, 0, CODE_FOR_compressstorev64qi_mask, "__builtin_ia32_compressstoreuqi512_mask", IX86_BUILTIN_PCOMPRESSBSTORE512, UNKNOWN, (int) VOID_FTYPE_PV64QI_V64QI_UDI)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, 0, CODE_FOR_compressstorev32hi_mask, "__builtin_ia32_compressstoreuhi512_mask", IX86_BUILTIN_PCOMPRESSWSTORE512, UNKNOWN, (int) VOID_FTYPE_PV32HI_V32HI_USI)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_compressstorev32qi_mask, "__builtin_ia32_compressstoreuqi256_mask", IX86_BUILTIN_PCOMPRESSBSTORE256, UNKNOWN, (int) VOID_FTYPE_PV32QI_V32QI_USI)
>  BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_compressstorev16qi_mask, "__builtin_ia32_compressstoreuqi128_mask", IX86_BUILTIN_PCOMPRESSBSTORE128, UNKNOWN, (int) VOID_FTYPE_PV16QI_V16QI_UHI)
>  BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_compressstorev16hi_mask, "__builtin_ia32_compressstoreuhi256_mask", IX86_BUILTIN_PCOMPRESSWSTORE256, UNKNOWN, (int) VOID_FTYPE_PV16HI_V16HI_UHI)
>  BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_compressstorev8hi_mask, "__builtin_ia32_compressstoreuhi128_mask", IX86_BUILTIN_PCOMPRESSWSTORE128, UNKNOWN, (int) VOID_FTYPE_PV8HI_V8HI_UQI)
>
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_expandv64qi_mask, "__builtin_ia32_expandloadqi512_mask", IX86_BUILTIN_PEXPANDBLOAD512, UNKNOWN, (int) V64QI_FTYPE_PCV64QI_V64QI_UDI)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_expandv64qi_maskz, "__builtin_ia32_expandloadqi512_maskz", IX86_BUILTIN_PEXPANDBLOAD512Z, UNKNOWN, (int) V64QI_FTYPE_PCV64QI_V64QI_UDI)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_expandv32hi_mask, "__builtin_ia32_expandloadhi512_mask", IX86_BUILTIN_PEXPANDWLOAD512, UNKNOWN, (int) V32HI_FTYPE_PCV32HI_V32HI_USI)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_expandv32hi_maskz, "__builtin_ia32_expandloadhi512_maskz", IX86_BUILTIN_PEXPANDWLOAD512Z, UNKNOWN, (int) V32HI_FTYPE_PCV32HI_V32HI_USI)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, 0, CODE_FOR_expandv64qi_mask, "__builtin_ia32_expandloadqi512_mask", IX86_BUILTIN_PEXPANDBLOAD512, UNKNOWN, (int) V64QI_FTYPE_PCV64QI_V64QI_UDI)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, 0, CODE_FOR_expandv64qi_maskz, "__builtin_ia32_expandloadqi512_maskz", IX86_BUILTIN_PEXPANDBLOAD512Z, UNKNOWN, (int) V64QI_FTYPE_PCV64QI_V64QI_UDI)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, 0, CODE_FOR_expandv32hi_mask, "__builtin_ia32_expandloadhi512_mask", IX86_BUILTIN_PEXPANDWLOAD512, UNKNOWN, (int) V32HI_FTYPE_PCV32HI_V32HI_USI)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, 0, CODE_FOR_expandv32hi_maskz, "__builtin_ia32_expandloadhi512_maskz", IX86_BUILTIN_PEXPANDWLOAD512Z, UNKNOWN, (int) V32HI_FTYPE_PCV32HI_V32HI_USI)
>
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL | OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_expandv32qi_mask, "__builtin_ia32_expandloadqi256_mask", IX86_BUILTIN_PEXPANDBLOAD256, UNKNOWN, (int) V32QI_FTYPE_PCV32QI_V32QI_USI)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL | OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_expandv32qi_maskz, "__builtin_ia32_expandloadqi256_maskz", IX86_BUILTIN_PEXPANDBLOAD256Z, UNKNOWN, (int) V32QI_FTYPE_PCV32QI_V32QI_USI)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_expandv32qi_mask, "__builtin_ia32_expandloadqi256_mask", IX86_BUILTIN_PEXPANDBLOAD256, UNKNOWN, (int) V32QI_FTYPE_PCV32QI_V32QI_USI)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_expandv32qi_maskz, "__builtin_ia32_expandloadqi256_maskz", IX86_BUILTIN_PEXPANDBLOAD256Z, UNKNOWN, (int) V32QI_FTYPE_PCV32QI_V32QI_USI)
>  BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_expandv16hi_mask, "__builtin_ia32_expandloadhi256_mask", IX86_BUILTIN_PEXPANDWLOAD256, UNKNOWN, (int) V16HI_FTYPE_PCV16HI_V16HI_UHI)
>  BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_expandv16hi_maskz, "__builtin_ia32_expandloadhi256_maskz", IX86_BUILTIN_PEXPANDWLOAD256Z, UNKNOWN, (int) V16HI_FTYPE_PCV16HI_V16HI_UHI)
>
> @@ -2553,18 +2553,18 @@ BDESC (OPTION_MASK_ISA_AVX512VBMI | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_avx512
>  BDESC (OPTION_MASK_ISA_AVX512VBMI | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_avx512vl_vpermi2varv16qi3_mask, "__builtin_ia32_vpermi2varqi128_mask", IX86_BUILTIN_VPERMI2VARQI128, UNKNOWN, (int) V16QI_FTYPE_V16QI_V16QI_V16QI_UHI)
>
>  /* VBMI2 */
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_compressv64qi_mask, "__builtin_ia32_compressqi512_mask", IX86_BUILTIN_PCOMPRESSB512, UNKNOWN, (int) V64QI_FTYPE_V64QI_V64QI_UDI)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_compressv32hi_mask, "__builtin_ia32_compresshi512_mask", IX86_BUILTIN_PCOMPRESSW512, UNKNOWN, (int) V32HI_FTYPE_V32HI_V32HI_USI)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL | OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_compressv32qi_mask, "__builtin_ia32_compressqi256_mask", IX86_BUILTIN_PCOMPRESSB256, UNKNOWN, (int) V32QI_FTYPE_V32QI_V32QI_USI)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, 0, CODE_FOR_compressv64qi_mask, "__builtin_ia32_compressqi512_mask", IX86_BUILTIN_PCOMPRESSB512, UNKNOWN, (int) V64QI_FTYPE_V64QI_V64QI_UDI)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, 0, CODE_FOR_compressv32hi_mask, "__builtin_ia32_compresshi512_mask", IX86_BUILTIN_PCOMPRESSW512, UNKNOWN, (int) V32HI_FTYPE_V32HI_V32HI_USI)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_compressv32qi_mask, "__builtin_ia32_compressqi256_mask", IX86_BUILTIN_PCOMPRESSB256, UNKNOWN, (int) V32QI_FTYPE_V32QI_V32QI_USI)
>  BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_compressv16qi_mask, "__builtin_ia32_compressqi128_mask", IX86_BUILTIN_PCOMPRESSB128, UNKNOWN, (int) V16QI_FTYPE_V16QI_V16QI_UHI)
>  BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_compressv16hi_mask, "__builtin_ia32_compresshi256_mask", IX86_BUILTIN_PCOMPRESSW256, UNKNOWN, (int) V16HI_FTYPE_V16HI_V16HI_UHI)
>  BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_compressv8hi_mask, "__builtin_ia32_compresshi128_mask", IX86_BUILTIN_PCOMPRESSW128, UNKNOWN, (int) V8HI_FTYPE_V8HI_V8HI_UQI)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_expandv64qi_mask, "__builtin_ia32_expandqi512_mask", IX86_BUILTIN_PEXPANDB512, UNKNOWN, (int) V64QI_FTYPE_V64QI_V64QI_UDI)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_expandv64qi_maskz, "__builtin_ia32_expandqi512_maskz", IX86_BUILTIN_PEXPANDB512Z, UNKNOWN, (int) V64QI_FTYPE_V64QI_V64QI_UDI)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_expandv32hi_mask, "__builtin_ia32_expandhi512_mask", IX86_BUILTIN_PEXPANDW512, UNKNOWN, (int) V32HI_FTYPE_V32HI_V32HI_USI)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_expandv32hi_maskz, "__builtin_ia32_expandhi512_maskz", IX86_BUILTIN_PEXPANDW512Z, UNKNOWN, (int) V32HI_FTYPE_V32HI_V32HI_USI)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL | OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_expandv32qi_mask, "__builtin_ia32_expandqi256_mask", IX86_BUILTIN_PEXPANDB256, UNKNOWN, (int) V32QI_FTYPE_V32QI_V32QI_USI)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL | OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_expandv32qi_maskz, "__builtin_ia32_expandqi256_maskz", IX86_BUILTIN_PEXPANDB256Z, UNKNOWN, (int) V32QI_FTYPE_V32QI_V32QI_USI)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, 0, CODE_FOR_expandv64qi_mask, "__builtin_ia32_expandqi512_mask", IX86_BUILTIN_PEXPANDB512, UNKNOWN, (int) V64QI_FTYPE_V64QI_V64QI_UDI)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, 0, CODE_FOR_expandv64qi_maskz, "__builtin_ia32_expandqi512_maskz", IX86_BUILTIN_PEXPANDB512Z, UNKNOWN, (int) V64QI_FTYPE_V64QI_V64QI_UDI)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, 0, CODE_FOR_expandv32hi_mask, "__builtin_ia32_expandhi512_mask", IX86_BUILTIN_PEXPANDW512, UNKNOWN, (int) V32HI_FTYPE_V32HI_V32HI_USI)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, 0, CODE_FOR_expandv32hi_maskz, "__builtin_ia32_expandhi512_maskz", IX86_BUILTIN_PEXPANDW512Z, UNKNOWN, (int) V32HI_FTYPE_V32HI_V32HI_USI)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_expandv32qi_mask, "__builtin_ia32_expandqi256_mask", IX86_BUILTIN_PEXPANDB256, UNKNOWN, (int) V32QI_FTYPE_V32QI_V32QI_USI)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_expandv32qi_maskz, "__builtin_ia32_expandqi256_maskz", IX86_BUILTIN_PEXPANDB256Z, UNKNOWN, (int) V32QI_FTYPE_V32QI_V32QI_USI)
>  BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_expandv16qi_mask, "__builtin_ia32_expandqi128_mask", IX86_BUILTIN_PEXPANDB128, UNKNOWN, (int) V16QI_FTYPE_V16QI_V16QI_UHI)
>  BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_expandv16qi_maskz, "__builtin_ia32_expandqi128_maskz", IX86_BUILTIN_PEXPANDB128Z, UNKNOWN, (int) V16QI_FTYPE_V16QI_V16QI_UHI)
>  BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_expandv16hi_mask, "__builtin_ia32_expandhi256_mask", IX86_BUILTIN_PEXPANDW256, UNKNOWN, (int) V16HI_FTYPE_V16HI_V16HI_UHI)
> @@ -2572,7 +2572,7 @@ BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_expan
>  BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_expandv8hi_mask, "__builtin_ia32_expandhi128_mask", IX86_BUILTIN_PEXPANDW128, UNKNOWN, (int) V8HI_FTYPE_V8HI_V8HI_UQI)
>  BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_expandv8hi_maskz, "__builtin_ia32_expandhi128_maskz", IX86_BUILTIN_PEXPANDW128Z, UNKNOWN, (int) V8HI_FTYPE_V8HI_V8HI_UQI)
>  BDESC (OPTION_MASK_ISA_AVX512VBMI2, 0, CODE_FOR_vpshrd_v32hi, "__builtin_ia32_vpshrd_v32hi", IX86_BUILTIN_VPSHRDV32HI, UNKNOWN, (int) V32HI_FTYPE_V32HI_V32HI_INT)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_vpshrd_v32hi_mask, "__builtin_ia32_vpshrd_v32hi_mask", IX86_BUILTIN_VPSHRDV32HI_MASK, UNKNOWN, (int) V32HI_FTYPE_V32HI_V32HI_INT_V32HI_INT)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, 0, CODE_FOR_vpshrd_v32hi_mask, "__builtin_ia32_vpshrd_v32hi_mask", IX86_BUILTIN_VPSHRDV32HI_MASK, UNKNOWN, (int) V32HI_FTYPE_V32HI_V32HI_INT_V32HI_INT)
>  BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshrd_v16hi, "__builtin_ia32_vpshrd_v16hi", IX86_BUILTIN_VPSHRDV16HI, UNKNOWN, (int) V16HI_FTYPE_V16HI_V16HI_INT)
>  BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshrd_v16hi_mask, "__builtin_ia32_vpshrd_v16hi_mask", IX86_BUILTIN_VPSHRDV16HI_MASK, UNKNOWN, (int) V16HI_FTYPE_V16HI_V16HI_INT_V16HI_INT)
>  BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshrd_v8hi, "__builtin_ia32_vpshrd_v8hi", IX86_BUILTIN_VPSHRDV8HI, UNKNOWN, (int) V8HI_FTYPE_V8HI_V8HI_INT)
> @@ -2590,7 +2590,7 @@ BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshr
>  BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshrd_v2di, "__builtin_ia32_vpshrd_v2di", IX86_BUILTIN_VPSHRDV2DI, UNKNOWN, (int) V2DI_FTYPE_V2DI_V2DI_INT)
>  BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshrd_v2di_mask, "__builtin_ia32_vpshrd_v2di_mask", IX86_BUILTIN_VPSHRDV2DI_MASK, UNKNOWN, (int) V2DI_FTYPE_V2DI_V2DI_INT_V2DI_INT)
>  BDESC (OPTION_MASK_ISA_AVX512VBMI2, 0, CODE_FOR_vpshld_v32hi, "__builtin_ia32_vpshld_v32hi", IX86_BUILTIN_VPSHLDV32HI, UNKNOWN, (int) V32HI_FTYPE_V32HI_V32HI_INT)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_vpshld_v32hi_mask, "__builtin_ia32_vpshld_v32hi_mask", IX86_BUILTIN_VPSHLDV32HI_MASK, UNKNOWN, (int) V32HI_FTYPE_V32HI_V32HI_INT_V32HI_INT)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, 0, CODE_FOR_vpshld_v32hi_mask, "__builtin_ia32_vpshld_v32hi_mask", IX86_BUILTIN_VPSHLDV32HI_MASK, UNKNOWN, (int) V32HI_FTYPE_V32HI_V32HI_INT_V32HI_INT)
>  BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshld_v16hi, "__builtin_ia32_vpshld_v16hi", IX86_BUILTIN_VPSHLDV16HI, UNKNOWN, (int) V16HI_FTYPE_V16HI_V16HI_INT)
>  BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshld_v16hi_mask, "__builtin_ia32_vpshld_v16hi_mask", IX86_BUILTIN_VPSHLDV16HI_MASK, UNKNOWN, (int) V16HI_FTYPE_V16HI_V16HI_INT_V16HI_INT)
>  BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshld_v8hi, "__builtin_ia32_vpshld_v8hi", IX86_BUILTIN_VPSHLDV8HI, UNKNOWN, (int) V8HI_FTYPE_V8HI_V8HI_INT)
> @@ -2609,8 +2609,8 @@ BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshl
>  BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshld_v2di_mask, "__builtin_ia32_vpshld_v2di_mask", IX86_BUILTIN_VPSHLDV2DI_MASK, UNKNOWN, (int) V2DI_FTYPE_V2DI_V2DI_INT_V2DI_INT)
>
>  BDESC (OPTION_MASK_ISA_AVX512VBMI2, 0, CODE_FOR_vpshrdv_v32hi, "__builtin_ia32_vpshrdv_v32hi", IX86_BUILTIN_VPSHRDVV32HI, UNKNOWN, (int) V32HI_FTYPE_V32HI_V32HI_V32HI)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_vpshrdv_v32hi_mask, "__builtin_ia32_vpshrdv_v32hi_mask", IX86_BUILTIN_VPSHRDVV32HI_MASK, UNKNOWN, (int) V32HI_FTYPE_V32HI_V32HI_V32HI_USI)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_vpshrdv_v32hi_maskz, "__builtin_ia32_vpshrdv_v32hi_maskz", IX86_BUILTIN_VPSHRDVV32HI_MASKZ, UNKNOWN, (int) V32HI_FTYPE_V32HI_V32HI_V32HI_USI)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, 0, CODE_FOR_vpshrdv_v32hi_mask, "__builtin_ia32_vpshrdv_v32hi_mask", IX86_BUILTIN_VPSHRDVV32HI_MASK, UNKNOWN, (int) V32HI_FTYPE_V32HI_V32HI_V32HI_USI)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, 0, CODE_FOR_vpshrdv_v32hi_maskz, "__builtin_ia32_vpshrdv_v32hi_maskz", IX86_BUILTIN_VPSHRDVV32HI_MASKZ, UNKNOWN, (int) V32HI_FTYPE_V32HI_V32HI_V32HI_USI)
>  BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshrdv_v16hi, "__builtin_ia32_vpshrdv_v16hi", IX86_BUILTIN_VPSHRDVV16HI, UNKNOWN, (int) V16HI_FTYPE_V16HI_V16HI_V16HI)
>  BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshrdv_v16hi_mask, "__builtin_ia32_vpshrdv_v16hi_mask", IX86_BUILTIN_VPSHRDVV16HI_MASK, UNKNOWN, (int) V16HI_FTYPE_V16HI_V16HI_V16HI_UHI)
>  BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshrdv_v16hi_maskz, "__builtin_ia32_vpshrdv_v16hi_maskz", IX86_BUILTIN_VPSHRDVV16HI_MASKZ, UNKNOWN, (int) V16HI_FTYPE_V16HI_V16HI_V16HI_UHI)
> @@ -2637,8 +2637,8 @@ BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshr
>  BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshrdv_v2di_maskz, "__builtin_ia32_vpshrdv_v2di_maskz", IX86_BUILTIN_VPSHRDVV2DI_MASKZ, UNKNOWN, (int) V2DI_FTYPE_V2DI_V2DI_V2DI_UQI)
>
>  BDESC (OPTION_MASK_ISA_AVX512VBMI2, 0, CODE_FOR_vpshldv_v32hi, "__builtin_ia32_vpshldv_v32hi", IX86_BUILTIN_VPSHLDVV32HI, UNKNOWN, (int) V32HI_FTYPE_V32HI_V32HI_V32HI)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_vpshldv_v32hi_mask, "__builtin_ia32_vpshldv_v32hi_mask", IX86_BUILTIN_VPSHLDVV32HI_MASK, UNKNOWN, (int) V32HI_FTYPE_V32HI_V32HI_V32HI_USI)
> -BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_vpshldv_v32hi_maskz, "__builtin_ia32_vpshldv_v32hi_maskz", IX86_BUILTIN_VPSHLDVV32HI_MASKZ, UNKNOWN, (int) V32HI_FTYPE_V32HI_V32HI_V32HI_USI)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, 0, CODE_FOR_vpshldv_v32hi_mask, "__builtin_ia32_vpshldv_v32hi_mask", IX86_BUILTIN_VPSHLDVV32HI_MASK, UNKNOWN, (int) V32HI_FTYPE_V32HI_V32HI_V32HI_USI)
> +BDESC (OPTION_MASK_ISA_AVX512VBMI2, 0, CODE_FOR_vpshldv_v32hi_maskz, "__builtin_ia32_vpshldv_v32hi_maskz", IX86_BUILTIN_VPSHLDVV32HI_MASKZ, UNKNOWN, (int) V32HI_FTYPE_V32HI_V32HI_V32HI_USI)
>  BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshldv_v16hi, "__builtin_ia32_vpshldv_v16hi", IX86_BUILTIN_VPSHLDVV16HI, UNKNOWN, (int) V16HI_FTYPE_V16HI_V16HI_V16HI)
>  BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshldv_v16hi_mask, "__builtin_ia32_vpshldv_v16hi_mask", IX86_BUILTIN_VPSHLDVV16HI_MASK, UNKNOWN, (int) V16HI_FTYPE_V16HI_V16HI_V16HI_UHI)
>  BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshldv_v16hi_maskz, "__builtin_ia32_vpshldv_v16hi_maskz", IX86_BUILTIN_VPSHLDVV16HI_MASKZ, UNKNOWN, (int) V16HI_FTYPE_V16HI_V16HI_V16HI_UHI)
> diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
> index deb2d747ec1..3bb78b26758 100644
> --- a/gcc/config/i386/sse.md
> +++ b/gcc/config/i386/sse.md
> @@ -275,12 +275,6 @@
>     V32HF (V16HF "TARGET_AVX512VL") (V8HF "TARGET_AVX512VL")
>     V32BF (V16BF "TARGET_AVX512VL") (V8BF "TARGET_AVX512VL")])
>
> -;; Same iterator, but without supposed TARGET_AVX512BW
> -(define_mode_iterator VI12_AVX512VLBW
> -  [(V64QI "TARGET_AVX512BW") (V16QI "TARGET_AVX512VL")
> -   (V32QI "TARGET_AVX512VL && TARGET_AVX512BW") (V32HI "TARGET_AVX512BW")
> -   (V16HI "TARGET_AVX512VL") (V8HI "TARGET_AVX512VL")])
> -
>  (define_mode_iterator VI1_AVX512VL
>    [V64QI (V16QI "TARGET_AVX512VL") (V32QI "TARGET_AVX512VL")])
>
> @@ -863,16 +857,15 @@
>     (V4DI "TARGET_AVX512VL") (V4DF "TARGET_AVX512VL")
>     (V4SI "TARGET_AVX512VL") (V4SF "TARGET_AVX512VL")
>     (V2DI "TARGET_AVX512VL") (V2DF "TARGET_AVX512VL")])
> -(define_mode_iterator VI12_VI48F_AVX512VLBW
> +(define_mode_iterator VI12_VI48F_AVX512VL
>    [(V16SI "TARGET_AVX512F") (V16SF "TARGET_AVX512F")
>     (V8DI "TARGET_AVX512F") (V8DF "TARGET_AVX512F")
>     (V8SI "TARGET_AVX512VL") (V8SF "TARGET_AVX512VL")
>     (V4DI "TARGET_AVX512VL") (V4DF "TARGET_AVX512VL")
>     (V4SI "TARGET_AVX512VL") (V4SF "TARGET_AVX512VL")
>     (V2DI "TARGET_AVX512VL") (V2DF "TARGET_AVX512VL")
> -   (V64QI "TARGET_AVX512BW") (V16QI "TARGET_AVX512VL")
> -   (V32QI "TARGET_AVX512VL && TARGET_AVX512BW") (V32HI "TARGET_AVX512BW")
> -   (V16HI "TARGET_AVX512VL") (V8HI "TARGET_AVX512VL")])
> +   V64QI (V16QI "TARGET_AVX512VL") (V32QI "TARGET_AVX512VL")
> +   V32HI (V16HI "TARGET_AVX512VL") (V8HI "TARGET_AVX512VL")])
>
>  (define_mode_iterator VI48F_256 [V8SI V8SF V4DI V4DF])
>
> @@ -27453,10 +27446,10 @@
>     (set_attr "mode" "<sseinsnmode>")])
>
>  (define_insn "compress<mode>_mask"
> -  [(set (match_operand:VI12_AVX512VLBW 0 "register_operand" "=v")
> -       (unspec:VI12_AVX512VLBW
> -         [(match_operand:VI12_AVX512VLBW 1 "register_operand" "v")
> -          (match_operand:VI12_AVX512VLBW 2 "nonimm_or_0_operand" "0C")
> +  [(set (match_operand:VI12_AVX512VL 0 "register_operand" "=v")
> +       (unspec:VI12_AVX512VL
> +         [(match_operand:VI12_AVX512VL 1 "register_operand" "v")
> +          (match_operand:VI12_AVX512VL 2 "nonimm_or_0_operand" "0C")
>            (match_operand:<avx512fmaskmode> 3 "register_operand" "Yk")]
>           UNSPEC_COMPRESS))]
>    "TARGET_AVX512VBMI2"
> @@ -27480,9 +27473,9 @@
>     (set_attr "mode" "<sseinsnmode>")])
>
>  (define_insn "compressstore<mode>_mask"
> -  [(set (match_operand:VI12_AVX512VLBW 0 "memory_operand" "=m")
> -       (unspec:VI12_AVX512VLBW
> -         [(match_operand:VI12_AVX512VLBW 1 "register_operand" "x")
> +  [(set (match_operand:VI12_AVX512VL 0 "memory_operand" "=m")
> +       (unspec:VI12_AVX512VL
> +         [(match_operand:VI12_AVX512VL 1 "register_operand" "x")
>            (match_dup 0)
>            (match_operand:<avx512fmaskmode> 2 "register_operand" "Yk")]
>           UNSPEC_COMPRESS_STORE))]
> @@ -27518,10 +27511,10 @@
>     (set_attr "mode" "<sseinsnmode>")])
>
>  (define_insn "expand<mode>_mask"
> -  [(set (match_operand:VI12_AVX512VLBW 0 "register_operand" "=v,v")
> -       (unspec:VI12_AVX512VLBW
> -         [(match_operand:VI12_AVX512VLBW 1 "nonimmediate_operand" "v,m")
> -          (match_operand:VI12_AVX512VLBW 2 "nonimm_or_0_operand" "0C,0C")
> +  [(set (match_operand:VI12_AVX512VL 0 "register_operand" "=v,v")
> +       (unspec:VI12_AVX512VL
> +         [(match_operand:VI12_AVX512VL 1 "nonimmediate_operand" "v,m")
> +          (match_operand:VI12_AVX512VL 2 "nonimm_or_0_operand" "0C,0C")
>            (match_operand:<avx512fmaskmode> 3 "register_operand" "Yk,Yk")]
>           UNSPEC_EXPAND))]
>    "TARGET_AVX512VBMI2"
> @@ -27532,10 +27525,10 @@
>     (set_attr "mode" "<sseinsnmode>")])
>
>  (define_insn_and_split "*expand<mode>_mask"
> -  [(set (match_operand:VI12_VI48F_AVX512VLBW 0 "register_operand")
> -       (unspec:VI12_VI48F_AVX512VLBW
> -         [(match_operand:VI12_VI48F_AVX512VLBW 1 "nonimmediate_operand")
> -          (match_operand:VI12_VI48F_AVX512VLBW 2 "nonimm_or_0_operand")
> +  [(set (match_operand:VI12_VI48F_AVX512VL 0 "register_operand")
> +       (unspec:VI12_VI48F_AVX512VL
> +         [(match_operand:VI12_VI48F_AVX512VL 1 "nonimmediate_operand")
> +          (match_operand:VI12_VI48F_AVX512VL 2 "nonimm_or_0_operand")
>            (match_operand 3 "const_int_operand")]
>           UNSPEC_EXPAND))]
>    "ix86_pre_reload_split ()
> @@ -27588,10 +27581,10 @@
>  })
>
>  (define_expand "expand<mode>_maskz"
> -  [(set (match_operand:VI12_AVX512VLBW 0 "register_operand")
> -       (unspec:VI12_AVX512VLBW
> -         [(match_operand:VI12_AVX512VLBW 1 "nonimmediate_operand")
> -          (match_operand:VI12_AVX512VLBW 2 "nonimm_or_0_operand")
> +  [(set (match_operand:VI12_AVX512VL 0 "register_operand")
> +       (unspec:VI12_AVX512VL
> +         [(match_operand:VI12_AVX512VL 1 "nonimmediate_operand")
> +          (match_operand:VI12_AVX512VL 2 "nonimm_or_0_operand")
>            (match_operand:<avx512fmaskmode> 3 "register_operand")]
>           UNSPEC_EXPAND))]
>    "TARGET_AVX512VBMI2"
> diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-pr100267-1.c b/gcc/testsuite/gcc.target/i386/avx512bw-pr100267-1.c
> index ce83d63bc73..33af0d92925 100644
> --- a/gcc/testsuite/gcc.target/i386/avx512bw-pr100267-1.c
> +++ b/gcc/testsuite/gcc.target/i386/avx512bw-pr100267-1.c
> @@ -1,5 +1,5 @@
>  /* { dg-do compile } */
> -/* { dg-options "-mavx512bw -mavx512vbmi2 -O2" } */
> +/* { dg-options "-mavx512vbmi2 -O2" } */
>  /* { dg-final { scan-assembler-times "vpexpandb\[ \\t\]+\[^\{\n\]*\\(\[^\n\]*%zmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)"  1 } } */
>  /* { dg-final { scan-assembler-times "vpexpandb\[ \\t\]+\[^\{\n\(]*%zmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)"  1 } } */
>  /* { dg-final { scan-assembler-times "vpexpandw\[ \\t\]+\[^\{\n\]*\\(\[^\n\]*%zmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)"  1 } } */
> diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-pr100267-b-2.c b/gcc/testsuite/gcc.target/i386/avx512bw-pr100267-b-2.c
> index 424b485a203..161c2178349 100644
> --- a/gcc/testsuite/gcc.target/i386/avx512bw-pr100267-b-2.c
> +++ b/gcc/testsuite/gcc.target/i386/avx512bw-pr100267-b-2.c
> @@ -1,6 +1,5 @@
>  /* { dg-do run } */
> -/* { dg-options "-O2 -mavx512f -mavx512vbmi2 -mavx512bw" } */
> -/* { dg-require-effective-target avx512f } */
> +/* { dg-options "-O2 -mavx512vbmi2" } */
>  /* { dg-require-effective-target avx512vbmi2 } */
>
>  #define AVX512F
> diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-pr100267-d-2.c b/gcc/testsuite/gcc.target/i386/avx512bw-pr100267-d-2.c
> index 24790b20cf1..c7416dab97b 100644
> --- a/gcc/testsuite/gcc.target/i386/avx512bw-pr100267-d-2.c
> +++ b/gcc/testsuite/gcc.target/i386/avx512bw-pr100267-d-2.c
> @@ -1,6 +1,5 @@
>  /* { dg-do run } */
> -/* { dg-options "-O2 -mavx512f -mavx512vbmi2 -mavx512bw" } */
> -/* { dg-require-effective-target avx512f } */
> +/* { dg-options "-O2 -mavx512vbmi2" } */
>  /* { dg-require-effective-target avx512vbmi2 } */
>
>  #define AVX512F
> diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-pr100267-q-2.c b/gcc/testsuite/gcc.target/i386/avx512bw-pr100267-q-2.c
> index 119b50e6f79..797ee902510 100644
> --- a/gcc/testsuite/gcc.target/i386/avx512bw-pr100267-q-2.c
> +++ b/gcc/testsuite/gcc.target/i386/avx512bw-pr100267-q-2.c
> @@ -1,6 +1,5 @@
>  /* { dg-do run } */
> -/* { dg-options "-O2 -mavx512f -mavx512vbmi2 -mavx512bw" } */
> -/* { dg-require-effective-target avx512f } */
> +/* { dg-options "-O2 -mavx512vbmi2" } */
>  /* { dg-require-effective-target avx512vbmi2 } */
>
>  #define AVX512F
> diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-pr100267-w-2.c b/gcc/testsuite/gcc.target/i386/avx512bw-pr100267-w-2.c
> index 926e04d4df6..94660f26993 100644
> --- a/gcc/testsuite/gcc.target/i386/avx512bw-pr100267-w-2.c
> +++ b/gcc/testsuite/gcc.target/i386/avx512bw-pr100267-w-2.c
> @@ -1,6 +1,5 @@
>  /* { dg-do run } */
> -/* { dg-options "-O2 -mavx512f -mavx512vbmi2 -mavx512bw" } */
> -/* { dg-require-effective-target avx512f } */
> +/* { dg-options "-O2 -mavx512vbmi2" } */
>  /* { dg-require-effective-target avx512vbmi2 } */
>
>  #define AVX512F
> diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpcompressb-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpcompressb-1.c
> index c449d9536b9..0ee8fe472e7 100644
> --- a/gcc/testsuite/gcc.target/i386/avx512f-vpcompressb-1.c
> +++ b/gcc/testsuite/gcc.target/i386/avx512f-vpcompressb-1.c
> @@ -1,5 +1,5 @@
>  /* { dg-do compile } */
> -/* { dg-options "-mavx512f -mavx512vbmi2 -mavx512bw -O2" } */
> +/* { dg-options "-mavx512vbmi2 -O2" } */
>  /* { dg-final { scan-assembler-times "vpcompressb\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
>  /* { dg-final { scan-assembler-times "vpcompressb\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */
>  /* { dg-final { scan-assembler-times "vpcompressb\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\]*\\)\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
> diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpcompressb-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpcompressb-2.c
> index 4f159630504..773fce21ccf 100644
> --- a/gcc/testsuite/gcc.target/i386/avx512f-vpcompressb-2.c
> +++ b/gcc/testsuite/gcc.target/i386/avx512f-vpcompressb-2.c
> @@ -1,6 +1,5 @@
>  /* { dg-do run } */
> -/* { dg-options "-O2 -mavx512f -mavx512bw -mavx512vbmi2" } */
> -/* { dg-require-effective-target avx512f } */
> +/* { dg-options "-O2 -mavx512vbmi2" } */
>  /* { dg-require-effective-target avx512vbmi2 } */
>
>  #define AVX512F
> diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpcompressw-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpcompressw-1.c
> index 2da92a4758b..11f4ba44723 100644
> --- a/gcc/testsuite/gcc.target/i386/avx512f-vpcompressw-1.c
> +++ b/gcc/testsuite/gcc.target/i386/avx512f-vpcompressw-1.c
> @@ -1,5 +1,5 @@
>  /* { dg-do compile } */
> -/* { dg-options "-mavx512f -mavx512vbmi2 -mavx512bw -O2" } */
> +/* { dg-options "-mavx512vbmi2 -O2" } */
>  /* { dg-final { scan-assembler-times "vpcompressw\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
>  /* { dg-final { scan-assembler-times "vpcompressw\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */
>  /* { dg-final { scan-assembler-times "vpcompressw\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\]*\\)\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
> diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpcompressw-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpcompressw-2.c
> index 20da53944fb..45866b6f4b9 100644
> --- a/gcc/testsuite/gcc.target/i386/avx512f-vpcompressw-2.c
> +++ b/gcc/testsuite/gcc.target/i386/avx512f-vpcompressw-2.c
> @@ -1,6 +1,5 @@
>  /* { dg-do run } */
> -/* { dg-options "-O2 -mavx512f -mavx512bw -mavx512vbmi2" } */
> -/* { dg-require-effective-target avx512f } */
> +/* { dg-options "-O2 -mavx512vbmi2" } */
>  /* { dg-require-effective-target avx512vbmi2 } */
>
>  #define AVX512F
> diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpexpandb-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpexpandb-1.c
> index fb0c58e428f..ed96b539982 100644
> --- a/gcc/testsuite/gcc.target/i386/avx512f-vpexpandb-1.c
> +++ b/gcc/testsuite/gcc.target/i386/avx512f-vpexpandb-1.c
> @@ -1,5 +1,5 @@
>  /* { dg-do compile } */
> -/* { dg-options "-mavx512vbmi2 -mavx512bw -mavx512f -O2" } */
> +/* { dg-options "-mavx512vbmi2 -O2" } */
>  /* { dg-final { scan-assembler-times "vpexpandb\[ \\t\]+\[^\{\n\]*\\(\[^\n\]*%zmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)"  1 } } */
>  /* { dg-final { scan-assembler-times "vpexpandb\[ \\t\]+\[^\{\n\]*\\(\[^\n\]*%zmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)"  1 } } */
>  /* { dg-final { scan-assembler-times "vpexpandb\[ \\t\]+\[^\{\n\(]*%zmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)"  1 } } */
> diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpexpandb-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpexpandb-2.c
> index 0105ddbe20e..88dc48c7aeb 100644
> --- a/gcc/testsuite/gcc.target/i386/avx512f-vpexpandb-2.c
> +++ b/gcc/testsuite/gcc.target/i386/avx512f-vpexpandb-2.c
> @@ -1,6 +1,5 @@
>  /* { dg-do run } */
> -/* { dg-options "-O2 -mavx512f -mavx512vbmi2 -mavx512bw" } */
> -/* { dg-require-effective-target avx512f } */
> +/* { dg-options "-O2 -mavx512vbmi2" } */
>  /* { dg-require-effective-target avx512vbmi2 } */
>
>  #define AVX512F
> diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpexpandw-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpexpandw-1.c
> index 49d9fb89acf..9f568818493 100644
> --- a/gcc/testsuite/gcc.target/i386/avx512f-vpexpandw-1.c
> +++ b/gcc/testsuite/gcc.target/i386/avx512f-vpexpandw-1.c
> @@ -1,5 +1,5 @@
>  /* { dg-do compile } */
> -/* { dg-options "-mavx512vbmi2 -mavx512bw -mavx512f -O2" } */
> +/* { dg-options "-mavx512vbmi2 -O2" } */
>  /* { dg-final { scan-assembler-times "vpexpandw\[ \\t\]+\[^\{\n\]*\\(\[^\n\]*%zmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)"  1 } } */
>  /* { dg-final { scan-assembler-times "vpexpandw\[ \\t\]+\[^\{\n\]*\\(\[^\n\]*%zmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)"  1 } } */
>  /* { dg-final { scan-assembler-times "vpexpandw\[ \\t\]+\[^\{\n\(]*%zmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)"  1 } } */
> diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpexpandw-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpexpandw-2.c
> index fdad38b6813..5c090a3756d 100644
> --- a/gcc/testsuite/gcc.target/i386/avx512f-vpexpandw-2.c
> +++ b/gcc/testsuite/gcc.target/i386/avx512f-vpexpandw-2.c
> @@ -1,6 +1,5 @@
>  /* { dg-do run } */
> -/* { dg-options "-O2 -mavx512f -mavx512vbmi2 -mavx512bw" } */
> -/* { dg-require-effective-target avx512f } */
> +/* { dg-options "-O2 -mavx512vbmi2" } */
>  /* { dg-require-effective-target avx512vbmi2 } */
>
>  #define AVX512F
> diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpshld-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpshld-1.c
> index f465ce2d077..f9c250086e4 100644
> --- a/gcc/testsuite/gcc.target/i386/avx512f-vpshld-1.c
> +++ b/gcc/testsuite/gcc.target/i386/avx512f-vpshld-1.c
> @@ -1,5 +1,5 @@
>  /* { dg-do compile } */
> -/* { dg-options "-mavx512f -mavx512vbmi2 -mavx512bw -O2" } */
> +/* { dg-options "-mavx512vbmi2 -O2" } */
>  /* { dg-final { scan-assembler-times "vpshldw\[ \\t\]+\[^\{\n\]*\\\$3\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
>  /* { dg-final { scan-assembler-times "vpshldw\[ \\t\]+\[^\{\n\]*\\\$3\[^\n\r]*%zmm\[0-9\]+\[^\\n\\r]*%zmm\[0-9\]+\[^\\n\\r\]*%zmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
>  /* { dg-final { scan-assembler-times "vpshldw\[ \\t\]+\[^\{\n\]*\\\$3\[^\n\r]*%zmm\[0-9\]+\[^\\n\\r]*%zmm\[0-9\]+\[^\\n\\r\]*%zmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */
> diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpshldd-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpshldd-2.c
> index 5ddf49376ca..4c700f11e68 100644
> --- a/gcc/testsuite/gcc.target/i386/avx512f-vpshldd-2.c
> +++ b/gcc/testsuite/gcc.target/i386/avx512f-vpshldd-2.c
> @@ -1,6 +1,5 @@
>  /* { dg-do run } */
> -/* { dg-options "-O2 -mavx512f -mavx512vbmi2 -mavx512bw" } */
> -/* { dg-require-effective-target avx512f } */
> +/* { dg-options "-O2 -mavx512vbmi2" } */
>  /* { dg-require-effective-target avx512vbmi2 } */
>
>  #define AVX512F
> diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpshldq-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpshldq-2.c
> index 0377aaa19e8..1d23759428d 100644
> --- a/gcc/testsuite/gcc.target/i386/avx512f-vpshldq-2.c
> +++ b/gcc/testsuite/gcc.target/i386/avx512f-vpshldq-2.c
> @@ -1,6 +1,5 @@
>  /* { dg-do run } */
> -/* { dg-options "-O2 -mavx512f -mavx512vbmi2 -mavx512bw" } */
> -/* { dg-require-effective-target avx512f } */
> +/* { dg-options "-O2 -mavx512vbmi2" } */
>  /* { dg-require-effective-target avx512vbmi2 } */
>
>  #define AVX512F
> diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpshldv-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpshldv-1.c
> index 3427b046a05..6b1dd1662ee 100644
> --- a/gcc/testsuite/gcc.target/i386/avx512f-vpshldv-1.c
> +++ b/gcc/testsuite/gcc.target/i386/avx512f-vpshldv-1.c
> @@ -1,5 +1,5 @@
>  /* { dg-do compile } */
> -/* { dg-options "-mavx512f -mavx512vbmi2 -mavx512bw -O2" } */
> +/* { dg-options "-mavx512vbmi2 -O2" } */
>  /* { dg-final { scan-assembler-times "vpshldvw\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
>  /* { dg-final { scan-assembler-times "vpshldvw\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\\n\\r]*%zmm\[0-9\]+\[^\\n\\r\]*%zmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
>  /* { dg-final { scan-assembler-times "vpshldvw\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\\n\\r]*%zmm\[0-9\]+\[^\\n\\r\]*%zmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */
> diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpshldvd-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpshldvd-2.c
> index 46370752327..a38869e0654 100644
> --- a/gcc/testsuite/gcc.target/i386/avx512f-vpshldvd-2.c
> +++ b/gcc/testsuite/gcc.target/i386/avx512f-vpshldvd-2.c
> @@ -1,6 +1,5 @@
>  /* { dg-do run } */
> -/* { dg-options "-O2 -mavx512f -mavx512vbmi2 -mavx512bw" } */
> -/* { dg-require-effective-target avx512f } */
> +/* { dg-options "-O2 -mavx512vbmi2" } */
>  /* { dg-require-effective-target avx512vbmi2 } */
>
>  #define AVX512F
> diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpshldvq-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpshldvq-2.c
> index 4436f012b65..2eeb349f71f 100644
> --- a/gcc/testsuite/gcc.target/i386/avx512f-vpshldvq-2.c
> +++ b/gcc/testsuite/gcc.target/i386/avx512f-vpshldvq-2.c
> @@ -1,6 +1,5 @@
>  /* { dg-do run } */
> -/* { dg-options "-O2 -mavx512f -mavx512vbmi2 -mavx512bw" } */
> -/* { dg-require-effective-target avx512f } */
> +/* { dg-options "-O2 -mavx512vbmi2" } */
>  /* { dg-require-effective-target avx512vbmi2 } */
>
>  #define AVX512F
> diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpshldvw-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpshldvw-2.c
> index 5473a574146..6a31a4ddf06 100644
> --- a/gcc/testsuite/gcc.target/i386/avx512f-vpshldvw-2.c
> +++ b/gcc/testsuite/gcc.target/i386/avx512f-vpshldvw-2.c
> @@ -1,6 +1,5 @@
>  /* { dg-do run } */
> -/* { dg-options "-O2 -mavx512f -mavx512vbmi2 -mavx512bw" } */
> -/* { dg-require-effective-target avx512f } */
> +/* { dg-options "-O2 -mavx512vbmi2" } */
>  /* { dg-require-effective-target avx512vbmi2 } */
>
>  #define AVX512F
> diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpshrdd-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpshrdd-2.c
> index 54dd369942b..2c3a42955e1 100644
> --- a/gcc/testsuite/gcc.target/i386/avx512f-vpshrdd-2.c
> +++ b/gcc/testsuite/gcc.target/i386/avx512f-vpshrdd-2.c
> @@ -1,6 +1,5 @@
>  /* { dg-do run } */
> -/* { dg-options "-O2 -mavx512f -mavx512vbmi2 -mavx512bw" } */
> -/* { dg-require-effective-target avx512f } */
> +/* { dg-options "-O2 -mavx512vbmi2" } */
>  /* { dg-require-effective-target avx512vbmi2 } */
>
>  #define AVX512F
> diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpshrdq-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpshrdq-2.c
> index 4997c70a7b6..89bafc3d8c4 100644
> --- a/gcc/testsuite/gcc.target/i386/avx512f-vpshrdq-2.c
> +++ b/gcc/testsuite/gcc.target/i386/avx512f-vpshrdq-2.c
> @@ -1,6 +1,5 @@
>  /* { dg-do run } */
> -/* { dg-options "-O2 -mavx512f -mavx512vbmi2 -mavx512bw" } */
> -/* { dg-require-effective-target avx512f } */
> +/* { dg-options "-O2 -mavx512vbmi2" } */
>  /* { dg-require-effective-target avx512vbmi2 } */
>
>  #define AVX512F
> diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpshrdv-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpshrdv-1.c
> index 6dd3f0fa2b7..5e12470f640 100644
> --- a/gcc/testsuite/gcc.target/i386/avx512f-vpshrdv-1.c
> +++ b/gcc/testsuite/gcc.target/i386/avx512f-vpshrdv-1.c
> @@ -1,5 +1,5 @@
>  /* { dg-do compile } */
> -/* { dg-options "-mavx512f -mavx512vbmi2 -mavx512bw -O2" } */
> +/* { dg-options "-mavx512vbmi2 -O2" } */
>  /* { dg-final { scan-assembler-times "vpshrdvw\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
>  /* { dg-final { scan-assembler-times "vpshrdvw\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\\n\\r]*%zmm\[0-9\]+\[^\\n\\r\]*%zmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
>  /* { dg-final { scan-assembler-times "vpshrdvw\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\\n\\r]*%zmm\[0-9\]+\[^\\n\\r\]*%zmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */
> diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpshrdvd-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpshrdvd-2.c
> index 6e08095eade..d2805795a08 100644
> --- a/gcc/testsuite/gcc.target/i386/avx512f-vpshrdvd-2.c
> +++ b/gcc/testsuite/gcc.target/i386/avx512f-vpshrdvd-2.c
> @@ -1,6 +1,5 @@
>  /* { dg-do run } */
> -/* { dg-options "-O2 -mavx512f -mavx512bw -mavx512vbmi2" } */
> -/* { dg-require-effective-target avx512f } */
> +/* { dg-options "-O2 -mavx512vbmi2" } */
>  /* { dg-require-effective-target avx512vbmi2 } */
>
>  #define AVX512F
> diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpshrdvq-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpshrdvq-2.c
> index 5810fa06e4c..44378a6b35c 100644
> --- a/gcc/testsuite/gcc.target/i386/avx512f-vpshrdvq-2.c
> +++ b/gcc/testsuite/gcc.target/i386/avx512f-vpshrdvq-2.c
> @@ -1,6 +1,5 @@
>  /* { dg-do run } */
> -/* { dg-options "-O2 -mavx512f -mavx512bw -mavx512vbmi2" } */
> -/* { dg-require-effective-target avx512f } */
> +/* { dg-options "-O2 -mavx512vbmi2" } */
>  /* { dg-require-effective-target avx512vbmi2 } */
>
>  #define AVX512F
> diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpshrdvw-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpshrdvw-2.c
> index 1699c262483..c7131a08444 100644
> --- a/gcc/testsuite/gcc.target/i386/avx512f-vpshrdvw-2.c
> +++ b/gcc/testsuite/gcc.target/i386/avx512f-vpshrdvw-2.c
> @@ -1,6 +1,5 @@
>  /* { dg-do run } */
> -/* { dg-options "-O2 -mavx512f -mavx512bw -mavx512vbmi2" } */
> -/* { dg-require-effective-target avx512f } */
> +/* { dg-options "-O2 -mavx512vbmi2" } */
>  /* { dg-require-effective-target avx512vbmi2 } */
>
>  #define AVX512F
> diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpshrdw-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpshrdw-2.c
> index 67596eb7613..2dab24518bd 100644
> --- a/gcc/testsuite/gcc.target/i386/avx512f-vpshrdw-2.c
> +++ b/gcc/testsuite/gcc.target/i386/avx512f-vpshrdw-2.c
> @@ -1,6 +1,5 @@
>  /* { dg-do run } */
> -/* { dg-options "-O2 -mavx512f -mavx512vbmi2 -mavx512bw" } */
> -/* { dg-require-effective-target avx512f } */
> +/* { dg-options "-O2 -mavx512vbmi2" } */
>  /* { dg-require-effective-target avx512vbmi2 } */
>
>  #define AVX512F
> diff --git a/gcc/testsuite/gcc.target/i386/avx512vbmi2-vpshld-1.c b/gcc/testsuite/gcc.target/i386/avx512vbmi2-vpshld-1.c
> index 0b29923b721..a61ff98ea66 100644
> --- a/gcc/testsuite/gcc.target/i386/avx512vbmi2-vpshld-1.c
> +++ b/gcc/testsuite/gcc.target/i386/avx512vbmi2-vpshld-1.c
> @@ -1,5 +1,5 @@
>  /* { dg-do compile } */
> -/* { dg-options "-mavx512vbmi2 -mavx512bw -O2" } */
> +/* { dg-options "-mavx512vbmi2 -O2" } */
>  /* { dg-final { scan-assembler-times "vpshldw\[ \\t\]+\[^\{\n\]*\\\$3\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
>  /* { dg-final { scan-assembler-times "vpshldw\[ \\t\]+\[^\{\n\]*\\\$3\[^\n\r]*%zmm\[0-9\]+\[^\\n\\r]*%zmm\[0-9\]+\[^\\n\\r\]*%zmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
>  /* { dg-final { scan-assembler-times "vpshldw\[ \\t\]+\[^\{\n\]*\\\$3\[^\n\r]*%zmm\[0-9\]+\[^\\n\\r]*%zmm\[0-9\]+\[^\\n\\r\]*%zmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */
> diff --git a/gcc/testsuite/gcc.target/i386/avx512vbmi2-vpshrd-1.c b/gcc/testsuite/gcc.target/i386/avx512vbmi2-vpshrd-1.c
> index bb4de785244..7bf59672dca 100644
> --- a/gcc/testsuite/gcc.target/i386/avx512vbmi2-vpshrd-1.c
> +++ b/gcc/testsuite/gcc.target/i386/avx512vbmi2-vpshrd-1.c
> @@ -1,5 +1,5 @@
>  /* { dg-do compile } */
> -/* { dg-options "-mavx512vbmi2 -mavx512bw -O2" } */
> +/* { dg-options "-mavx512vbmi2 -O2" } */
>  /* { dg-final { scan-assembler-times "vpshrdw\[ \\t\]+\[^\{\n\]*\\\$3\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
>  /* { dg-final { scan-assembler-times "vpshrdw\[ \\t\]+\[^\{\n\]*\\\$3\[^\n\r]*%zmm\[0-9\]+\[^\\n\\r]*%zmm\[0-9\]+\[^\\n\\r\]*%zmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
>  /* { dg-final { scan-assembler-times "vpshrdw\[ \\t\]+\[^\{\n\]*\\\$3\[^\n\r]*%zmm\[0-9\]+\[^\\n\\r]*%zmm\[0-9\]+\[^\\n\\r\]*%zmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */
> diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcompressb-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpcompressb-1.c
> index 7e3aef9c782..ce4410ad852 100644
> --- a/gcc/testsuite/gcc.target/i386/avx512vl-vpcompressb-1.c
> +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcompressb-1.c
> @@ -1,5 +1,5 @@
>  /* { dg-do compile } */
> -/* { dg-options "-mavx512vl -mavx512vbmi2 -mavx512bw -O2" } */
> +/* { dg-options "-mavx512vl -mavx512vbmi2 -O2" } */
>  /* { dg-final { scan-assembler-times "vpcompressb\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
>  /* { dg-final { scan-assembler-times "vpcompressb\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
>  /* { dg-final { scan-assembler-times "vpcompressb\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */
> diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcompressb-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpcompressb-2.c
> index e6207721cbd..dc65a21285c 100644
> --- a/gcc/testsuite/gcc.target/i386/avx512vl-vpcompressb-2.c
> +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcompressb-2.c
> @@ -1,5 +1,5 @@
>  /* { dg-do run } */
> -/* { dg-options "-O2 -mavx512vl -mavx512bw -mavx512vbmi2" } */
> +/* { dg-options "-O2 -mavx512vl -mavx512vbmi2" } */
>  /* { dg-require-effective-target avx512vl } */
>  /* { dg-require-effective-target avx512vbmi2 } */
>
> diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcompressw-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpcompressw-2.c
> index 012ac10393d..a56c1b950fe 100644
> --- a/gcc/testsuite/gcc.target/i386/avx512vl-vpcompressw-2.c
> +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcompressw-2.c
> @@ -1,5 +1,5 @@
>  /* { dg-do run } */
> -/* { dg-options "-O2 -mavx512vl -mavx512bw -mavx512vbmi2" } */
> +/* { dg-options "-O2 -mavx512vl -mavx512vbmi2" } */
>  /* { dg-require-effective-target avx512vl } */
>  /* { dg-require-effective-target avx512vbmi2 } */
>
> diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpexpandb-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpexpandb-1.c
> index 96e0d815f13..5600bd4be6b 100644
> --- a/gcc/testsuite/gcc.target/i386/avx512vl-vpexpandb-1.c
> +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpexpandb-1.c
> @@ -1,5 +1,5 @@
>  /* { dg-do compile } */
> -/* { dg-options "-mavx512vbmi2 -mavx512bw -mavx512vl -O2" } */
> +/* { dg-options "-mavx512vbmi2 -mavx512vl -O2" } */
>  /* { dg-final { scan-assembler-times "vpexpandb\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)"  1 } } */
>  /* { dg-final { scan-assembler-times "vpexpandb\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)"  1 } } */
>  /* { dg-final { scan-assembler-times "vpexpandb\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)"  1 } } */
> diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpexpandb-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpexpandb-2.c
> index 280aedad135..3a3bed690a1 100644
> --- a/gcc/testsuite/gcc.target/i386/avx512vl-vpexpandb-2.c
> +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpexpandb-2.c
> @@ -1,5 +1,5 @@
>  /* { dg-do run } */
> -/* { dg-options "-O2 -mavx512vl -mavx512vbmi2 -mavx512bw" } */
> +/* { dg-options "-O2 -mavx512vl -mavx512vbmi2" } */
>  /* { dg-require-effective-target avx512vl } */
>  /* { dg-require-effective-target avx512vbmi2 } */
>
> diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpexpandw-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpexpandw-1.c
> index ac5c34a0f42..9a897eccfa8 100644
> --- a/gcc/testsuite/gcc.target/i386/avx512vl-vpexpandw-1.c
> +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpexpandw-1.c
> @@ -1,5 +1,5 @@
>  /* { dg-do compile } */
> -/* { dg-options "-mavx512vbmi2 -mavx512bw -mavx512vl -O2" } */
> +/* { dg-options "-mavx512vbmi2 -mavx512vl -O2" } */
>  /* { dg-final { scan-assembler-times "vpexpandw\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)"  1 } } */
>  /* { dg-final { scan-assembler-times "vpexpandw\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)"  1 } } */
>  /* { dg-final { scan-assembler-times "vpexpandw\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)"  1 } } */
> diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpexpandw-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpexpandw-2.c
> index 2c1e00457cc..48ec1a9ea0b 100644
> --- a/gcc/testsuite/gcc.target/i386/avx512vl-vpexpandw-2.c
> +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpexpandw-2.c
> @@ -1,5 +1,5 @@
>  /* { dg-do run } */
> -/* { dg-options "-O2 -mavx512vl -mavx512vbmi2 -mavx512bw" } */
> +/* { dg-options "-O2 -mavx512vl -mavx512vbmi2" } */
>  /* { dg-require-effective-target avx512vl } */
>  /* { dg-require-effective-target avx512vbmi2 } */
>
> diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpshldd-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpshldd-2.c
> index d47e4e61707..99d5154a1c5 100644
> --- a/gcc/testsuite/gcc.target/i386/avx512vl-vpshldd-2.c
> +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpshldd-2.c
> @@ -1,5 +1,5 @@
>  /* { dg-do run } */
> -/* { dg-options "-O2 -mavx512vl -mavx512vbmi2 -mavx512bw" } */
> +/* { dg-options "-O2 -mavx512vl -mavx512vbmi2" } */
>  /* { dg-require-effective-target avx512vl } */
>  /* { dg-require-effective-target avx512vbmi2 } */
>
> diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpshldq-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpshldq-2.c
> index 7a5575e41a1..a95b443b744 100644
> --- a/gcc/testsuite/gcc.target/i386/avx512vl-vpshldq-2.c
> +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpshldq-2.c
> @@ -1,5 +1,5 @@
>  /* { dg-do run } */
> -/* { dg-options "-O2 -mavx512vl -mavx512vbmi2 -mavx512bw" } */
> +/* { dg-options "-O2 -mavx512vl -mavx512vbmi2" } */
>  /* { dg-require-effective-target avx512vl } */
>  /* { dg-require-effective-target avx512vbmi2 } */
>
> diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpshldv-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpshldv-1.c
> index 95695527b47..79248e0281e 100644
> --- a/gcc/testsuite/gcc.target/i386/avx512vl-vpshldv-1.c
> +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpshldv-1.c
> @@ -1,5 +1,5 @@
>  /* { dg-do compile } */
> -/* { dg-options "-mavx512vl -mavx512vbmi2 -mavx512bw -O2" } */
> +/* { dg-options "-mavx512vl -mavx512vbmi2 -O2" } */
>  /* { dg-final { scan-assembler-times "vpshldvw\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
>  /* { dg-final { scan-assembler-times "vpshldvw\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\\n\\r]*%ymm\[0-9\]+\[^\\n\\r\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
>  /* { dg-final { scan-assembler-times "vpshldvw\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\\n\\r]*%ymm\[0-9\]+\[^\\n\\r\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */
> diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpshldvd-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpshldvd-2.c
> index cd2c751ba81..58481c4e1a4 100644
> --- a/gcc/testsuite/gcc.target/i386/avx512vl-vpshldvd-2.c
> +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpshldvd-2.c
> @@ -1,5 +1,5 @@
>  /* { dg-do run } */
> -/* { dg-options "-O2 -mavx512vl -mavx512vbmi2 -mavx512bw" } */
> +/* { dg-options "-O2 -mavx512vl -mavx512vbmi2" } */
>  /* { dg-require-effective-target avx512vl } */
>  /* { dg-require-effective-target avx512vbmi2 } */
>
> diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpshldvq-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpshldvq-2.c
> index 451487de6be..54e8193f19f 100644
> --- a/gcc/testsuite/gcc.target/i386/avx512vl-vpshldvq-2.c
> +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpshldvq-2.c
> @@ -1,5 +1,5 @@
>  /* { dg-do run } */
> -/* { dg-options "-O2 -mavx512vl -mavx512vbmi2 -mavx512bw" } */
> +/* { dg-options "-O2 -mavx512vl -mavx512vbmi2" } */
>  /* { dg-require-effective-target avx512vl } */
>  /* { dg-require-effective-target avx512vbmi2 } */
>
> diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpshldvw-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpshldvw-2.c
> index fa593f5d5ba..8d810077451 100644
> --- a/gcc/testsuite/gcc.target/i386/avx512vl-vpshldvw-2.c
> +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpshldvw-2.c
> @@ -1,5 +1,5 @@
>  /* { dg-do run } */
> -/* { dg-options "-O2 -mavx512vl -mavx512vbmi2 -mavx512bw" } */
> +/* { dg-options "-O2 -mavx512vl -mavx512vbmi2" } */
>  /* { dg-require-effective-target avx512vl } */
>  /* { dg-require-effective-target avx512vbmi2 } */
>
> diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpshrdd-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpshrdd-2.c
> index bf229155a02..3b2c29d02d6 100644
> --- a/gcc/testsuite/gcc.target/i386/avx512vl-vpshrdd-2.c
> +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpshrdd-2.c
> @@ -1,5 +1,5 @@
>  /* { dg-do run } */
> -/* { dg-options "-O2 -mavx512vl -mavx512vbmi2 -mavx512bw" } */
> +/* { dg-options "-O2 -mavx512vl -mavx512vbmi2" } */
>  /* { dg-require-effective-target avx512vl } */
>  /* { dg-require-effective-target avx512vbmi2 } */
>
> diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpshrdq-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpshrdq-2.c
> index 61e0708797b..02adfbf4189 100644
> --- a/gcc/testsuite/gcc.target/i386/avx512vl-vpshrdq-2.c
> +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpshrdq-2.c
> @@ -1,5 +1,5 @@
>  /* { dg-do run } */
> -/* { dg-options "-O2 -mavx512vl -mavx512vbmi2 -mavx512bw" } */
> +/* { dg-options "-O2 -mavx512vl -mavx512vbmi2" } */
>  /* { dg-require-effective-target avx512vl } */
>  /* { dg-require-effective-target avx512vbmi2 } */
>
> diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpshrdv-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpshrdv-1.c
> index 4e6ceb2787a..243878c853e 100644
> --- a/gcc/testsuite/gcc.target/i386/avx512vl-vpshrdv-1.c
> +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpshrdv-1.c
> @@ -1,5 +1,5 @@
>  /* { dg-do compile } */
> -/* { dg-options "-mavx512vl -mavx512vbmi2 -mavx512bw -O2" } */
> +/* { dg-options "-mavx512vl -mavx512vbmi2 -O2" } */
>  /* { dg-final { scan-assembler-times "vpshrdvw\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
>  /* { dg-final { scan-assembler-times "vpshrdvw\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\\n\\r]*%ymm\[0-9\]+\[^\\n\\r\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
>  /* { dg-final { scan-assembler-times "vpshrdvw\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\\n\\r]*%ymm\[0-9\]+\[^\\n\\r\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */
> diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpshrdvd-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpshrdvd-2.c
> index 6d8ab79bcad..a9e47ba64ac 100644
> --- a/gcc/testsuite/gcc.target/i386/avx512vl-vpshrdvd-2.c
> +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpshrdvd-2.c
> @@ -1,5 +1,5 @@
>  /* { dg-do run } */
> -/* { dg-options "-O2 -mavx512vl -mavx512bw -mavx512vbmi2" } */
> +/* { dg-options "-O2 -mavx512vl -mavx512vbmi2" } */
>  /* { dg-require-effective-target avx512vl } */
>  /* { dg-require-effective-target avx512vbmi2 } */
>
> diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpshrdvq-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpshrdvq-2.c
> index da74a62c724..9b4f2f2d17e 100644
> --- a/gcc/testsuite/gcc.target/i386/avx512vl-vpshrdvq-2.c
> +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpshrdvq-2.c
> @@ -1,5 +1,5 @@
>  /* { dg-do run } */
> -/* { dg-options "-O2 -mavx512vl -mavx512bw -mavx512vbmi2" } */
> +/* { dg-options "-O2 -mavx512vl -mavx512vbmi2" } */
>  /* { dg-require-effective-target avx512vl } */
>  /* { dg-require-effective-target avx512vbmi2 } */
>
> diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpshrdvw-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpshrdvw-2.c
> index 50a3c00c640..2b161fceeed 100644
> --- a/gcc/testsuite/gcc.target/i386/avx512vl-vpshrdvw-2.c
> +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpshrdvw-2.c
> @@ -1,5 +1,5 @@
>  /* { dg-do run } */
> -/* { dg-options "-O2 -mavx512vl -mavx512bw -mavx512vbmi2" } */
> +/* { dg-options "-O2 -mavx512vl -mavx512vbmi2" } */
>  /* { dg-require-effective-target avx512vl } */
>  /* { dg-require-effective-target avx512vbmi2 } */
>
> diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpshrdw-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpshrdw-2.c
> index 507034b2288..bfb32afb2f9 100644
> --- a/gcc/testsuite/gcc.target/i386/avx512vl-vpshrdw-2.c
> +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpshrdw-2.c
> @@ -1,5 +1,5 @@
>  /* { dg-do run } */
> -/* { dg-options "-O2 -mavx512vl -mavx512bw -mavx512vbmi2" } */
> +/* { dg-options "-O2 -mavx512vl -mavx512vbmi2" } */
>  /* { dg-require-effective-target avx512vl } */
>  /* { dg-require-effective-target avx512vbmi2 } */
>
> diff --git a/gcc/testsuite/gcc.target/i386/avx512vlbw-pr100267-1.c b/gcc/testsuite/gcc.target/i386/avx512vlbw-pr100267-1.c
> index 135dbd7577e..2f7d5158c4d 100644
> --- a/gcc/testsuite/gcc.target/i386/avx512vlbw-pr100267-1.c
> +++ b/gcc/testsuite/gcc.target/i386/avx512vlbw-pr100267-1.c
> @@ -1,5 +1,5 @@
>  /* { dg-do compile } */
> -/* { dg-options "-mavx512bw -mavx512vbmi2 -mavx512vl -O2" } */
> +/* { dg-options "-mavx512vbmi2 -mavx512vl -O2" } */
>  /* { dg-final { scan-assembler-times "vpexpandb\[ \\t\]+\[^\{\n\]*\\(\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)"  1 } } */
>  /* { dg-final { scan-assembler-times "vpexpandb\[ \\t\]+\[^\{\n\(]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)"  1 } } */
>  /* { dg-final { scan-assembler-times "vpexpandw\[ \\t\]+\[^\{\n\]*\\(\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)"  1 } } */
> diff --git a/gcc/testsuite/gcc.target/i386/avx512vlbw-pr100267-b-2.c b/gcc/testsuite/gcc.target/i386/avx512vlbw-pr100267-b-2.c
> index d54e8033a25..688d1be893c 100644
> --- a/gcc/testsuite/gcc.target/i386/avx512vlbw-pr100267-b-2.c
> +++ b/gcc/testsuite/gcc.target/i386/avx512vlbw-pr100267-b-2.c
> @@ -1,5 +1,5 @@
>  /* { dg-do run } */
> -/* { dg-options "-O2 -mavx512vl -mavx512vbmi2 -mavx512bw" } */
> +/* { dg-options "-O2 -mavx512vl -mavx512vbmi2" } */
>  /* { dg-require-effective-target avx512vl } */
>  /* { dg-require-effective-target avx512vbmi2 } */
>
> diff --git a/gcc/testsuite/gcc.target/i386/avx512vlbw-pr100267-w-2.c b/gcc/testsuite/gcc.target/i386/avx512vlbw-pr100267-w-2.c
> index a46ca78a621..ed061a92fc9 100644
> --- a/gcc/testsuite/gcc.target/i386/avx512vlbw-pr100267-w-2.c
> +++ b/gcc/testsuite/gcc.target/i386/avx512vlbw-pr100267-w-2.c
> @@ -1,5 +1,5 @@
>  /* { dg-do run } */
> -/* { dg-options "-O2 -mavx512vl -mavx512vbmi2 -mavx512bw" } */
> +/* { dg-options "-O2 -mavx512vl -mavx512vbmi2" } */
>  /* { dg-require-effective-target avx512vl } */
>  /* { dg-require-effective-target avx512vbmi2 } */
>
> --
> 2.31.1
>


-- 
BR,
Hongtao

^ permalink raw reply	[flat|nested] 5+ messages in thread

end of thread, other threads:[~2023-04-19  1:43 UTC | newest]

Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2023-04-18  7:04 [PATCH 0/2] i386: Add missing AVX512BW dependency for ISAs using 32/64 bit mask Haochen Jiang
2023-04-18  7:04 ` [PATCH 1/2] i386: Add AVX512BW dependency to AVX512BITALG Haochen Jiang
2023-04-19  1:42   ` Hongtao Liu
2023-04-18  7:04 ` [PATCH 2/2] i386: Add AVX512BW dependency to AVX512VBMI2 Haochen Jiang
2023-04-19  1:43   ` Hongtao Liu

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