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From: liuhongt <hongtao.liu@intel.com>
To: gcc-patches@gcc.gnu.org
Cc: jeffreyalaw@gmail.com
Subject: [PATCH v2] Canonicalize vec_merge when mask is constant.
Date: Thu,  4 May 2023 11:25:35 +0800	[thread overview]
Message-ID: <20230504032535.1368877-1-hongtao.liu@intel.com> (raw)
In-Reply-To: <1995c643-47bb-6376-ce72-d5440e59196b@gmail.com>

Here's update patch with documents in md.texi.
Ok for trunk?

--------------
Use swap_communattive_operands_p for canonicalization. When both value
has same operand precedence value, then first bit in the mask should
select first operand.

The canonicalization should help backends for pattern match. .i.e. x86
backend has lots of vec_merge patterns, combine will create any form
of vec_merge(mask, or inverted mask), then backend need to add 2
patterns to match exact 1 instruction. The canonicalization can
simplify 2 patterns to 1.

gcc/ChangeLog:

	* combine.cc (maybe_swap_commutative_operands): Canonicalize
	vec_merge when mask is constant.
	* doc/md.texi: Document vec_merge canonicalization.
---
 gcc/combine.cc  | 22 ++++++++++++++++++++++
 gcc/doc/md.texi |  7 +++++++
 2 files changed, 29 insertions(+)

diff --git a/gcc/combine.cc b/gcc/combine.cc
index 0106092e456..5aa0ec5c45a 100644
--- a/gcc/combine.cc
+++ b/gcc/combine.cc
@@ -5631,6 +5631,28 @@ maybe_swap_commutative_operands (rtx x)
       SUBST (XEXP (x, 0), XEXP (x, 1));
       SUBST (XEXP (x, 1), temp);
     }
+
+  unsigned n_elts = 0;
+  if (GET_CODE (x) == VEC_MERGE
+      && CONST_INT_P (XEXP (x, 2))
+      && GET_MODE_NUNITS (GET_MODE (x)).is_constant (&n_elts)
+      && (swap_commutative_operands_p (XEXP (x, 0), XEXP (x, 1))
+	  /* Two operands have same precedence, then
+	     first bit of mask select first operand.  */
+	  || (!swap_commutative_operands_p (XEXP (x, 1), XEXP (x, 0))
+	      && !(UINTVAL (XEXP (x, 2)) & 1))))
+    {
+      rtx temp = XEXP (x, 0);
+      unsigned HOST_WIDE_INT sel = UINTVAL (XEXP (x, 2));
+      unsigned HOST_WIDE_INT mask = HOST_WIDE_INT_1U;
+      if (n_elts == HOST_BITS_PER_WIDE_INT)
+	mask = -1;
+      else
+	mask = (HOST_WIDE_INT_1U << n_elts) - 1;
+      SUBST (XEXP (x, 0), XEXP (x, 1));
+      SUBST (XEXP (x, 1), temp);
+      SUBST (XEXP (x, 2), GEN_INT (~sel & mask));
+    }
 }
 
 /* Simplify X, a piece of RTL.  We just operate on the expression at the
diff --git a/gcc/doc/md.texi b/gcc/doc/md.texi
index 07bf8bdebff..aff9b7348ce 100644
--- a/gcc/doc/md.texi
+++ b/gcc/doc/md.texi
@@ -8215,6 +8215,13 @@ second operand.  If a machine only supports a constant as the second
 operand, only patterns that match a constant in the second operand need
 be supplied.
 
+@cindex @code{vec_merge}, canonicalization of
+@item
+For the @code{vec_merge} with constant mask(the third operand), the first
+and the second operand can be exchanged by inverting the mask. In such cases,
+a constant is always made the second operand, otherwise the least significant
+bit of the mask is always set(select the first operand first).
+
 @item
 For associative operators, a sequence of operators will always chain
 to the left; for instance, only the left operand of an integer @code{plus}
-- 
2.39.1.388.g2fc9e9ca3c


  parent reply	other threads:[~2023-05-04  3:27 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-04-20  3:58 [PATCH] " liuhongt
2023-04-30 19:37 ` Jeff Law
2023-05-04  2:49   ` Hongtao Liu
2023-05-04  3:25   ` liuhongt [this message]
2023-05-05 23:34     ` [PATCH v2] " Jeff Law

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