From: Michael Collison <collison@rivosinc.com>
To: gcc-patches@gcc.gnu.org
Subject: [PATCH v6 1/9] RISC-V: autovec: Add new predicates and function prototypes
Date: Fri, 5 May 2023 11:45:59 -0400 [thread overview]
Message-ID: <20230505154607.1155567-2-collison@rivosinc.com> (raw)
In-Reply-To: <20230505154607.1155567-1-collison@rivosinc.com>
2023-04-24 Michael Collison <collison@rivosinc.com>
Juzhe Zhong <juzhe.zhong@rivai.ai>
* config/riscv/riscv-protos.h
(riscv_vector_preferred_simd_mode): New.
(riscv_vector_mask_mode_p): Ditto.
(riscv_vector_get_mask_mode): Ditto.
(emit_vlmax_vsetvl): Ditto.
(get_mask_policy_no_pred): Ditto.
(get_tail_policy_no_pred): Ditto.
(vlmul_field_enum): Ditto.
* config/riscv/riscv-v.cc (emit_vlmax_vsetvl):
Remove static scope.
* config/riscv/riscv-opts.h (riscv_vector_lmul_enum): New enum.
---
gcc/config/riscv/riscv-opts.h | 10 ++++++++++
gcc/config/riscv/riscv-protos.h | 9 +++++++++
2 files changed, 19 insertions(+)
diff --git a/gcc/config/riscv/riscv-opts.h b/gcc/config/riscv/riscv-opts.h
index 4207db240ea..00c4ab222ae 100644
--- a/gcc/config/riscv/riscv-opts.h
+++ b/gcc/config/riscv/riscv-opts.h
@@ -67,6 +67,7 @@ enum stack_protector_guard {
SSP_GLOBAL /* global canary */
};
+
/* RISC-V auto-vectorization preference. */
enum riscv_autovec_preference_enum {
NO_AUTOVEC,
@@ -82,6 +83,15 @@ enum riscv_autovec_lmul_enum {
RVV_M8 = 8
};
+/* vectorization factor. */
+enum riscv_vector_lmul_enum
+{
+ RVV_LMUL1 = 1,
+ RVV_LMUL2 = 2,
+ RVV_LMUL4 = 4,
+ RVV_LMUL8 = 8
+};
+
#define MASK_ZICSR (1 << 0)
#define MASK_ZIFENCEI (1 << 1)
diff --git a/gcc/config/riscv/riscv-protos.h b/gcc/config/riscv/riscv-protos.h
index 33eb574aadc..fb39b856735 100644
--- a/gcc/config/riscv/riscv-protos.h
+++ b/gcc/config/riscv/riscv-protos.h
@@ -243,4 +243,13 @@ th_mempair_output_move (rtx[4], bool, machine_mode, RTX_CODE);
#endif
extern bool riscv_use_divmod_expander (void);
+/* Routines implemented in riscv-v.cc. */
+
+namespace riscv_vector {
+extern machine_mode riscv_vector_preferred_simd_mode (scalar_mode mode);
+extern bool riscv_vector_mask_mode_p (machine_mode);
+extern opt_machine_mode riscv_vector_get_mask_mode (machine_mode mode);
+extern rtx get_mask_policy_no_pred ();
+extern rtx get_tail_policy_no_pred ();
+}
#endif /* ! GCC_RISCV_PROTOS_H */
--
2.34.1
next prev parent reply other threads:[~2023-05-05 15:46 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-05-05 15:45 [PATCH v6 0/9] RISC-V: autovec: Add autovec support Michael Collison
2023-05-05 15:45 ` Michael Collison [this message]
2023-05-06 17:01 ` [PATCH v6 1/9] RISC-V: autovec: Add new predicates and function prototypes Jeff Law
2023-05-05 15:46 ` [PATCH v6 2/9] RISC-V: autovec: Export policy functions to global scope Michael Collison
2023-05-06 17:20 ` Jeff Law
2023-05-05 15:46 ` [PATCH v6 3/9] RISC-V:autovec: Add auto-vectorization support functions Michael Collison
2023-05-06 17:33 ` Jeff Law
2023-05-05 15:46 ` [PATCH v6 4/9] RISC-V:autovec: Add target vectorization hooks Michael Collison
2023-05-06 18:28 ` Jeff Law
2023-05-05 15:46 ` [PATCH v6 5/9] RISC-V:autovec: Add autovectorization patterns for binary integer & len_load/store Michael Collison
2023-05-05 15:46 ` [PATCH v6 6/9] RISC-V:autovec: Add autovectorization tests for add & sub Michael Collison
2023-05-05 15:46 ` [PATCH v6 7/9] RISC-V: autovec: Verify that GET_MODE_NUNITS is a multiple of 2 Michael Collison
2023-05-06 18:39 ` Jeff Law
2023-05-05 15:46 ` [PATCH v6 8/9] RISC-V:autovec: Add autovectorization tests for binary integer Michael Collison
2023-05-05 15:46 ` [PATCH v6 9/9] RISC-V:autovec: This patch supports 8 bit auto-vectorization in riscv Michael Collison
2023-05-05 16:34 ` [PATCH v6 0/9] RISC-V: autovec: Add autovec support Kito Cheng
2023-05-05 17:12 ` Michael Collison
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