From: pan2.li@intel.com
To: gcc-patches@gcc.gnu.org
Cc: juzhe.zhong@rivai.ai, kito.cheng@sifive.com, pan2.li@intel.com,
yanzhang.wang@intel.com, jeffreyalaw@gmail.com
Subject: [PATCH] RISC-V: Adjust stdint.h to stdint-gcc.h for rvv tests
Date: Tue, 16 May 2023 14:52:01 +0800 [thread overview]
Message-ID: <20230516065201.751821-1-pan2.li@intel.com> (raw)
From: Pan Li <pan2.li@intel.com>
This patch would like to align the stdint.h to the stdint-gcc.h for all
the RVV test files. Aka:
stdint.h => stdint-gcc.h
Signed-off-by: Pan Li <pan2.li@intel.com>
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/autovec/binop/shift-scalar-template.h:
Replace stdint.h with stdint-gcc.h.
* gcc.target/riscv/rvv/autovec/binop/shift-template.h: Ditto.
* gcc.target/riscv/rvv/autovec/binop/vadd-template.h: Ditto.
* gcc.target/riscv/rvv/autovec/binop/vand-template.h: Ditto.
* gcc.target/riscv/rvv/autovec/binop/vdiv-template.h: Ditto.
* gcc.target/riscv/rvv/autovec/binop/vmax-template.h: Ditto.
* gcc.target/riscv/rvv/autovec/binop/vmin-template.h: Ditto.
* gcc.target/riscv/rvv/autovec/binop/vmul-template.h: Ditto.
* gcc.target/riscv/rvv/autovec/binop/vor-template.h: Ditto.
* gcc.target/riscv/rvv/autovec/binop/vrem-template.h: Ditto.
* gcc.target/riscv/rvv/autovec/binop/vsub-template.h: Ditto.
* gcc.target/riscv/rvv/autovec/binop/vxor-template.h: Ditto.
* gcc.target/riscv/rvv/autovec/series-1.c: Ditto.
* gcc.target/riscv/rvv/autovec/vmv-imm-run.c: Ditto.
* gcc.target/riscv/rvv/autovec/vmv-imm-template.h: Ditto.
---
.../gcc.target/riscv/rvv/autovec/binop/shift-scalar-template.h | 2 +-
.../gcc.target/riscv/rvv/autovec/binop/shift-template.h | 2 +-
.../gcc.target/riscv/rvv/autovec/binop/vadd-template.h | 2 +-
.../gcc.target/riscv/rvv/autovec/binop/vand-template.h | 2 +-
.../gcc.target/riscv/rvv/autovec/binop/vdiv-template.h | 2 +-
.../gcc.target/riscv/rvv/autovec/binop/vmax-template.h | 2 +-
.../gcc.target/riscv/rvv/autovec/binop/vmin-template.h | 2 +-
.../gcc.target/riscv/rvv/autovec/binop/vmul-template.h | 2 +-
gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vor-template.h | 2 +-
.../gcc.target/riscv/rvv/autovec/binop/vrem-template.h | 2 +-
.../gcc.target/riscv/rvv/autovec/binop/vsub-template.h | 2 +-
.../gcc.target/riscv/rvv/autovec/binop/vxor-template.h | 2 +-
gcc/testsuite/gcc.target/riscv/rvv/autovec/series-1.c | 2 +-
gcc/testsuite/gcc.target/riscv/rvv/autovec/vmv-imm-run.c | 2 +-
gcc/testsuite/gcc.target/riscv/rvv/autovec/vmv-imm-template.h | 2 +-
15 files changed, 15 insertions(+), 15 deletions(-)
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/shift-scalar-template.h b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/shift-scalar-template.h
index a0ddc00849d..8d1cefdca85 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/shift-scalar-template.h
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/shift-scalar-template.h
@@ -2,7 +2,7 @@
/* { dg-do run } */
/* { dg-additional-options "-std=c99 --param=riscv-autovec-preference=scalable -fno-vect-cost-model --save-temps" } */
-#include <stdint.h>
+#include <stdint-gcc.h>
#include <assert.h>
#define SHIFTL(TYPE,VAL) \
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/shift-template.h b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/shift-template.h
index 64e0a386b06..16ae48c8ede 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/shift-template.h
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/shift-template.h
@@ -1,4 +1,4 @@
-#include <stdint.h>
+#include <stdint-gcc.h>
#define TEST1_TYPE(TYPE) \
__attribute__((noipa)) \
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vadd-template.h b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vadd-template.h
index 5ed79329138..cd945d471d2 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vadd-template.h
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vadd-template.h
@@ -1,4 +1,4 @@
-#include <stdint.h>
+#include <stdint-gcc.h>
#define TEST_TYPE(TYPE) \
__attribute__((noipa)) \
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vand-template.h b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vand-template.h
index 7d02c83d164..5cabe073097 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vand-template.h
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vand-template.h
@@ -1,4 +1,4 @@
-#include <stdint.h>
+#include <stdint-gcc.h>
#define TEST_TYPE(TYPE) \
__attribute__((noipa)) \
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vdiv-template.h b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vdiv-template.h
index 7fbba7b4133..12a1de32874 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vdiv-template.h
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vdiv-template.h
@@ -1,4 +1,4 @@
-#include <stdint.h>
+#include <stdint-gcc.h>
#define TEST_TYPE(TYPE) \
__attribute__((noipa)) \
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vmax-template.h b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vmax-template.h
index df0f9f2aeeb..fc6a07e3ce9 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vmax-template.h
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vmax-template.h
@@ -1,4 +1,4 @@
-#include <stdint.h>
+#include <stdint-gcc.h>
#define TEST_TYPE(TYPE) \
__attribute__((noipa)) \
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vmin-template.h b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vmin-template.h
index 459f58ddec1..06f6b95461e 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vmin-template.h
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vmin-template.h
@@ -1,4 +1,4 @@
-#include <stdint.h>
+#include <stdint-gcc.h>
#define TEST_TYPE(TYPE) \
__attribute__((noipa)) \
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vmul-template.h b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vmul-template.h
index b029c06efd6..37f77972101 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vmul-template.h
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vmul-template.h
@@ -1,4 +1,4 @@
-#include <stdint.h>
+#include <stdint-gcc.h>
#define TEST_TYPE(TYPE) \
__attribute__((noipa)) \
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vor-template.h b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vor-template.h
index 859ae67c5ee..e60146cc232 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vor-template.h
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vor-template.h
@@ -1,4 +1,4 @@
-#include <stdint.h>
+#include <stdint-gcc.h>
#define TEST_TYPE(TYPE) \
__attribute__((noipa)) \
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vrem-template.h b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vrem-template.h
index 71eebc8b645..d5ef40667ff 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vrem-template.h
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vrem-template.h
@@ -1,4 +1,4 @@
-#include <stdint.h>
+#include <stdint-gcc.h>
#define TEST_TYPE(TYPE) \
__attribute__((noipa)) \
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vsub-template.h b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vsub-template.h
index 0566f3dcbfb..8c0a9c99217 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vsub-template.h
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vsub-template.h
@@ -1,4 +1,4 @@
-#include <stdint.h>
+#include <stdint-gcc.h>
#define TEST_TYPE(TYPE) \
__attribute__((noipa)) \
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vxor-template.h b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vxor-template.h
index 954a247f539..370b242f197 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vxor-template.h
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vxor-template.h
@@ -1,4 +1,4 @@
-#include <stdint.h>
+#include <stdint-gcc.h>
#define TEST_TYPE(TYPE) \
__attribute__((noipa)) \
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/series-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/series-1.c
index a01f6ce7411..1c697228e9b 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/series-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/series-1.c
@@ -1,7 +1,7 @@
/* { dg-do compile } */
/* { dg-options "-march=rv32gcv -mabi=ilp32d --param riscv-autovec-preference=fixed-vlmax --param riscv-autovec-lmul=m4" } */
-#include <stdint.h>
+#include <stdint-gcc.h>
#define NUM_ELEMS(TYPE) (64 / sizeof (TYPE))
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmv-imm-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmv-imm-run.c
index 309a296b686..6764110d461 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmv-imm-run.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmv-imm-run.c
@@ -3,7 +3,7 @@
#include "vmv-imm-template.h"
-#include <stdint.h>
+#include <stdint-gcc.h>
#include <assert.h>
#define SZ 512
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmv-imm-template.h b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmv-imm-template.h
index 93ba5204c2e..855343d7e3e 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmv-imm-template.h
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmv-imm-template.h
@@ -1,4 +1,4 @@
-#include <stdint.h>
+#include <stdint-gcc.h>
#include <assert.h>
#define VMV_POS(TYPE,VAL) \
--
2.34.1
next reply other threads:[~2023-05-16 6:52 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-05-16 6:52 pan2.li [this message]
2023-05-16 7:10 ` Robin Dapp
2023-05-16 7:16 ` Li, Pan2
2023-05-16 7:29 ` Li, Pan2
2023-05-17 6:15 ` Richard Biener
2023-05-17 6:25 ` Robin Dapp
2023-05-17 6:55 ` Kito Cheng
2023-05-17 12:22 ` Richard Biener
2023-05-17 13:07 ` Kito Cheng
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