* [PATCH] RISC-V: Fix warning in riscv.md
@ 2023-05-30 1:13 juzhe.zhong
2023-05-30 2:05 ` Kito Cheng
0 siblings, 1 reply; 2+ messages in thread
From: juzhe.zhong @ 2023-05-30 1:13 UTC (permalink / raw)
To: gcc-patches
Cc: kito.cheng, kito.cheng, palmer, palmer, jeffreyalaw, rdapp.gcc,
Juzhe-Zhong
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From: Juzhe-Zhong <juzhe.zhong@rivai.ai>
Notice there is warning:
../../../riscv-gcc/gcc/config/riscv/riscv.md:1356:32: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
if (INTVAL (operands[2]) == GET_MODE_MASK (HImode))
../../../riscv-gcc/gcc/config/riscv/riscv.md:1358:37: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
else if (INTVAL (operands[2]) == GET_MODE_MASK (SImode))
../../../riscv-gcc/gcc/config/riscv/riscv.md: In function ‘rtx_def* gen_anddi3(rtx, rtx, rtx)’:
../../../riscv-gcc/gcc/config/riscv/riscv.md:1356:32: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
if (INTVAL (operands[2]) == GET_MODE_MASK (HImode))
../../../riscv-gcc/gcc/config/riscv/riscv.md:1358:37: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
else if (INTVAL (operands[2]) == GET_MODE_MASK (SImode))
Add unsigned conversion to fix this warning.
gcc/ChangeLog:
* config/riscv/riscv.md: Fix signed and unsigned comparison warning.
---
gcc/config/riscv/riscv.md | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/gcc/config/riscv/riscv.md b/gcc/config/riscv/riscv.md
index aba203318a7..3d71f59c3a9 100644
--- a/gcc/config/riscv/riscv.md
+++ b/gcc/config/riscv/riscv.md
@@ -1353,9 +1353,9 @@
if (CONST_INT_P (operands[2]))
{
enum machine_mode tmode = VOIDmode;
- if (INTVAL (operands[2]) == GET_MODE_MASK (HImode))
+ if ((unsigned HOST_WIDE_INT) INTVAL (operands[2]) == GET_MODE_MASK (HImode))
tmode = HImode;
- else if (INTVAL (operands[2]) == GET_MODE_MASK (SImode))
+ else if ((unsigned HOST_WIDE_INT) INTVAL (operands[2]) == GET_MODE_MASK (SImode))
tmode = SImode;
if (tmode != VOIDmode)
--
2.36.3
^ permalink raw reply [flat|nested] 2+ messages in thread* Re: [PATCH] RISC-V: Fix warning in riscv.md
2023-05-30 1:13 [PATCH] RISC-V: Fix warning in riscv.md juzhe.zhong
@ 2023-05-30 2:05 ` Kito Cheng
0 siblings, 0 replies; 2+ messages in thread
From: Kito Cheng @ 2023-05-30 2:05 UTC (permalink / raw)
To: juzhe.zhong
Cc: gcc-patches, kito.cheng, palmer, palmer, jeffreyalaw, rdapp.gcc
You could use UINTVAL rather than (unsigned HOST_WIDE_INT) INTVAL
On Tue, May 30, 2023 at 9:14 AM <juzhe.zhong@rivai.ai> wrote:
>
> From: Juzhe-Zhong <juzhe.zhong@rivai.ai>
>
> Notice there is warning:
> ../../../riscv-gcc/gcc/config/riscv/riscv.md:1356:32: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
> if (INTVAL (operands[2]) == GET_MODE_MASK (HImode))
> ../../../riscv-gcc/gcc/config/riscv/riscv.md:1358:37: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
> else if (INTVAL (operands[2]) == GET_MODE_MASK (SImode))
> ../../../riscv-gcc/gcc/config/riscv/riscv.md: In function ‘rtx_def* gen_anddi3(rtx, rtx, rtx)’:
> ../../../riscv-gcc/gcc/config/riscv/riscv.md:1356:32: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
> if (INTVAL (operands[2]) == GET_MODE_MASK (HImode))
> ../../../riscv-gcc/gcc/config/riscv/riscv.md:1358:37: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
> else if (INTVAL (operands[2]) == GET_MODE_MASK (SImode))
>
> Add unsigned conversion to fix this warning.
>
> gcc/ChangeLog:
>
> * config/riscv/riscv.md: Fix signed and unsigned comparison warning.
>
> ---
> gcc/config/riscv/riscv.md | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/gcc/config/riscv/riscv.md b/gcc/config/riscv/riscv.md
> index aba203318a7..3d71f59c3a9 100644
> --- a/gcc/config/riscv/riscv.md
> +++ b/gcc/config/riscv/riscv.md
> @@ -1353,9 +1353,9 @@
> if (CONST_INT_P (operands[2]))
> {
> enum machine_mode tmode = VOIDmode;
> - if (INTVAL (operands[2]) == GET_MODE_MASK (HImode))
> + if ((unsigned HOST_WIDE_INT) INTVAL (operands[2]) == GET_MODE_MASK (HImode))
> tmode = HImode;
> - else if (INTVAL (operands[2]) == GET_MODE_MASK (SImode))
> + else if ((unsigned HOST_WIDE_INT) INTVAL (operands[2]) == GET_MODE_MASK (SImode))
> tmode = SImode;
>
> if (tmode != VOIDmode)
> --
> 2.36.3
>
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2023-05-30 1:13 [PATCH] RISC-V: Fix warning in riscv.md juzhe.zhong
2023-05-30 2:05 ` Kito Cheng
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