* [COMMITTED] bpf: sdiv/smod are now part of BPF V4
@ 2023-07-24 14:01 Jose E. Marchesi
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From: Jose E. Marchesi @ 2023-07-24 14:01 UTC (permalink / raw)
To: gcc-patches
We used to support signed division and signed modulus instructions in
the XBPF GCC-specific extensions to BPF. However, BPF catched up by
adding these instructions in the V4 of the ISA.
This patch changes GCC in order to use sdiv/smod instructions when
-mcpu=v4 or higher. The testsuite and the manual have been updated
accordingly.
Tested in bpf-unknown-none.
gcc/ChangeLog
PR target/110783
* config/bpf/bpf.opt: New command-line option -msdiv.
* config/bpf/bpf.md: Conditionalize sdiv/smod on bpf_has_sdiv.
* config/bpf/bpf.cc (bpf_option_override): Initialize
bpf_has_sdiv.
* doc/invoke.texi (eBPF Options): Document -msdiv.
gcc/testsuite/ChangeLog
PR target/110783
* gcc.target/bpf/xbpf-sdiv-1.c: Renamed to sdiv-1.c
* gcc.target/bpf/xbpf-smod-1.c: Renamed to smod-1.c
* gcc.target/bpf/sdiv-1.c: Renamed from xbpf-sdiv-1.c, use -mcpu=v4.
* gcc.target/bpf/smod-1.c: Renamed from xbpf-smod-1.c, use -mcpu=v4.
* gcc.target/bpf/diag-sdiv.c: Use -mcpu=v3.
* gcc.target/bpf/diag-smod.c: Likewise.
---
gcc/config/bpf/bpf.cc | 3 +++
gcc/config/bpf/bpf.md | 16 ++++++++--------
gcc/config/bpf/bpf.opt | 4 ++++
gcc/doc/invoke.texi | 5 +++++
gcc/testsuite/gcc.target/bpf/diag-sdiv.c | 2 +-
gcc/testsuite/gcc.target/bpf/diag-smod.c | 2 +-
.../gcc.target/bpf/{xbpf-sdiv-1.c => sdiv-1.c} | 2 +-
.../gcc.target/bpf/{xbpf-smod-1.c => smod-1.c} | 2 +-
8 files changed, 24 insertions(+), 12 deletions(-)
rename gcc/testsuite/gcc.target/bpf/{xbpf-sdiv-1.c => sdiv-1.c} (86%)
rename gcc/testsuite/gcc.target/bpf/{xbpf-smod-1.c => smod-1.c} (86%)
diff --git a/gcc/config/bpf/bpf.cc b/gcc/config/bpf/bpf.cc
index 18d3b5f14d6..55b6927a62f 100644
--- a/gcc/config/bpf/bpf.cc
+++ b/gcc/config/bpf/bpf.cc
@@ -256,6 +256,9 @@ bpf_option_override (void)
if (bpf_has_bswap == -1)
bpf_has_bswap = (bpf_isa >= ISA_V4);
+ if (bpf_has_sdiv == -1)
+ bpf_has_sdiv = (bpf_isa >= ISA_V4);
+
/* Disable -fstack-protector as it is not supported in BPF. */
if (flag_stack_protect)
{
diff --git a/gcc/config/bpf/bpf.md b/gcc/config/bpf/bpf.md
index 81e2268c400..3e2d760fbe4 100644
--- a/gcc/config/bpf/bpf.md
+++ b/gcc/config/bpf/bpf.md
@@ -167,8 +167,8 @@ (define_insn "*mulsidi3_zeroextend"
;;; Division
-;; Note that eBPF doesn't provide instructions for signed integer
-;; division.
+;; Note that eBPF <= V3 doesn't provide instructions for signed
+;; integer division.
(define_insn "udiv<AM:mode>3"
[(set (match_operand:AM 0 "register_operand" "=r,r")
@@ -178,20 +178,20 @@ (define_insn "udiv<AM:mode>3"
"{div<msuffix>\t%0,%2|%w0 /= %w2}"
[(set_attr "type" "<mtype>")])
-;; However, xBPF does provide a signed division operator, sdiv.
+;; However, BPF V4 does provide a signed division operator, sdiv.
(define_insn "div<AM:mode>3"
[(set (match_operand:AM 0 "register_operand" "=r,r")
(div:AM (match_operand:AM 1 "register_operand" " 0,0")
(match_operand:AM 2 "reg_or_imm_operand" "r,I")))]
- "TARGET_XBPF"
+ "bpf_has_sdiv"
"{sdiv<msuffix>\t%0,%2|%w0 s/= %w2}"
[(set_attr "type" "<mtype>")])
;;; Modulus
-;; Note that eBPF doesn't provide instructions for signed integer
-;; remainder.
+;; Note that eBPF <= V3 doesn't provide instructions for signed
+;; integer remainder.
(define_insn "umod<AM:mode>3"
[(set (match_operand:AM 0 "register_operand" "=r,r")
@@ -201,13 +201,13 @@ (define_insn "umod<AM:mode>3"
"{mod<msuffix>\t%0,%2|%w0 %%= %w2}"
[(set_attr "type" "<mtype>")])
-;; Again, xBPF provides a signed version, smod.
+;; However, BPF V4 does provide a signed modulus operator, smod.
(define_insn "mod<AM:mode>3"
[(set (match_operand:AM 0 "register_operand" "=r,r")
(mod:AM (match_operand:AM 1 "register_operand" " 0,0")
(match_operand:AM 2 "reg_or_imm_operand" "r,I")))]
- "TARGET_XBPF"
+ "bpf_has_sdiv"
"{smod<msuffix>\t%0,%2|%w0 s%%= %w2}"
[(set_attr "type" "<mtype>")])
diff --git a/gcc/config/bpf/bpf.opt b/gcc/config/bpf/bpf.opt
index 3bf9033279b..bd35f8dbd0c 100644
--- a/gcc/config/bpf/bpf.opt
+++ b/gcc/config/bpf/bpf.opt
@@ -63,6 +63,10 @@ mbswap
Target Var(bpf_has_bswap) Init(-1)
Enable byte swap instructions.
+msdiv
+Target Var(bpf_has_sdiv) Init(-1)
+Enable signed division and modulus instructions.
+
mcpu=
Target RejectNegative Joined Var(bpf_isa) Enum(bpf_isa) Init(ISA_V4)
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index a977a34db42..fa765d5a0dd 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -24711,6 +24711,11 @@ Enable 32-bit ALU instructions. Enabled for CPU v3 and above.
@item -mbswap
Enable byte swap instructions. Enabled for CPU v4 and above.
+@opindex msdiv
+@item -msdiv
+Enable signed division and modulus instructions. Enabled for CPU v4
+and above.
+
@opindex mcpu
@item -mcpu=@var{version}
This specifies which version of the eBPF ISA to target. Newer versions
diff --git a/gcc/testsuite/gcc.target/bpf/diag-sdiv.c b/gcc/testsuite/gcc.target/bpf/diag-sdiv.c
index db0c494a789..c48bbf03df9 100644
--- a/gcc/testsuite/gcc.target/bpf/diag-sdiv.c
+++ b/gcc/testsuite/gcc.target/bpf/diag-sdiv.c
@@ -1,6 +1,6 @@
/* Verify signed division does not produce 'sdiv' insn in eBPF. */
/* { dg-do compile } */
-/* { dg-options "-O0" } */
+/* { dg-options "-O0 -mcpu=v3" } */
void
foo ()
diff --git a/gcc/testsuite/gcc.target/bpf/diag-smod.c b/gcc/testsuite/gcc.target/bpf/diag-smod.c
index 20234ee39cc..d3df308217f 100644
--- a/gcc/testsuite/gcc.target/bpf/diag-smod.c
+++ b/gcc/testsuite/gcc.target/bpf/diag-smod.c
@@ -1,6 +1,6 @@
/* Verify signed modulo does not produce 'smod' insn in eBPF. */
/* { dg-do compile } */
-/* { dg-options "-O0" } */
+/* { dg-options "-O0 -mcpu=v3" } */
void
foo ()
diff --git a/gcc/testsuite/gcc.target/bpf/xbpf-sdiv-1.c b/gcc/testsuite/gcc.target/bpf/sdiv-1.c
similarity index 86%
rename from gcc/testsuite/gcc.target/bpf/xbpf-sdiv-1.c
rename to gcc/testsuite/gcc.target/bpf/sdiv-1.c
index f6c5c9e9f1c..ad75b044e1d 100644
--- a/gcc/testsuite/gcc.target/bpf/xbpf-sdiv-1.c
+++ b/gcc/testsuite/gcc.target/bpf/sdiv-1.c
@@ -1,6 +1,6 @@
/* Verify that sdiv instruction is used for xBPF. */
/* { dg-do compile } */
-/* { dg-options "-O0 -mxbpf" } */
+/* { dg-options "-O0 -mcpu=v4" } */
void
foo ()
diff --git a/gcc/testsuite/gcc.target/bpf/xbpf-smod-1.c b/gcc/testsuite/gcc.target/bpf/smod-1.c
similarity index 86%
rename from gcc/testsuite/gcc.target/bpf/xbpf-smod-1.c
rename to gcc/testsuite/gcc.target/bpf/smod-1.c
index b3e5816b5cf..c5fc6f7d4b2 100644
--- a/gcc/testsuite/gcc.target/bpf/xbpf-smod-1.c
+++ b/gcc/testsuite/gcc.target/bpf/smod-1.c
@@ -1,6 +1,6 @@
/* Verify that smod instruction is used for xBPF. */
/* { dg-do compile } */
-/* { dg-options "-O0 -mxbpf" } */
+/* { dg-options "-O0 -mcpu=v4" } */
void
foo ()
--
2.30.2
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2023-07-24 14:01 [COMMITTED] bpf: sdiv/smod are now part of BPF V4 Jose E. Marchesi
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