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* [PATCH] RISC-V Regression: Fix dump check of bb-slp-68.c
@ 2023-10-10  1:16 Juzhe-Zhong
  2023-10-10 13:44 ` Jeff Law
  0 siblings, 1 reply; 2+ messages in thread
From: Juzhe-Zhong @ 2023-10-10  1:16 UTC (permalink / raw)
  To: gcc-patches; +Cc: rguenther, jeffreyalaw, Juzhe-Zhong

Like GCN, RVV also has 64 bytes vectors (512 bits) which cause FAIL in this test.

It's more reasonable to use "vect512" instead of AMDGCN.

gcc/testsuite/ChangeLog:

	* gcc.dg/vect/bb-slp-68.c: Use vect512.

---
 gcc/testsuite/gcc.dg/vect/bb-slp-68.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/gcc/testsuite/gcc.dg/vect/bb-slp-68.c b/gcc/testsuite/gcc.dg/vect/bb-slp-68.c
index e7573a14933..2dd3d8ee90c 100644
--- a/gcc/testsuite/gcc.dg/vect/bb-slp-68.c
+++ b/gcc/testsuite/gcc.dg/vect/bb-slp-68.c
@@ -20,4 +20,4 @@ void foo ()
 
 /* We want to have the store group split into 4, 2, 4 when using 32byte vectors.
    Unfortunately it does not work when 64-byte vectors are available.  */
-/* { dg-final { scan-tree-dump-not "from scalars" "slp2" { xfail amdgcn-*-* } } } */
+/* { dg-final { scan-tree-dump-not "from scalars" "slp2" { xfail vect512 } } } */
-- 
2.36.3


^ permalink raw reply	[flat|nested] 2+ messages in thread

* Re: [PATCH] RISC-V Regression: Fix dump check of bb-slp-68.c
  2023-10-10  1:16 [PATCH] RISC-V Regression: Fix dump check of bb-slp-68.c Juzhe-Zhong
@ 2023-10-10 13:44 ` Jeff Law
  0 siblings, 0 replies; 2+ messages in thread
From: Jeff Law @ 2023-10-10 13:44 UTC (permalink / raw)
  To: Juzhe-Zhong, gcc-patches; +Cc: rguenther



On 10/9/23 19:16, Juzhe-Zhong wrote:
> Like GCN, RVV also has 64 bytes vectors (512 bits) which cause FAIL in this test.
> 
> It's more reasonable to use "vect512" instead of AMDGCN.
> 
> gcc/testsuite/ChangeLog:
> 
> 	* gcc.dg/vect/bb-slp-68.c: Use vect512.
Just a note for the record.  At this time the only target obviously 
advertising 512 bit vectors in available_vector_sizes is amdgcn -- 
avx512 doesn't signal 512 bit vectors right now.  SVE might, but it's a 
bit hard to tell easily and I don't have a cross handy.  I'd hazard a 
guess it would via -msve-vector-bits.

Anyway, OK for the trunk.  Just keep an eye out for reports of any 
issues with this test on aarch64.

Thanks,
Jeff


^ permalink raw reply	[flat|nested] 2+ messages in thread

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2023-10-10  1:16 [PATCH] RISC-V Regression: Fix dump check of bb-slp-68.c Juzhe-Zhong
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